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2024-09-05arm64: dts: rockchip: add CAN0 and CAN1 interfaces to mecsbc boardDavid Jander1-0/+14
This patch adds support for the CAN0 and CAN1 interfaces to the board. Signed-off-by: David Jander <david@protonic.nl> Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20240904-rk3568-canfd-v1-2-73bda5fb4e03@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-05arm64: dts: rockchip: add CAN-FD controller nodes to rk3568David Jander1-0/+39
Add nodes to the rk3568 devicetree to support the CAN-FD controllers. Signed-off-by: David Jander <david@protonic.nl> Tested-by: Alibek Omarov <a1ba.omarov@gmail.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20240904-rk3568-canfd-v1-1-73bda5fb4e03@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-04arm64: dts: rockchip: remove duplicate nodes from dts for ROCK 4SEFUKAUMI Naoki1-15/+0
these nodes just define same properties in rk3399-rock-pi-4.dtsi. remove them from rk3399-rock-4se.dts. sha256sum rk3399-rock-4se.dtb generates same hash value before/after this change. Fixes: 86a0e14a82ea ("arm64: dts: rockchip: Add Radxa ROCK 4SE") Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20240903073544.2161-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-04arm64: dts: rockchip: Add GameForce AceChris Morgan2-0/+1238
The GameForce Ace is a portable gaming device based on the Rockchip RK3588s SoC. The device contains the following hardware that is tested/working: - 128GB eMMC - SDMMC card slot - Ampak SDIO WiFi 5/BT - NVME 2242 socket - 8 or 12GB of RAM - Goodix based touchscreen - Stereo speakers, internal microphone, and TRRS headphone jack. - Dual GPIO vibrators (implemented as gpio-pwm because they are quite strong) - Multiple face buttons, dual analog joysticks, and dual analog triggers - PWM fan with tach pin. The device also contains the following hardware that is partially or currently not working: - 1920x1080 DSI display - HDMI port - USB-C port with DP alt-mode - TI bq25703 charger controller Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20240829204517.398669-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-04dt-bindings: arm: rockchip: Add GameForce AceChris Morgan1-0/+5
Add devicetree binding for the GameForce Ace. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20240829204517.398669-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-04arm64: dts: rockchip: rk3588s fix sdio pins to pull upAlex Zhao1-5/+5
The sdio requires the cmd and data pins to pull up by soc. Signed-off-by: Alex Zhao <zzc@rock-chips.com> [adapted to pinctrl filename change] Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20240829204517.398669-2-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-04arm64: dts: rockchip: Add RGA2 support to rk3588Jianfeng Liu1-0/+11
RK3588 also features a RGA2 block. Add the necessary device tree node. Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Tested-by: Tim Surber <me@timsurber.de> Link: https://lore.kernel.org/r/20240831182424.758816-2-liujianfeng1994@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-04arm64: dts: rockchip: Add missing tshut props to tsadc on quartz64-bDiederik de Haas1-0/+2
Add the missing TSADC properties `rockchip,hw-tshut-mode` and `rockchip,hw-tshut-polarity` to the Pine64 Quartz64 Model B. This fixes the following warnings: rockchip-thermal fe710000.tsadc: Missing tshut mode property, using default (gpio) rockchip-thermal fe710000.tsadc: Missing tshut-polarity property, using default (low) Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20240831112949.60091-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-04arm64: dts: rockchip: Add Hardkernel ODROID-M2Jonas Karlman2-0/+904
The Hardkernel ODROID-M2 is a single-board computer based on Rockchip RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card, GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C. Add initial support for eMMC, SD-card, Ethernet, PCIe and USB. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240901112020.3224704-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-04dt-bindings: arm: rockchip: Add Hardkernel ODROID-M2Jonas Karlman1-0/+5
The Hardkernel ODROID-M2 is a single-board computer based on Rockchip RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card, GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C. Add devicetree binding documentation for the Hardkernel ODROID-M2 board. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240901112020.3224704-2-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-09-04arm64: dts: rockchip: drop hp-pin-name property from audio card on nanopc-t6Heiko Stuebner1-1/+0
The audio-card contains a hp-pin-name property that is not part of the binding, and its contents also are just a "Headphones" string. So that property also does not fullfill any specific use, therefore just drop it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240830203819.1972536-4-heiko@sntech.de
2024-08-30arm64: dts: rockchip: drop unsupported regulator-property from NanoPC-T6Heiko Stuebner1-1/+0
vcc3v3-sd-s0-regulator used enable-active-low. According the binding of the fixed regulator, that is the assumed mode of operation if enable-active-high is not specified. So this is property is not part of the binding, therefore remove it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240829132100.1723127-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-30arm64: dts: rockchip: drop unsupported regulator property from NanoPC-T6Heiko Stuebner1-1/+0
regulator-init-microvolt is used in the vendor-kernel, but not part of the specification. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240829132100.1723127-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-30arm64: dts: rockchip: use correct fcs,suspend-voltage-selector on NanoPC-T6Heiko Stuebner1-1/+1
A remant from moving from the vendor kernel, the regulator is using a fairchild fcs prefix instead of rockchip,* in the mainline kernel according to its binding. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240829132100.1723127-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: add Mask Rom key on NanoPC-T6Marcin Juszkiewicz1-0/+15
Mask Rom key is connected to SARADC and can be read from OS. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-9-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: enable USB-C on NanoPC-T6Marcin Juszkiewicz1-4/+72
Enable the USB-C port on FriendlyELEC NanoPC-T6. Works one way so far but still better than before. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-8-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: enable GPU on NanoPC-T6Marcin Juszkiewicz1-0/+5
Enable the Mali GPU on FriendlyELEC NanoPC-T6 Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-7-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: add IR-receiver to NanoPC-T6Marcin Juszkiewicz1-1/+14
FriendlyELEC NanoPC-T6 has IR receiver connected to PWM3_IR_M0 line which ends as GPIO0_D4. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-6-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: add SPI flash on NanoPC-T6Marcin Juszkiewicz1-0/+15
FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board. It is populated with 32MB one on LTS version. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: add NanoPC-T6 LTSMarcin Juszkiewicz2-0/+61
In the LTS (2310) version the miniPCIe slot got removed and USB 2.0 setup has changed. There are two external accessible ports and two ports on the internal header. There is an on-board USB hub which provides: - one external connector (bottom one) - two internal ports on pin header - one port for m.2 E connector The top USB 2.0 connector comes directly from the SoC. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-4-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: move NanoPC-T6 parts to DTSMarcin Juszkiewicz2-17/+23
MiniPCIe slot is present only in first version of NanoPC-T6 (2301). Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-3-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29arm64: dts: rockchip: prepare NanoPC-T6 for LTS boardMarcin Juszkiewicz2-930/+947
FriendlyELEC introduced a second version of NanoPC-T6 SBC. Create common include file and make NanoPC-T6 use it. Following patches will add LTS version. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-2-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29dt-bindings: arm: rockchip: Add NanoPC-T6 LTSMarcin Juszkiewicz1-2/+4
Add devicetree binding for the NanoPC-T6 LTS board. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-1-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28arm64: dts: rockchip: disable display subsystem only for Radxa E25Chukun Pan2-4/+4
The SoM board has reserved HDMI output, while the Radxa E25 is not connected. So disable the display subsystem only for Radxa E25. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20240820120020.469375-1-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28arm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK 5AFUKAUMI Naoki1-0/+30
Enable pcie2x1l2 and related combphy/regulator routed to M.2 E key connector on Radxa ROCK 5A. Tested with Radxa Wireless Module A8: $ lspci 0004:40:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) 0004:41:00.0 Network controller: Realtek Semiconductor Co., Ltd. RTL8852BE PCIe 802.11ax Wireless Network Controller $ ip l 1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00 2: end0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP mode DEFAULT group default qlen 1000 link/ether c2:58:fc:70:55:86 brd ff:ff:ff:ff:ff:ff 3: wlP4p65s0: <BROADCAST,MULTICAST> mtu 1500 qdisc noop state DOWN mode DEFAULT group default qlen 1000 link/ether 2c:05:47:65:5b:ed brd ff:ff:ff:ff:ff:ff $ lsusb Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 001 Device 002: ID 1a40:0101 Terminus Technology Inc. Hub Bus 001 Device 003: ID 0bda:b85b Realtek Semiconductor Corp. Bluetooth Radio Bus 002 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 004 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 005 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 006 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub Bus 006 Device 002: ID 0789:0336 Logitec Corp. LMD USB Device Bus 007 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 008 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub $ hciconfig hci0: Type: Primary Bus: USB BD Address: 2C:05:47:65:5B:EE ACL MTU: 1021:6 SCO MTU: 255:12 UP RUNNING RX bytes:2698 acl:0 sco:0 events:329 errors:0 TX bytes:69393 acl:0 sco:0 commands:329 errors:0 Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20240826080456.525-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28arm64: dts: rockchip: remove unnecessary properties for Radxa ROCK 5AFUKAUMI Naoki1-24/+0
There is no "on-board WLAN/BT chip" on Radxa ROCK 5A. remove related properties. Fixes: 1642bf66e270 ("arm64: dts: rockchip: add USB2 to rk3588s-rock5a") Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20240826075130.546-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28arm64: dts: rockchip: add dts for LCKFB Taishan Pi RK3566Junhao Xie2-0/+726
Add dts for LCKFB Taishan Pi. Working IO: * UART * RGB LED * AP6212 WiFi * AP6212 Bluetooth * SD Card * eMMC * HDMI * USB Type-C * USB Type-A Signed-off-by: Junhao Xie <bigfoot@classfun.cn> Link: https://lore.kernel.org/r/20240826110300.735350-1-bigfoot@classfun.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28dt-bindings: arm: rockchip: Add LCKFB Taishan Pi RK3566Junhao Xie1-0/+5
This documents LCKFB Taishan Pi which is a SBC based on the RK3566 SoC. Signed-off-by: Junhao Xie <bigfoot@classfun.cn> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240826044530.726458-3-bigfoot@classfun.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28dt-bindings: vendor-prefixes: Add Shenzhen JLC Technology Group LCKFBJunhao Xie1-0/+2
Add an entry for Shenzhen JLC Technology LCKFB (https://lckfb.com/) Signed-off-by: Junhao Xie <bigfoot@classfun.cn> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240826044530.726458-2-bigfoot@classfun.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28arm64: dts: rockchip: Add Hardkernel ODROID-M1SJonas Karlman2-0/+664
The Hardkernel ODROID-M1S is a single-board computer based on Rockchip RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card, GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0. Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240827211825.1419820-5-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28dt-bindings: arm: rockchip: Add Hardkernel ODROID-M1SJonas Karlman1-0/+5
The Hardkernel ODROID-M1S is a single-board computer based on Rockchip RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card, GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0. Add devicetree binding documentation for the Hardkernel ODROID-M1S board. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240827211825.1419820-4-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28arm64: dts: rockchip: Correct vendor prefix for Hardkernel ODROID-M1Jonas Karlman1-1/+1
The vendor prefix for Hardkernel ODROID-M1 is incorrectly listed as rockchip. Use the proper hardkernel vendor prefix for this board, while at it also drop the redundant soc prefix. Fixes: fd3583267703 ("arm64: dts: rockchip: Add Hardkernel ODROID-M1 board") Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20240827211825.1419820-3-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28dt-bindings: arm: rockchip: Correct vendor for Hardkernel ODROID-M1Jonas Karlman1-1/+1
The vendor prefix for Hardkernel ODROID-M1 is incorrectly listed as rockchip. Use the proper hardkernel vendor prefix for this board, while at it also drop the redundant soc prefix. Fixes: 19cc53eb2ce6 ("dt-bindings: rockchip: Add Hardkernel ODROID-M1 board") Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240827211825.1419820-2-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28arm64: dts: rockchip: Enable RK809 audio codec for Radxa ROCK 4C+Jonathan Liu1-1/+45
This adds the necessary device tree changes to enable analog audio output for the 3.5 mm TRS headphone jack on the Radxa ROCK 4C+ with its RK809 audio codec. Signed-off-by: Jonathan Liu <net147@gmail.com> Link: https://lore.kernel.org/r/20240828074755.1320692-1-net147@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28arm64: dts: rockchip: Add VPU121 support for RK3588Jianfeng Liu1-0/+21
Enable Hantro G1 video decoder in RK3588's devicetree. Tested with FFmpeg v4l2_request code taken from [1] with MPEG2, H.264 and VP8 samples. [1] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Tested-by: Hugh Cole-Baker <sigmaris@gmail.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240827181206.147617-3-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-28arm64: dts: rockchip: Add VEPU121 to RK3588Emmanuel Gil Peyrot1-0/+80
RK3588 has 4 Hantro G1 encoder-only cores. They are all independent IP, but can be used as a cluster (i.e. sharing work between the cores). These cores are called VEPU121 in the TRM. The TRM describes one more VEPU121, but that is combined with a Hantro H1. That one will be handled using the VPU binding instead. Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240827181206.147617-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-16arm64: dts: rockchip: add wolfvision pf5 visualizer displayMichael Riesch3-0/+139
Add device tree overlay for the WolfVision PF5 Visualizer display. Since there shall be additional variants of the WolfVision PF5 display in future, move common definitions to a device tree include file. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20240412-feature-wolfvision-pf5-display-v1-1-f032f32dba1a@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-15arm64: dts: rockchip: drop obsolete reset-names from rk356x rng nodeHeiko Stuebner1-1/+0
The reset-names property is not part of the binding, so drop it. It is also not used by the driver, so that property was likely a leftover from some vendor-kernel node. Fixes: afeccc408496 ("arm64: dts: rockchip: add DT entry for RNG to RK356x") Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240815162519.751193-1-heiko@sntech.de
2024-08-15arm64: dts: rockchip: add product-data eeproms to QNAP TS433Heiko Stuebner1-0/+20
The device contains two i2c-connected eeproms holding some product- specific values. One sitting on the mainboard and one on the statically connected backplane. While the eeprom chips themself have a size of 512 byte, the eeprom data only uses 256 byte each, probably to stay compatible with other models. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240810211438.286441-3-heiko@sntech.de
2024-08-15arm64: dts: rockchip: Add DTS for FriendlyARM NanoPi R2S PlusSergey Bostandzhyan2-0/+33
The R2S Plus is basically an R2S with additional eMMC. The eMMC configuration for the DTS has been extracted and copied from rk3328-nanopi-r2.dts, v2017.09 branch from the friendlyarm/uboot-rockchip repository. Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc> Link: https://lore.kernel.org/r/20240814170048.23816-2-jin@mediatomb.cc Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-15dt-bindings: arm: rockchip: Add NanoPi R2S PlusSergey Bostandzhyan1-0/+1
Add the NanoPi R2S Plus variant, which is an R2S with eMMC. Signed-off-by: Sergey Bostandzhyan <jin@mediatomb.cc> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240814170048.23816-3-jin@mediatomb.cc Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-11arm64: dts: rockchip: drop dr_mode for Radxa ZERO 3W/3EFUKAUMI Naoki1-1/+0
since dr_mode = "otg" can be used for USB gadget functions for U-Boot and Linux, there is no reason to set it to "peripheral". drop it. Fixes: 1a5c8d307c83 ("arm64: dts: rockchip: Add Radxa ZERO 3W/3E") Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20240802051508.498-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-11arm64: dts: rockchip: Raise Pinebook Pro's panel backlight PWM frequencyDragan Simic1-1/+1
Increase the frequency of the PWM signal that drives the LED backlight of the Pinebook Pro's panel, from about 1.35 KHz (which equals to the PWM period of 740,740 ns), to exactly 8 kHz (which equals to the PWM period of 125,000 ns). Using a higher PWM frequency for the panel backlight, which reduces the flicker, can only be beneficial to the end users' eyes. On top of that, increasing the backlight PWM signal frequency reportedly eliminates the buzzing emitted from the Pinebook Pro's built-in speakers when certain backlight levels are set, which cause some weird interference with some of the components of the Pinebook Pro's audio chain. The old value for the backlight PWM period, i.e. 740,740 ns, is pretty much an arbitrary value that was selected during the very early bring-up of the Pinebook Pro, only because that value seemed to minimize horizontal line distortion on the display, which resulted from the old X.org drivers causing screen tearing when dragging windows around. That's no longer an issue, so there are no reasons to stick with the old PWM period value. The lower and the upper backlight PWM frequency limits for the Pinebook Pro's panel, according to its datasheet, are 200 Hz and 10 kHz, respectively. [1] These changes still leave some headroom, which may have some positive effects on the lifetime expectancy of the panel's backlight LEDs. [1] https://files.pine64.org/doc/datasheet/PinebookPro/NV140FHM-N49_Rev.P0_20160804_201710235838.pdf Fixes: 5a65505a6988 ("arm64: dts: rockchip: Add initial support for Pinebook Pro") Cc: stable@vger.kernel.org Reported-by: Nikola Radojevic <nikola@radojevic.rs> Signed-off-by: Dragan Simic <dsimic@manjaro.org> Tested-by: Nikola Radojević <nikola@radojevic.rs> Link: https://lore.kernel.org/r/2a23b6cfd8c0513e5b233b4006ee3d3ed09b824f.1722805655.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10arm64: dts: rockchip: Add support for rk3588 based Cool Pi CM5 GenBookAndy Yan2-0/+350
Cool Pi CM5 GenBook works as a carrier board connect with CM5 [0]. Specification: - Rockchip RK3588 - LPDDR5X 8/32 GB - eMMC 64 GB - HDMI Type A out x 1 - USB 3.0 Host x 1 - USB-C 3.0 with DisplayPort AltMode - PCIE M.2 E Key for RTL8852BE Wireless connection - PCIE M.2 M Key for NVME connection - eDP panel with 1920x1080 This patch add basic support to bringup eMMC/USB HOST/WiFi/TouchPad/ Battery/PCIE NVME, and can also drive a HDMI output with out of tree hdmi patches. [0] https://www.crowdsupply.com/shenzhen-tianmao-technology-co-ltd/genbook-rk3588 Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20240730102433.540260-3-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10dt-bindings: arm: rockchip: Add Cool Pi CM5 GenBookAndy Yan1-0/+7
Add Cool Pi CM5 GenBook, a laptop powered by RK3588. Cool Pi GenBook works with a carrier board connect with CM5. Signed-off-by: Andy Yan <andyshrk@163.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20240730102433.540260-2-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10arm64: dts: rockchip: add rfkill node for M.2 E wifi on orangepi-5-plusFlorian Klink1-0/+7
This follows the same logic as 82d40b141a4c ("arm64: dts: rockchip: add rfkill node for M.2 Key E WiFi on rock-5b"). On the orangepi-5-plus, there's also a GPIO pin connecting the WiFi enable signal inside the M.2 Key E slot. The exact GPIO PIN can be validated in the Armbian rk-5.10-rkr4 kernel rk3588-orangepi-5-plus.dtsi file [1], which contains a `wifi_disable` node referencing RK_PC4 on &gpio0. With this change, I was able to get a "Intel Corporation Wi-Fi 6E(802.11ax) AX210/AX1675* 2x2 [Typhoon Peak] (rev 1a)" up, while `rfkill` previously only mentioned to be hardware blocked. [1] https://github.com/armbian/linux-rockchip/blob/9fbe23c9da24f236c6009f42d3f02c1ffb84c169/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts Signed-off-by: Florian Klink <flokli@flokli.de> Link: https://lore.kernel.org/r/20240808103052.1894764-1-flokli@flokli.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-10arm64: dts: rockchip: add DT entry for RNG to RK356xAurelien Jarno2-0/+14
Include the just added Rockchip RNG driver for RK356x SoCs and enable it on RK3568. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://lore.kernel.org/r/d2beb15377dc8b580ca5557b1a4a6f50b74055aa.1722355365.git.daniel@makrotopia.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-08arm64: dts: rockchip: actually enable pmu-io-domains on qnap-ts433Heiko Stuebner1-0/+1
Contrary to the vendor-kernel the pmu-io-domains are not enabled by default. This resulted in the value not being set according to the regulator, which in turn made the gmac0 interface that is connected to the vccio4 supply inoperable. Fixes: 64b7f16fb394 ("arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240805162052.3345768-1-heiko@sntech.de
2024-08-05arm64: dts: rockchip: Simplify network PHY connection on qnap-ts433Uwe Kleine-König1-3/+1
While it requires to have the right phy driver loaded (i.e. motorcomm) to make the phy asserting the right delays, this is generally the preferred way to define the MAC <-> PHY connection. Signed-off-by: Uwe Kleine-König <ukleinek@debian.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20240304084612.711678-2-ukleinek@debian.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-07-30arm64: dts: rockchip: Move RK3399 OPPs to dtsi files for SoC variantsDragan Simic31-3140/+3126
Rename the Rockchip RK3399 SoC dtsi files and, consequently, adjust their contents and the contents of the affected board dts(i) files appropriately, to "encapsulate" the different CPU and GPU OPPs for each of the supported RK3399 SoC variants into the respective SoC variant dtsi files. Moving the OPPs to the SoC variant dtsi files, instead of requiring the board dts(i) files to include both the SoC variant dtsi file and the right OPP variant dtsi file, reduces the possibility for mismatched inclusion and improves the overall hierarchical representation of data. These changes follow the approach used for the Rockchip RK3588 SoC variants, which was introduced and described further in commit def88eb4d836 ("arm64: dts: rockchip: Prepare RK3588 SoC dtsi files for per-variant OPPs"). Please see that commit for a more detailed explanation. No functional changes are introduced, which was validated by decompiling and comparing all affected dtb files before and after these changes. In more detail, all decompiled dtb files remain exactly the same, except the files list below, which results from all of them stemming from the same base board dtsi file (rk3399-rock-pi-4.dtsi), while all of them include one of the three different RK3399 SoC variant dtsi files by themselves: - rk3399-rock-4se.dtb - rk3399-rock-pi-4a.dtb - rk3399-rock-pi-4a-plus.dtb - rk3399-rock-pi-4b.dtb - rk3399-rock-pi-4b-plus.dtb - rk3399-rock-pi-4c.dtb When compared with the decompiled original dtb files, these dtb files have some of their blocks shuffled around a bit and some of their phandles have different values, as a result of the changes to the order in which the building blocks from the parent dtsi files are included into them, but they still effectively remain the same as the originals. The only exception to the "include only a SoC variant dtsi" is found in rk3399-evb.dts, which includes rk3399-base.dtsi instead of rk3399.dtsi. This is intentional, because this board dts file doesn't enable the TSADC, so including rk3399.dtsi would enable the SoC to go into higher OPPs with no thermal throttling in place. Let's hope that people interested in this board will fix this in the future. As a side note, due to the nature of introduced changes, this commit is best viewed using the --break-rewrites option for git-log(1). Related-to: def88eb4d836 ("arm64: dts: rockchip: Prepare RK3588 SoC dtsi files for per-variant OPPs") Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/9417b5c5b64f9aceea64530a85a536169a3e7466.1721532747.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-26 14:53:24 +0300