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2016-02-12drm/amdgpu/gfx7: rework gpu_init()Alex Deucher1-176/+182
Split the sw and hw parts into separate functions. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu/gfx: clean up harvest configuration (v2)Alex Deucher4-180/+82
Read back harvest configuration from registers and simplify calculations. No need to program the raster config registers. These are programmed as golden registers and the user mode drivers program them as well. v2: rebase on Tom's patches Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: fix coding style in amdgpu_ctx.cChristian König1-16/+15
Don't use pointer arithmetic and fix the indentation. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: nuke the kernel contextChristian König4-29/+7
Not used any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: use separate scheduler entity for VCE submissionsChristian König2-1/+16
This allows us to remove the kernel context and use a better priority for the submissions. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: use separate scheduler entity for UVD submissionsChristian König2-1/+15
This allows us to remove the kernel context and use a better priority for the submissions. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: use separate scheduler entitiy for buffer movesChristian König2-1/+20
This allows us to remove the global kernel context. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: use SDMA round robin for VM updates v3Christian König6-11/+43
Distribute the load on both rings. v2: use a loop for the initialization v3: agd: rebase on upstream Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: remove is_pte_ringChristian König4-4/+0
Not used for anything. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: use per VM entity for page table updates (v2)Christian König6-22/+51
Updates from different VMs can be processed independently. v2: agd: rebase on upstream Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu: remove the userptr rmn->lockChristian König1-20/+12
Avoid a lock inversion problem by just using the mmap_sem to protect the entries of the intervall tree. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
2016-02-12drm/amd/include: Update dce 8 headers for dalHarry Wentland2-0/+13
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu/gfx7: Fix whitespaceTom St Denis1-1/+1
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu/gfx7: Simplify wptr/rptr functionsTom St Denis1-19/+4
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu/gfx7: LOC reduction in gfx_v7_0_setup_rbTom St Denis1-7/+2
Reduce for loop with bitmask to simple complement and mask Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu/gfx7: Simplify bitmask creationTom St Denis1-7/+1
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12drm/amdgpu/gfx7: Reduce linecount in table initTom St Denis1-820/+525
Replaces switch statements with direct assignments to reduce line count significantly. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd/powerplay: add powerplay valid check to avoid null point.Rex Zhu1-3/+9
In case CONFIG_DRM_AMD_POWERPLAY is defined and amdgpu.powerplay=0. some functions in powrplay can also be called by DAL. and the input parameter is *adev. if just check point not NULL was not enough and will lead to NULL point error. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd/powerplay: Enable low mem pstate when cancel_highEric Yang1-1/+1
Signed-off-by: Eric Yang <eric.yang2@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd/powerplay: Use correct clock in cz_apply_state_adjust_rulesEric Yang1-2/+2
Signed-off-by: Eric Yang <eric.yang2@amd.com> Reviewed-by: Eagle Yeh <eagle.yeh@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd/powerplay: get real display device num by cgs interfaceRex Zhu1-9/+16
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd/powerplay: Use engine clock limit calculated by dalVitaly Prosyak1-3/+3
Use min required system clock calculated by dal Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd/powerplay: Make declarations of functions exposed to DAL type-safe.David Rokhvarg2-14/+16
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd/powerplay: implement functions in carrizo for DAL.Rex Zhu1-11/+115
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd/powerplay: export interface to DAL.Rex Zhu5-21/+251
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd/powerplay: change struct name.Rex Zhu6-8/+8
amd_pp_dal_clock_info to amd_pp_simple_clock_info. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amd: Adding IVSRC register headersHarry Wentland1-0/+102
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amdgpu: Move MMIO flip out of spinlocked regionVitaly Prosyak1-3/+3
Prior actual MMIO flip we need to acquire DAL mutex to guard our target state which get modified on reset mode. Assign page flip status before actual flip to handle the possible race condition with interrupt. Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-11drm/amdgpu: Don't crash system if we can't get crtcHarry Wentland1-0/+6
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: move sync into job objectChristian König13-38/+46
No need to keep that for every IB. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: send VCE IB tests directly to the ring againChristian König2-8/+22
We need the IB test for GPU resets as well and the scheduler should be stoped then. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: send UVD IB tests directly to the ring againChristian König5-15/+25
We need the IB test for GPU resets as well and the scheduler should be stoped then. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: rename amdgpu_sched.c to amdgpu_job.cChristian König2-5/+5
That's probably a better matching name. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: cleanup in kernel job submissionChristian König7-204/+111
Add a job_alloc_with_ib helper and proper job submission. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: send SDMA/GFX IB tests directly to the ring againChristian König5-18/+6
There is no point in sending them through the scheduler. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: directly return fence from ib_scheduleChristian König3-8/+12
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: move ring from IBs into jobChristian König14-44/+45
We can't submit to multiple rings at the same time anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: make pad_ib a ring function v3Christian König14-18/+41
The padding depends on the firmware version and we need that for BO moves as well, not only for VM updates. v2: new approach of making pad_ib a ring function v3: fix typo in macro name Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: cleanup user fence handling in the CSChristian König2-17/+13
Don't keep that around twice. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: add proper job alloc/free functionsChristian König6-55/+69
And use them in the CS instead of allocating IBs and jobs separately. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: fix num_ibs checkChristian König1-11/+5
Specifying no IBs on command submission is invalid, stop crashing badly when somebody tries it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: remove AMDGPU_NUM_SYNCSChristian König2-4/+1
Just a leftover from semaphores. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: remove adev and fence from amdgpu_sync_freeChristian König3-8/+3
Just leftovers from the semaphores. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: check userptrs mm earlierChristian König7-15/+27
Instead of when we try to bind it check the usermm when we try to use it in the IOCTLs. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/radeon: Avoid double gpu reset by adding a timeout on IB ring tests.Matthew Dawson9-23/+89
When the radeon driver resets a gpu, it attempts to test whether all the rings can successfully handle an IB. If these rings fail to respond, the process will wait forever. Another gpu reset can't happen at this point, as the current reset holds a lock required to do so. Instead, make all the IB tests run with a timeout, so the system can attempt to recover in this case. While this doesn't fix the underlying issue with card resets failing, it gives the system a higher chance of recovering. These timeouts have been confirmed to help both a Tathi and Hawaii card recover after a gpu reset. This also adds a new function, radeon_fence_wait_timeout, that behaves like fence_wait_timeout. It is used instead of fence_wait_timeout as it continues to work during a reset. radeon_fence_wait is changed to be implemented using this function. V2: - Changed the timeout to 1s, as the default 10s from radeon_wait_timeout was too long. A timeout of 100ms was tested and found to be too short. - Changed radeon_fence_wait_timeout to behave more like fence_wait_timeout. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Matthew Dawson <matthew@mjdsystems.ca> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu/gfx: minor code cleanupAlex Deucher2-28/+2
Drop needless function wrapper. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: separate pushing CS to schedulerChristian König1-46/+50
Move that out of the main IOCTL function. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: add amdgpu_set_ib_value helper (v2)Christian König3-8/+15
And use it in UVD/VCE command patching. v2: squash in Christian's fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu: fix size estimation for clear IBChristian König1-2/+2
We only need a few dw here. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10drm/amdgpu/smu: skip SMC ucode loading on SR-IOV capable boards (v2)Alex Deucher3-0/+18
VBIOS does this for us in asic_init. v2: update iceland as well Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-30 16:11:59 +0300