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2019-11-06drm/mediatek: Support reflect-x plane rotationSean Paul1-1/+9
Add support for REFLECT_X rotations. Cc: Fritz Koenig <frkoenig@chromium.org> Cc: Daniele Castagna <dcastagna@chromium.org> Cc: Miguel Casas <mcasas@chromium.org> Cc: Mark Yacoub <markyacoub@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-11-06drm/mediatek: Support reflect-y plane rotationSean Paul1-0/+42
Expose the rotation property and handle REFLECT_Y rotations. Cc: Fritz Koenig <frkoenig@chromium.org> Cc: Daniele Castagna <dcastagna@chromium.org> Cc: Miguel Casas <mcasas@chromium.org> Cc: Mark Yacoub <markyacoub@google.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-11-06drm/mediatek: Plumb supported rotation values from components to plane initSean Paul4-3/+27
This patch adds the ability for components to expose supported rotations which will be exposed to userspace via a plane rotation property. No functional changes in this patch. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-11-06drm/mediatek: Add plumbing for layer_check hookSean Paul4-0/+30
This allows components to implement a .layer_check callback for their layers which is called during atomic_check. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-11-06drm/mediatek: Add helper to get component for a planeSean Paul1-22/+34
Instead of hard-coding which components have planes, add a helper function to walk the components and map a plane index to a component layer. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-11-06drm/mediatek: Refactor plane initSean Paul1-18/+59
Add a couple of functions which enumerate the number of planes for a component and initialize the planes for a component. No functional changes in this patch, but it will allow us to selectively support rotation if the component supports it. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-11-06drm/mediatek: Add RGB[A] variants to published plane formatsSean Paul1-0/+6
These formats are handled in the rdma code, but for some reason they're not published as supported formats for the planes. So add them to the list. Cc: Nicolas Boichat <drinkcat@chromium.org> Cc: Daniele Castagna <dcastagna@chromium.org> Cc: Miguel Casas <mcasas@chromium.org> Tested-by: Miguel Casas <mcasas@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add no_clk into ddp private dataCK Hu1-6/+9
Mutex has no clock in some SoC, so add no_clk in private data and get clock according to no_clk. Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add mutex sof register offset into ddp private dataYongqiang Niu1-3/+10
mutex sof register offset will be private data of ddp Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add mutex sof into ddp private dataYongqiang Niu1-8/+35
mutex sof will be ddp private data Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add mutex mod register offset into ddp private dataYongqiang Niu1-8/+16
mutex mod register offset will be private data of ddp. Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add mutex mod into ddp private dataYongqiang Niu1-11/+30
except mutex mod, mutex mod reg,mutex sof reg, and mutex sof id will be ddp private data Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add ovl0/ovl_2l0 usecaseYongqiang Niu1-3/+34
This patch add ovl0/ovl_2l0 usecase in ovl->ovl_2l0 direct link usecase: 1. the crtc support layer number will 4+2 2. ovl_2l0 background color input select ovl0 when crtc init and disable it when crtc finish 3. config ovl_2l0 layer, if crtc config layer number is bigger than ovl0 support layers(max is 4) Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: distinguish ovl and ovl_2l by layer_nrYongqiang Niu1-3/+6
distinguish ovl and ovl_2l by layer_nr when get comp id Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add background color input select function for ovl/ovl_2lYongqiang Niu1-0/+22
This patch add background color input select function for ovl/ovl_2l ovl include 4 DRAM layer and 1 background color layer ovl_2l include 4 DRAM layer and 1 background color layer DRAM layer frame buffer data from render hardware, GPU for example. backgournd color layer is embed in ovl/ovl_2l, we can only set it color, but not support DRAM frame buffer. for ovl0->ovl0_2l direct link usecase, we need set ovl0_2l background color intput select from ovl0 if render send DRAM buffer layer number <=4, all these layer read by ovl. layer0 is at the bottom of all layers. layer3 is at the top of all layers. if render send DRAM buffer layer numbfer >=4 && <=6 ovl0 read layer0~3 ovl0_2l read layer4~5 layer5 is at the top ot all these layers. the decision of how to setting ovl0/ovl0_2l read these layer data is controlled in mtk crtc, which will be another patch Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add function to background color input select for ovl/ovl_2l ↵Yongqiang Niu1-0/+14
direct link This patch add function to background color input select for ovl/ovl_2l direct link for ovl/ovl_2l direct link usecase, we need set background color input select for these hardware. This is preparation patch for ovl/ovl_2l usecase. Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/medaitek: add layer_nr for ovl private dataYongqiang Niu1-1/+6
This patch add layer_nr for ovl private data ovl_2l almost same with with ovl hardware, except the layer number for ovl_2l is 2 and ovl is 4. this patch is a preparation for ovl-2l and ovl share the same driver. Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add gmc_bits for ovl private dataYongqiang Niu1-2/+21
This patch add gmc_bits for ovl private data GMC register was set RDMA ultra and pre-ultra threshold. 10bit GMC register define is different with other SOC, gmc_thrshd_l not used. Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add component OVL_2L1Yongqiang Niu2-0/+2
This patch add component OVL_2L1 Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add component OVL_2L0Yongqiang Niu3-0/+5
This patch add component OVL_2L0 Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add component DITHERYongqiang Niu2-0/+34
This patch add component DITHER Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add ddp component CCORRYongqiang Niu2-0/+34
This patch add ddp component CCORR Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07dt-bindings: mediatek: add mutex description for mt8183 displayYongqiang Niu1-0/+1
This patch add mutex description for mt8183 display Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07dt-bindings: mediatek: add dither description for mt8183 displayYongqiang Niu1-0/+1
Update device tree binding documention for the display subsystem for Mediatek MT8183 SOCs Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Reviewed-by: Rob Herring <robh at kernel.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07dt-bindings: mediatek: add ccorr description for mt8183 displayYongqiang Niu1-0/+1
Update device tree binding documention for the display subsystem for Mediatek MT8183 SOCs Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Reviewed-by: Rob Herring <robh at kernel.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07dt-bindings: mediatek: add ovl_2l description for mt8183 displayYongqiang Niu1-13/+14
Update device tree binding documention for the display subsystem for Mediatek MT8183 SOCs Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: add dphy reset after setting lanes numberJitao Shi1-0/+9
Add dphy reset after setting lanes number to avoid dphy fifo effor. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: adjust dsi and mipi_tx probe sequenceJitao Shi1-1/+1
mtk_mipi_tx is the phy of mtk_dsi. mtk_dsi get the phy(mtk_mipi_tx) in probe(). So, mtk_mipi_tx init should be ahead of mtk_dsi. Or mtk_dsi will defer to wait mtk_mipi_tx probe done. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: change the dsi phytiming calculate methodJitao Shi1-37/+81
Change the method of frame rate calc which can get more accurate frame rate. data rate = pixel_clock * bit_per_pixel / lanes Adjust hfp_wc to adapt the additional phy_data if MIPI_DSI_MODE_VIDEO_BURST hfp_wc = hfp * bpp - data_phy_cycles * lanes - 12 - 6; else hfp_wc = hfp * bpp - data_phy_cycles * lanes - 12; Note: //(2: 1 for sync, 1 for phy idle) data_phy_cycles = T_hs_exit + T_lpx + T_hs_prepare + T_hs_zero + 2; bpp: bit per pixel Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Tested-by: Ryan Case <ryandcase@chromium.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: add mt8183 dsi driver supportJitao Shi1-0/+8
Add mt8183 dsi driver data. Enable size control and reg commit control. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: add frame size controlJitao Shi1-0/+6
Our new DSI chip has frame size control. So add the driver data to control for different chips. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: add dsi reg commit disable controlJitao Shi1-0/+10
New DSI IP has shadow register and working reg. The register values are writen to shadow register. And then trigger with commit reg, the register values will be moved working register. This function is default on. But this driver doesn't use this function. So add the disable control. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: replace writeb() with mtk_dsi_mask()Jitao Shi1-1/+3
The writeb() is unavailable in mt8173. Because the mt8173 dsi module doesn't support 8bit mode access. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701Jitao Shi1-5/+22
Config the different CMDQ reg address in driver data. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: move mipi_dsi_host_register to probeJitao Shi1-22/+31
DSI panel driver need attach function which is include in mipi_dsi_host_ops. If mipi_dsi_host_register is not in probe, dsi panel will probe more delay. So move the mipi_dsi_host_register to probe from bind. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: add mipi_tx driver for mt8183Jitao Shi4-0/+153
This patch add mt8183 mipi_tx driver. And also support other chips that use the same binding and driver. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07drm/mediatek: separate mipi_tx to different fileJitao Shi4-315/+358
Different IC has different mipi_tx setting of dsi. This patch separates the mipi_tx hardware relate part for mt8173. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-07dt-bindings: display: mediatek: update dsi supported chipsJitao Shi1-2/+2
Update device tree binding documentation for the dsi for Mediatek MT8183 SoCs. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-09-30Linux 5.4-rc1Linus Torvalds1-2/+2
2019-09-30Merge tag 'for-5.4-rc1-tag' of ↵Linus Torvalds5-18/+58
git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux Pull btrfs fixes from David Sterba: "A bunch of fixes that accumulated in recent weeks, mostly material for stable. Summary: - fix for regression from 5.3 that prevents to use balance convert with single profile - qgroup fixes: rescan race, accounting leak with multiple writers, potential leak after io failure recovery - fix for use after free in relocation (reported by KASAN) - other error handling fixups" * tag 'for-5.4-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux: btrfs: qgroup: Fix reserved data space leak if we have multiple reserve calls btrfs: qgroup: Fix the wrong target io_tree when freeing reserved data space btrfs: Fix a regression which we can't convert to SINGLE profile btrfs: relocation: fix use-after-free on dead relocation roots Btrfs: fix race setting up and completing qgroup rescan workers Btrfs: fix missing error return if writeback for extent buffer never started btrfs: adjust dirty_metadata_bytes after writeback failure of extent buffer Btrfs: fix selftests failure due to uninitialized i_mode in test inodes
2019-09-30Merge tag 'csky-for-linus-5.4-rc1' of git://github.com/c-sky/csky-linuxLinus Torvalds17-212/+291
Pull csky updates from Guo Ren: "This round of csky subsystem just some fixups: - Fix mb() synchronization problem - Fix dma_alloc_coherent with PAGE_SO attribute - Fix cache_op failed when cross memory ZONEs - Optimize arch_sync_dma_for_cpu/device with dma_inv_range - Fix ioremap function losing - Fix arch_get_unmapped_area() implementation - Fix defer cache flush for 610 - Support kernel non-aligned access - Fix 610 vipt cache flush mechanism - Fix add zero_fp fixup perf backtrace panic - Move static keyword to the front of declaration - Fix csky_pmu.max_period assignment - Use generic free_initrd_mem() - entry: Remove unneeded need_resched() loop" * tag 'csky-for-linus-5.4-rc1' of git://github.com/c-sky/csky-linux: csky: Move static keyword to the front of declaration csky: entry: Remove unneeded need_resched() loop csky: Fixup csky_pmu.max_period assignment csky: Fixup add zero_fp fixup perf backtrace panic csky: Use generic free_initrd_mem() csky: Fixup 610 vipt cache flush mechanism csky: Support kernel non-aligned access csky: Fixup defer cache flush for 610 csky: Fixup arch_get_unmapped_area() implementation csky: Fixup ioremap function losing csky: Optimize arch_sync_dma_for_cpu/device with dma_inv_range csky/dma: Fixup cache_op failed when cross memory ZONEs csky: Fixup dma_alloc_coherent with PAGE_SO attribute csky: Fixup mb() synchronization problem
2019-09-30Merge tag 'armsoc-fixes' of ↵Linus Torvalds9-81/+66
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Olof Johansson: "A few fixes that have trickled in through the merge window: - Video fixes for OMAP due to panel-dpi driver removal - Clock fixes for OMAP that broke no-idle quirks + nfsroot on DRA7 - Fixing arch version on ASpeed ast2500 - Two fixes for reset handling on ARM SCMI" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: aspeed: ast2500 is ARMv6K reset: reset-scmi: add missing handle initialisation firmware: arm_scmi: reset: fix reset_state assignment in scmi_domain_reset bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle() ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux ARM: dts: am3517-evm: Fix missing video ARM: dts: logicpd-torpedo-baseboard: Fix missing video ARM: omap2plus_defconfig: Fix missing video bus: ti-sysc: Fix handling of invalid clocks bus: ti-sysc: Fix clock handling for no-idle quirks
2019-09-30Merge tag 'trace-v5.4-3' of ↵Linus Torvalds5-11/+30
git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace Pull tracing fixes from Steven Rostedt: "A few more tracing fixes: - Fix a buffer overflow by checking nr_args correctly in probes - Fix a warning that is reported by clang - Fix a possible memory leak in error path of filter processing - Fix the selftest that checks for failures, but wasn't failing - Minor clean up on call site output of a memory trace event" * tag 'trace-v5.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace: selftests/ftrace: Fix same probe error test mm, tracing: Print symbol name for call_site in trace events tracing: Have error path in predicate_parse() free its allocated memory tracing: Fix clang -Wint-in-bool-context warnings in IF_ASSIGN macro tracing/probe: Fix to check the difference of nr_args before adding probe
2019-09-30Merge tag 'mmc-v5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmcLinus Torvalds9-35/+410
Pull more MMC updates from Ulf Hansson: "A couple more updates/fixes for MMC: - sdhci-pci: Add Genesys Logic GL975x support - sdhci-tegra: Recover loss in throughput for DMA - sdhci-of-esdhc: Fix DMA bug" * tag 'mmc-v5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: host: sdhci-pci: Add Genesys Logic GL975x support mmc: tegra: Implement ->set_dma_mask() mmc: sdhci: Let drivers define their DMA mask mmc: sdhci-of-esdhc: set DMA snooping based on DMA coherence mmc: sdhci: improve ADMA error reporting
2019-09-30csky: Move static keyword to the front of declarationKrzysztof Wilczynski1-1/+1
Move the static keyword to the front of declaration of csky_pmu_of_device_ids, and resolve the following compiler warning that can be seen when building with warnings enabled (W=1): arch/csky/kernel/perf_event.c:1340:1: warning: ‘static’ is not at beginning of declaration [-Wold-style-declaration] Signed-off-by: Krzysztof Wilczynski <kw@linux.com> Signed-off-by: Guo Ren <guoren@kernel.org>
2019-09-30csky: entry: Remove unneeded need_resched() loopValentin Schneider1-4/+0
Since the enabling and disabling of IRQs within preempt_schedule_irq() is contained in a need_resched() loop, we don't need the outer arch code loop. Signed-off-by: Valentin Schneider <valentin.schneider@arm.com> Signed-off-by: Guo Ren <guoren@kernel.org>
2019-09-30Merge tag 'char-misc-5.4-rc1' of ↵Linus Torvalds1-8/+34
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull Documentation/process update from Greg KH: "Here are two small Documentation/process/embargoed-hardware-issues.rst file updates that missed my previous char/misc pull request. The first one adds an Intel representative for the process, and the second one cleans up the text a bit more when it comes to how the disclosure rules work, as it was a bit confusing to some companies" * tag 'char-misc-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: Documentation/process: Clarify disclosure rules Documentation/process: Volunteer as the ambassador for Intel
2019-09-30Merge branch 'work.misc' of ↵Linus Torvalds4-10/+2
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull more vfs updates from Al Viro: "A couple of misc patches" * 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: afs dynroot: switch to simple_dir_operations fs/handle.c - fix up kerneldoc
2019-09-30Merge tag '5.4-rc-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6Linus Torvalds14-26/+194
Pull more cifs updates from Steve French: "Fixes from the recent SMB3 Test events and Storage Developer Conference (held the last two weeks). Here are nine smb3 patches including an important patch for debugging traces with wireshark, with three patches marked for stable. Additional fixes from last week to better handle some newly discovered reparse points, and a fix the create/mkdir path for setting the mode more atomically (in SMB3 Create security descriptor context), and one for path name processing are still being tested so are not included here" * tag '5.4-rc-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6: CIFS: Fix oplock handling for SMB 2.1+ protocols smb3: missing ACL related flags smb3: pass mode bits into create calls smb3: Add missing reparse tags CIFS: fix max ea value size fs/cifs/sess.c: Remove set but not used variable 'capabilities' fs/cifs/smb2pdu.c: Make SMB2_notify_init static smb3: fix leak in "open on server" perf counter smb3: allow decryption keys to be dumped by admin for debugging
2019-09-30csky: Fixup csky_pmu.max_period assignmentMao Han1-1/+1
The csky_pmu.max_period has type u64, and BIT() can only return 32 bits unsigned long on C-SKY. The initialization for max_period will be incorrect when count_width is bigger than 32. Use BIT_ULL() Signed-off-by: Mao Han <han_mao@c-sky.com> Signed-off-by: Guo Ren <ren_guo@c-sky.com>
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