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2023-01-12arm64: dts: renesas: condor-i: add HS400 support for eMMCWolfram Sang1-0/+4
HS400 support for R-Car V3H ES2.0 has been fixed, so enable it on this board. Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230111094944.5996-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-01-12arm64: boot: dts: r8a774[a/b/e]1-beacon: Consolidate sound clocksAdam Ford4-63/+19
Each kit-level file represents a SOM + baseboard for a specific SoC type and uses specific clocks unique to each SoC. With the exception of one clock, the rest of the clock info was duplicated. There is a generic clock called CPG_AUDIO_CLK_I defined in each of the SoC DTSI files which points to this unique clock. By using that, the clock information for the rcar_sound can be consolidated into the baseboard file and have it reference this generic clock thus removing the duplication from the three variants. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230104141245.8407-4-aford173@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-01-12riscv: dts: renesas: rzfive-smarc-som: Enable OSTM nodesLad Prabhakar1-8/+0
Enable OSTM{1,2} nodes on RZ/Five SMARC SoM. Note, OSTM{1,2} nodes are enabled in the RZ/G2UL SMARC SoM DTSI [0] hence deleting the disabled nodes from RZ/Five SMARC SoM DTSI enables it here too as we include [0] in RZ/Five SMARC SoM DTSI. [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230102222233.274021-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-01-12arm64: dts: renesas: ulcb-kf: Fix pca9548 i2c-mux node namesGeert Uytterhoeven1-2/+2
"make dtbs_check": arch/arm64/boot/dts/renesas/r8a77951-ulcb-kf.dtb: i2c-switch@71: $nodename:0: 'i2c-switch@71' does not match '^(i2c-?)?mux' From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml arch/arm64/boot/dts/renesas/r8a77951-ulcb-kf.dtb: i2c-switch@71: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@4', 'i2c@7' were unexpected) From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml ... Fix this by renaming all PCA9548 nodes to "i2c-mux", to match the I2C bus multiplexer/switch DT bindings and the Generic Names Recommendation in the Devicetree Specification. While at it, rename the labels too, for uniformity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/3c32f500b99e598f458336dc4c05ffa60656324e.1669999298.git.geert+renesas@glider.be
2023-01-12arm64: dts: qcom: sc8280xp: Use MMCX for all DP controllersBjorn Andersson1-1/+1
While MDSS_GDSC is a subdomain of MMCX, Linux does not respect this relationship and sometimes invokes sync_state on the rpmhpd (MMCX) before the DisplayPort controller has had a chance to probe. The result when this happens is that the power is lost to the multimedia subsystem between the probe of msm_drv and the DisplayPort controller - which results in an irrecoverable state. While this is an implementation problem, this aligns the power domain setting of the one DP instance with that of all the others. Fixes: 57d6ef683a15 ("arm64: dts: qcom: sc8280xp: Define some of the display blocks") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230112135055.3836555-1-quic_bjorande@quicinc.com
2023-01-12arm64: dts: qcom: sc8280xp-crd: allow vreg_l3b to be disabledJohan Hovold1-1/+0
The vreg_l3b supply is used by the eDP, UFS and USB1 PHYs which are now described by the devicetree so that the regulator no longer needs to be marked always-on. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230112074503.12185-1-johan+linaro@kernel.org
2023-01-12arm64: dts: qcom: sm8450: Add TCSR halt register spaceMukesh Ojha1-0/+6
Add TCSR register space and refer it from scm node, so that it can be used by SCM driver. Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1673513697-30173-2-git-send-email-quic_mojha@quicinc.com
2023-01-12arm64: dts: qcom: sc8280xp: Vote for CX in USB controllersBjorn Andersson1-0/+2
Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, not doing so results in occasional lockups. This was previously hidden by the fact that the display stack incorrectly voted for CX (instead of MMCX). Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230112135117.3836655-1-quic_bjorande@quicinc.com
2023-01-11arm64: dts: qcom: sm8250: drop the virtual ipa-virt deviceDmitry Baryshkov1-7/+0
Drop the virtual ipa-virt device. The interconnects it provided are going to be represented as <&rpmhcc RPMH_IPA_CLK> clock. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109002935.244320-13-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: sm8150: drop the virtual ipa-virt deviceDmitry Baryshkov1-7/+0
Drop the virtual ipa-virt device. The interconnects it provided are going to be represented as <&rpmhcc RPMH_IPA_CLK> clock. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109002935.244320-12-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: pm7250b: Add BAT_ID vadc channelLuca Weiss1-0/+8
Add a node describing the ADC5_BAT_ID_100K_PU channel with the properties taken from downstream kernel. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230106-pm7250b-bat_id-v1-2-82ca8f2db741@fairphone.com
2023-01-11arm64: dts: qcom: msm8916: Add DMA for all I2C controllersStephan Gerhold1-0/+12
i2c-qup allows using DMA to speed up larger transfers. In msm8916.dtsi the DMA channels are already assigned to the SPI controllers but missing for I2C. Add them there as well. This also fixes confusing errors in dmesg for each I2C controller: i2c_qup 78b6000.i2c: tx channel not available Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107110958.5762-3-stephan@gerhold.net
2023-01-11arm64: dts: qcom: msm8916: Enable blsp_dma by defaultStephan Gerhold2-5/+0
Adding the "dmas" to the I2C controllers prevents probing them if blsp_dma is disabled (infinite probe deferral). Avoid this by enabling blsp_dma by default - it's an integral part of the SoC that is almost always used (even if just for UART). Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107110958.5762-2-stephan@gerhold.net
2023-01-11arm64: dts: qcom: msm8916-gplus-fl8005a: Add flash LEDLin, Meng-Bo1-0/+23
FL8005A uses Qualcomm GPIO flash LEDs which is compatible with SGM3140 Flash LED driver. Add it to the device tree. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107133235.139947-1-linmengbo0689@protonmail.com
2023-01-11arm64: dts: qcom: msm8916-gplus-fl8005a: Add touchscreenLin, Meng-Bo1-0/+42
FL8005A uses a Focaltech FT5402 touchscreen that is connected to blsp_i2c5. Add it to the device tree. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107133223.139893-1-linmengbo0689@protonmail.com
2023-01-11arm64: dts: qcom: msm8916-gplus-fl8005a: Add initial device treeLin, Meng-Bo2-0/+235
GPLUS FL8005A is a tablet using the MSM8916 SoC released in 2015. Add a device tree for with initial support for: - GPIO keys - GPIO LEDs - pm8916-vibrator - SDHCI (internal and external storage) - USB Device Mode - UART - WCNSS (WiFi/BT) - Regulators Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107133210.139839-1-linmengbo0689@protonmail.com
2023-01-11dt-bindings: qcom: Document msm8916-gplus-fl8005aLin, Meng-Bo1-0/+1
Document the new gplus,fl8005a device tree bindings used in its device tree. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107133158.139785-1-linmengbo0689@protonmail.com
2023-01-11dt-bindings: vendor-prefixes: Add GPLUSLin, Meng-Bo1-0/+2
Add vendor prefix for GPLUS. https://www.gplus.com.tw Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230107133145.139731-1-linmengbo0689@protonmail.com
2023-01-11arm64: dts: qcom: msm8996: mark apcs as clock providerDmitry Baryshkov1-0/+1
Now as we added the APCS clock controller support, mark apcs device as clock provider by adding #clock-cells property. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111191634.2509616-1-dmitry.baryshkov@linaro.org
2023-01-11ARM: dts: qcom: apq8026-samsung-matisse-wifi: Add display backlightMatti Lehtimäki1-0/+61
Uses ti,lp8556 backlight with clk-pwm. Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111183502.706151-1-matti.lehtimaki@gmail.com
2023-01-11arm64: dts: qcom: sa8540p-pmics: rename pmic labelsJohan Hovold1-12/+12
The SA8540P PMICs are named PMM8540. Rename the devicetree source labels to reflect this. Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Eric Chanudet <echanude@redhat.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111160335.7175-3-johan+linaro@kernel.org
2023-01-11arm64: dts: qcom: sa8540p-pmics: add missing interrupt includeJohan Hovold1-0/+1
Add the missing interrupt-controller include which is needed by the RTC node. Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Eric Chanudet <echanude@redhat.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111160335.7175-2-johan+linaro@kernel.org
2023-01-11arm64: dts: qcom: sc8280xp-x13s: enable eDP displayJohan Hovold1-2/+73
Enable the eDP display on MDSS0 DP3, including backlight control. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111133128.31813-1-johan+linaro@kernel.org
2023-01-11arm64: dts: qcom: sa8295-adp: Enable DP instancesBjorn Andersson1-2/+241
The SA8295P ADP has, among other interfaces, six MiniDP connectors which are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3. Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers, DP PHYs and link them all together. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111035906.2975494-4-quic_bjorande@quicinc.com
2023-01-11arm64: dts: qcom: sc8280xp-crd: Enable EDPBjorn Andersson1-1/+73
The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes and link it together with the backlight control. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111035906.2975494-3-quic_bjorande@quicinc.com
2023-01-11arm64: dts: qcom: sc8280xp: Define some of the display blocksBjorn Andersson1-0/+811
Define the display clock controllers, the MDSS instances, the DP phys and connect these together. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230111035906.2975494-2-quic_bjorande@quicinc.com
2023-01-11Revert "dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11"Bjorn Andersson1-8/+0
This reverts commit 92ad27fb925943d62deaaa659931ce85ddec99c8, as this was applied to the wrong branch and causes merge conflicts.
2023-01-11dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11Konrad Dybcio1-0/+8
Document SM6115P, an APQ version of SM6115. Document Lenovo Tab P11 (J606F) as a SM6115P device. Add SM6115 to the msm-id list of shame. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221208201401.530555-4-konrad.dybcio@linaro.org
2023-01-11arm64: dts: qcom: msm8996-oneplus-common: drop vdda-supply from DSI PHYDmitry Baryshkov1-1/+0
14nm DSI PHY has the only supply, vcca. Drop the extra vdda-supply. Fixes: 5a134c940cd3 ("arm64: dts: qcom: msm8996: add support for oneplus3(t)") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109042406.312047-1-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: sdm845-tama: Add volume up and camera GPIO keysMarijn Suijten1-4/+68
Tama has four GPIO-wired keys: two for camera focus and shutter / snapshot, and two more for volume up and down. As per the comment these used to not work because the necessary pin bias was missing, which is now set via pinctrl on pm8998_gpios. The missing bias has also been added to the existing volume down button, which receives a node name and label cleanup at the same time to be more consistent with other DTS and the newly added buttons. Its deprecated gpio-key,wakeup property has also been replaced with wakeup-source. Note that volume up is also available through the usual PON RESIN node, but unlike other platforms only triggers when the power button is held down at the same time making it unsuitable to serve as KEY_VOLUMEUP. Fixes: 30a7f99befc6 ("arm64: dts: qcom: Add support for SONY Xperia XZ2 / XZ2C / XZ3 (Tama platform)") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230109234133.365644-1-marijn.suijten@somainline.org
2023-01-11arm64: dts: qcom: sdm845: make DP node follow the schemaDmitry Baryshkov1-1/+0
Drop the #clock-cells (probably a leftover from the times before the DP PHY split) Fixes: eaac4e55a6f4 ("arm64: dts: qcom: sdm845: add displayport node") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230110042126.702147-1-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: msm8998: Use RPM XOKonrad Dybcio1-2/+2
Feed GCC and SDHC_2 with the RPM XO instead of the fixed-clock one. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230110143642.986799-1-konrad.dybcio@linaro.org
2023-01-11arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1Manivannan Sadhasivam1-6/+14
Both PCIe0 and PCIe1 controllers are capable of signalling the MSIs received from endpoint devices to the CPU using GIC-ITS MSI controller. Add support for it. Currently, BDF (0:0.0) and BDF (1:0.0) are enabled and with the msi-map-mask of 0xff00, all the 32 devices under these two busses can share the same Device ID. The GIC-ITS MSI implementation provides an advantage over internal MSI implementation using Locality-specific Peripheral Interrupts (LPI) that would allow MSIs to be targeted for each CPU core. It should be noted that the MSIs for BDF (1:0.0) only works with Device ID of 0x5980 and 0x5a00. Hence, the IDs are swapped. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # Xperia 1 IV (WCN6855) Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230102105821.28243-4-manivannan.sadhasivam@linaro.org
2023-01-11arm64: dts: qcom: add missing space before {Krzysztof Kozlowski11-11/+11
Add missingh whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221230140133.57885-2-krzysztof.kozlowski@linaro.org
2023-01-11ARM: dts: qcom: add missing space before {Krzysztof Kozlowski3-6/+6
Add missing whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221230140133.57885-1-krzysztof.kozlowski@linaro.org
2023-01-11arm64: dts: qcom: msm8998: get rid of test clockDmitry Baryshkov1-3/+1
The test clock apparently it's not used by anyone upstream. Remove it. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221228185237.3111988-17-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: sm8450: correct Soundwire wakeup interrupt nameKrzysztof Kozlowski1-1/+1
The bindings expect second Soundwire interrupt to be "wakeup" (Linux driver takes by index): sm8450-hdk.dtb: soundwire-controller@33b0000: interrupt-names:1: 'wakeup' was expected Fixes: 14341e76dbc7 ("arm64: dts: qcom: sm8450: add Soundwire and LPASS") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221223132121.81130-1-krzysztof.kozlowski@linaro.org
2023-01-11arm64: dts: qcom: pm8941-rtc add alarm registerEric Chanudet6-6/+7
A few descriptions including a qcom,pm8941-rtc describe two reg-names for the "rtc" and "alarm" register banks, but only one offset. For consistency with reg-names, add the "alarm" register offset. No functional change is expected from this. Signed-off-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219191000.2570545-5-echanude@redhat.com
2023-01-11arm64: dts: qcom: sa8295p-adp: use sa8540p-pmicsEric Chanudet1-78/+1
Include the dtsi to use a single pmic descriptions. Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently. Signed-off-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219191000.2570545-4-echanude@redhat.com
2023-01-11arm64: dts: qcom: sa8450p-pmics: add rtc nodeEric Chanudet1-0/+8
Add the rtc block on the first pmic to enable the rtc for sa8540p-ride. Signed-off-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219191000.2570545-3-echanude@redhat.com
2023-01-11arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmicsEric Chanudet2-1/+1
pm8450a.dtsi was introduced for the descriptions of pmics used on sa8540p based boards. Rename the dtsi to make this relationship explicit. Signed-off-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219191000.2570545-2-echanude@redhat.com
2023-01-11arm64: dts: qcom: sm8350: Drop standalone smem nodeKonrad Dybcio1-7/+3
SM8350 is one of the last SoCs whose DTSI escaped the smem node conversion. Use the newer memory-node binding instead of a memory *and* smem node. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219162618.873117-1-konrad.dybcio@linaro.org
2023-01-11arm64: dts: qcom: sm8450-hdk: add missing PMIC includesDmitry Baryshkov1-0/+4
Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks and thermal sensors available to the user of the platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221217003349.546852-6-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: sm8450-hdk: add pmic filesVinod Koul1-0/+3
SM8450 HDK features bunch of PMICs, add the PMICs which we have already upstream files Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221217003349.546852-5-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: sm8450-qrd: add missing PMIC includesDmitry Baryshkov1-0/+4
Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks and thermal sensors available to the user of the platform. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221217003349.546852-4-dmitry.baryshkov@linaro.org
2023-01-11arm64: dts: qcom: sm8450-qrd: add pmic filesVinod Koul1-0/+3
SM8450 QRD features bunch of PMICs, add the PMICs which we have already upstream files Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221217003349.546852-3-dmitry.baryshkov@linaro.org
2023-01-11dt-bindings: arm: qcom: add board-id/msm-id for MSM8956, SDM636 and SM4250Krzysztof Kozlowski1-0/+5
Allow qcom,board-id and qcom,msm-id leagcy properties on these older platforms: MSM8956, SDM636 and SM4250. Also mention more OnePlus devices using modified qcom,board-id field. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221214150605.173346-1-krzysztof.kozlowski@linaro.org
2023-01-11arm64: dts: qcom: replace underscores in node namesKrzysztof Kozlowski16-119/+119
Underscores should not be used in node names (dtc with W=2 warns about them), so replace them with hyphens. In few places adjust the name to match other nodes (e.g. xxx-regulator). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221214110448.86268-1-krzysztof.kozlowski@linaro.org
2023-01-11arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie with NVMeOwen Yang5-10/+50
Add DT for sc7280-herobrine-zombie with NVMe Signed-off-by: Owen Yang <ecs.taipeikernel@gmail.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221214114706.2.I1a0c709f8ec86cc5b38f0fe9f9b26694b1eb69d6@changeid
2023-01-11dt-bindings: arm: qcom: Add zombie with NVMeOwen Yang1-0/+12
Add entries in the device tree binding for sc7280-zombie with NVMe. Signed-off-by: Owen Yang <ecs.taipeikernel@gmail.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221214114706.1.Ie4ca64ad56748de5aacd36237d42c80dd003c1a9@changeid
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-28 19:31:40 +0300