summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2013-12-19ARM: shmobile: sh73a0: Specify PFC interrupts in DTLaurent Pinchart1-0/+9
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: r8a7740: Specify PFC interrupts in DTLaurent Pinchart1-0/+9
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: r8a73a4: Specify PFC interrupts in DTLaurent Pinchart1-0/+16
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIOLaurent Pinchart1-0/+1
The Armadillo 800 EVA panel module has a backlight enable signal connected to GPIO 61. Report this in the backlight DT node. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: armadillo: dts: Add PWM backlight power supplyLaurent Pinchart1-0/+10
Commit 22ceeee16eb8f0d04de3ef43a5174fb30ec18af9 ("pwm-backlight: Add power supply support") added a mandatory power supply for the PWM backlight. Add a fixed 5V regulator and reference it for the backlight power supply. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19Merge branch 'heads/soc2' into dt3-baseSimon Horman12-8/+356
2013-12-19arm: shmobile: clks: remove duplicated clock from r7s72100Wolfram Sang1-1/+0
Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: koelsch: Conditionally select MICREL_PHYSimon Horman1-0/+1
The koelsch board uses has an SH ethernet controller which uses a Micrel phy. Select MICREL_PHY for koelsch if SH_ETH is enabled to make use of the Micrel-specific phy driver rather than relying on the generic phy driver. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19Merge branch 'heads/sh-sci' into dt3-baseSimon Horman1-17/+22
2013-12-19Merge tag 'v3.13-rc3' into dt3-baseSimon Horman298-1339/+2461
Linux 3.13-rc3 Conflicts: drivers/pinctrl/sh-pfc/pfc-r8a7740.c drivers/pinctrl/sh-pfc/pfc-sh7372.c
2013-12-19Merge remote-tracking branch 'daniel-lezcano/clockevents/for-Simon-3.13-rc2' ↵Simon Horman307-1811/+5109
into dt3-base
2013-12-19Merge remote-tracking branch 'mike-turquette/clk-next-shmobile' into dt3-baseSimon Horman9-0/+850
2013-12-19Merge commit '70c8f01' into dt3-baseSimon Horman26-212/+3206
This is a commit from the for-next branch of Linus Walleij's pin control tre git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git It is the oldest commit in that branch that provides the dependencies needed for SoC changes to the usage of sh-pfc.
2013-12-19ARM: shmobile: rcar-gen2: Initialize CCF before clock sourcesLaurent Pinchart1-1/+7
When CONFIG_COMMON_CLOCK is enabled, call rcar_gen2_clocks_init() in the timer init function to initialize the common clock framework before initializing the clock sources. This will take care of clock initialization when the r8a779[01] boards will be switched to multiplatform kernels. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: r8a7791: Add clock index macros for DT sourcesLaurent Pinchart1-0/+105
Add macros usable by device tree sources to reference r8a7791 clocks by index. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: r8a7790: Add clock index macros for DT sourcesLaurent Pinchart1-0/+100
Add macros usable by device tree sources to reference r8a7790 clocks by index. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-18clocksource: sh_cmt: Add clk_prepare/unprepare supportLaurent Pinchart1-4/+16
Prepare the clock at probe time, as there is no other appropriate place in the driver where we're allowed to sleep. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-12-14ARM: shmobile: Add select MIGHT_HAVE_PCI for PCI-AHB bridge codeBen Dooks1-0/+4
The PCI sub-system is not enabled by default on ARM and on certain Renesas devices the build does not select it. This means that there are configurations that do not allow the AHB-PCI bridge used for the USB sub-systems to be built. For the R8A7790, R8A7791 and EMEV-2 select MIGHT_HAVE_PCI to allow the PCI drivers to be built. Also select MIGHT_HAVE_PCI for the multi-config where there may be many Reneasas devices selected. Reviewed-by: Ian Molton <ian.molton@codethink.co.uk> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-14serial: sh-sci: Convert to clk_prepare/unprepareLaurent Pinchart1-4/+4
Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and clk_disable_unprepare() to get ready for the migration to the common clock framework. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-14serial: sh-sci: Don't enable/disable port from within break timerLaurent Pinchart1-4/+8
The break timer accesses hardware registers and thus requires the port to be enabled. It currently ensures this by enabling the port at the beginning of the timer handler, and disabling it at the end. However, the enable/disable operations call the runtime PM sync functions, which are not allowed in atomic context. The current situation is thus broken. This change relies on non-atomic code to enable/disable the port. The break timer will only be started from the IRQ handler, which already runs with the port enabled. We just need to ensure that the port won't be disabled with the timer running, and that's easily done by just cancelling the timer in the port disable function. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-13clk: shmobile: Add MSTP clock supportLaurent Pinchart3-0/+281
MSTP clocks are gate clocks controlled through a register that handles up to 32 clocks. The register is often sparsely populated. Those clocks are found on Renesas ARM SoCs. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-13clk: shmobile: Add DIV6 clock supportLaurent Pinchart3-0/+214
DIV6 clocks are divider gate clocks controlled through a single register. The divider is expressed on 6 bits, hence the name, and can take values from 1/1 to 1/64. Those clocks are found on Renesas ARM SoCs. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-13clk: shmobile: Add R-Car Gen2 clocks supportLaurent Pinchart5-0/+355
The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are too custom to be supported in a generic driver. Those clocks can be divided in two categories: - Fixed rate clocks with multiplier and divisor set according to boot mode configuration - Custom divider clocks with SoC-specific divider values This driver supports both. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-12-13sh-pfc: Support GPIO to IRQ mapping specified IRQ resourcesLaurent Pinchart4-17/+82
On non-DT platforms IRQ controllers associated with the GPIOs have a fixed IRQ base value known at compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values are dynamic in that case. Fix this by specifying IRQs associated with GPIOs in IRQ resources, populated automatically from the device tree. When IRQ resources are specified the driver requires one IRQ resource per GPIO able to generate an interrupt, and uses the translation table to compute the IRQ resource offset instead of the IRQ number. Cc: devicetree@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-13sh-pfc: Rename sh_pfc window field to windowsLaurent Pinchart7-20/+21
There's more than one window, name the field windows. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-13sh-pfc: sh73a0: Sort IRQ entries by IRQ numberLaurent Pinchart1-24/+23
This makes catching duplicate entries easier. Merge the two IRQ9 entries found after sorting. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-13sh-pfc: sh73a0: Add missing IRQ15Laurent Pinchart1-0/+1
The external IRQ15 input multiplexed on GPIO 0 is missing. Add it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-13sh-pfc: Terminate gpios array by -1Laurent Pinchart2-4/+4
0 is a valid GPIO value, use -1 to terminate the gpios array in IRQ lists. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-13sh-pfc: Turn unsigned indices into unsigned intLaurent Pinchart2-5/+5
Some indices take positive values only, make them unsigned. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12pinctrl: pinconf: remove checks on ops->pin_config_getAlexandre Belloni1-16/+4
ops->pin_config_get() is only used in one specific path that will only be taken for generic pinconf drivers (ops->is_generic == true) when dumping the pinconf by using debugfs. By removing the check in pinconf_check_ops(), let's stop pressuring people to write a pin_config_get() function that will never be used and so will probably never be tested. Removing the check in pinconf_pins_show() allows driver to not implement pin_config_get() but still get a dump of the pinconf in debugfs by implementing pin_config_dbg_show(). Finally, not implementing pin_config_get() now results in returning -ENOTSUPP instead of -EINVAL. While this doesn't have any real impact for now, this feels more right. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12pinctrl: at91: initialize config parameter to 0Alexandre Belloni1-1/+2
When passing a not initialized config parameter, at91_pinconf_get() would return a bogus value. Fix that by initializing it to zero before using it. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12pinctrl: at91: correct a few typosAlexandre Belloni1-3/+3
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-12ARM: shmobile: koelsch: dts: Add gpio-keys deviceLaurent Pinchart1-0/+54
The board has 7 buttons connected to GPIOs, add a corresponding gpio-keys device. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12serial: sh-sci: Fix warnings due to improper casts and printk formatsLaurent Pinchart1-9/+10
Use the %zu and %pad printk specifiers to print size_t and dma_addr_t variables, and cast pointers to uintptr_t instead of unsigned int where applicable. This fixes warnings on platforms where pointers and/or dma_addr_t have a different size than int. Cc: linux-serial@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12ARM: shmobile: r8a7778: add USB Func DMAEngine supportKuninori Morimoto2-0/+20
HPB-DMAC has 2 channel for USB Func (= D0/D1) D0 is used as Tx, D1 is used as Rx on this patch Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12ARM: rcar-gen2: Do not setup timer in non-secure modeBen Dooks1-5/+16
If the system has been started in non-secure mode, then the ARM generic timer is not configurable during the kernel initialisation. Currently the only thing we can check for is if the timer has been correctly configured during the boot process. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Reviewed-by: Ian Molton <ian.molton@codethink.co.uk> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12ARM: shmobile: r8a7791: add Ether clockSergei Shtylyov1-0/+3
Add support for R8A7791 Ether clock. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12ARM: shmobile: r8a7778: camera-rcar header cleanupKuninori Morimoto2-1/+1
<linux/platform_data/camera-rcar.h> is needed on BockW, not setup-r8a7778.c Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12ARM: shmobile: kzm9g: add FSI support for DTSKuninori Morimoto1-0/+33
This patch support FSI-AK4648 with simple audio card Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12ARM: shmobile: sh73a0: add FSI support via DTSIKuninori Morimoto1-0/+9
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12ARM: shmobile: sh73a0: add FSI clock support for DTKuninori Morimoto1-0/+1
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12ARM: shmobile: r8a7790: add I2C supportKuninori Morimoto2-0/+29
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-11Merge branch 'pinmux/next/pfc' of git://linuxtv.org/pinchartl/fbdev into develLinus Walleij7-110/+705
2013-12-11pinctrl: make the MSM SoC driver depend on OFLinus Walleij1-0/+1
We had a compilation failure on x86_64 due to missing OF support as this was an implicit dependency. Add an explicit dependency on OF and OF_IRQ on the SoC driver. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-11ARM: shmobile: r8a7778: add SSIx DMAEngine supportKuninori Morimoto2-0/+69
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-10pinctrl: sh-pfc: pfc-r8a7790: Add VIN2 and VIN3 pinsValentine Barshak1-0/+168
There are VIN2 and VIN3 channels available on the R8A7790 SoC. VIN2 supports 4/8/16/18/24-bit data, while VIN3 supports 8-bit. Add both here, covering all possible data pin configurations. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2013-12-10pinctrl: sh-pfc: pfc-r8a7790: Add missing VIN1 pinsValentine Barshak1-8/+104
Both VIN0 and VIN1 channels support identical input interfaces. Add missing VIN1 pins here and organize them in the same pin groups as VIN0. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2013-12-10pinctrl: sh-pfc: pfc-r8a7790: Reorganize VIN0 data pinsValentine Barshak1-30/+95
This reorganizes and renames VIN0 data pin groups to cover all possible configurations. There's total of eight data pin groups, one per each configuration. Most of the groups share the same pin/mux array. Only the 18-bit configuration needs a separate pin/mux array since in combines interleaved data pins. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2013-12-10pinctrl: sh-pfc: pfc-r8a7790: Group VIN0 HSYNC and VSYNC togetherValentine Barshak1-12/+6
This groups VIN0 HSYNC and VSYNC pins together since one cannot be used without another. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2013-12-10pinctrl: sh-pfc: pfc-r8a7790: Rename VIN pin groupsValentine Barshak1-16/+16
This drops superfluous "signal" word from the pin group names and renames data_enable group to clkenb as in the h/w manual. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-27 07:41:34 +0300