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2022-09-02Merge tag 'renesas-arm-dt-for-v6.1-tag1' of ↵Arnd Bergmann35-639/+1198
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v6.1 - SDHI and eMMC support for the R-Car S4-8 SoC and the Spider development board, - Timer (CMT and TMU) and SPI (MSIOF) support for the R-Car S4-8 SoC, - External and GPIO interrupt support for the RZ/G2L and RZ/V2L SoCs, - Initial support for the R-Car H3Ne-1.7G (R8A779MB) SoC, - SPI DMA support for the RZ/G2UL, RZ/G2L, and RZ/V2L SoCs, - Pin control and I2C support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit, - initial support for the R-Car V3H2 (R8A77980A) SoC and the Condor-I development board, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v6.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (33 commits) arm64: dts: renesas: Add V3H2 Condor-I board support arm64: dts: renesas: Add r8a77980a.dtsi arm64: dts: renesas: Add condor-common.dtsi arm64: dts: renesas: Drop clock-names property from RPC node arm64: dts: renesas: r8a779f0: Add MSIOF nodes arm64: dts: renesas: r8a774a1: Put I2C aliases to board files arm64: dts: renesas: r8a774e1: Rename i2c_dvfs to iic_pmic arm64: dts: renesas: r8a779a0: Put I2C aliases to board files arm64: dts: renesas: r8a77990: Put I2C aliases to board files arm64: dts: renesas: r8a77980: Put I2C aliases to board files arm64: dts: renesas: r8a77970: Put I2C aliases to board files arm64: dts: renesas: r8a779{51|60|65}: Put I2C aliases to board files arm64: dts: renesas: rzv2m evk: Enable i2c arm64: dts: renesas: r9a09g011: Add i2c nodes arm64: dts: renesas: r9a09g011: Add pinctrl node arm64: dts: renesas: r9a07g043: Fix SCI{Rx,Tx} interrupt types arm64: dts: renesas: r9a07g054: Fix SCI{Rx,Tx} interrupt types arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types arm64: dts: renesas: r9a07g043: Fix audio clk node names arm64: dts: renesas: r9a07g054: Add DMA support to RSPI ... Link: https://lore.kernel.org/r/cover.1662111128.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-02Merge tag 'at91-dt-6.1' of ↵Arnd Bergmann5-42/+268
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for v6.1 It contains: - one new LAN966X based board, namely lan966x-pcb8290 - gpio leds support for lan966x-pcb8291 and lan966x-pcb8309 - a cleanup for sam9x60ek to avoid DT compilation warning due to regulators * tag 'at91-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: lan966x: add led configuration ARM: dts: at91: sam9x60ek: remove simple-bus for regulators ARM: dts: lan966x: add support for pcb8290 Link: https://lore.kernel.org/r/20220902085845.4193579-1-claudiu.beznea@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-02arm64: dts: renesas: Add V3H2 Condor-I board supportKuninori Morimoto2-0/+16
This patch adds r8a77980A V3H2 (= r8a77980 ES2) Condor-I board basic support. Signed-off-by: Andrey Dolnikov <andrey.dolnikov@cogentembedded.com> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87y1v64nko.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02arm64: dts: renesas: Add r8a77980a.dtsiKuninori Morimoto1-0/+11
This patch adds r8a77980A V3H2 (= r8a77980 ES2) basic SoC support. It is using r8a77980 (= V3H) setting as-is for now. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87zgfm4nkw.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02arm64: dts: renesas: Add condor-common.dtsiKuninori Morimoto2-539/+549
We have V3H Condor board, and will have V3H2 Condor-I board. This patch adds condor-common.dtsi to share the common settings between these boards. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/871qsy625m.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02arm64: dts: renesas: Drop clock-names property from RPC nodeLad Prabhakar7-7/+0
With 'unevaluatedProperties' support implemented, there are a number of warnings when running dtbs_check: arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: spi@ee200000: Unevaluated properties are not allowed ('clock-names' was unexpected) From schema: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml The main problem is that the DT bindings do not allow clock-names. So just drop the clock-names properties from the SoC DTSI files. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220829215128.5983-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02ARM: dts: lan966x: add led configurationHoratiu Vultur2-0/+56
Add led configuration for pcb8291 and pcb8309. Both pcbs have 4 leds which are connected to the sgpio controller. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220902062447.443846-1-horatiu.vultur@microchip.com
2022-09-01arm64: dts: ti: k3-am642-sk: Add DT entry for onboard LEDsAparna M1-0/+77
AM642 SK has 8 leds connected to tpic2810 onboard. Add support for these gpio leds. Signed-off-by: Aparna M <a-m1@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220830123254.522222-1-vigneshr@ti.com
2022-09-01arm64: dts: ti: k3-j7200-mcu-wakeup: Add SA2UL nodeAndrew Davis1-0/+20
J7200 has an instance of SA2UL in the MCU domain. Add DT node for the same. The device is marked TI_SCI_PD_SHARED as parts of this IP are also shared with the security co-processor and OP-TEE. The RNG node is added but marked disabled as it is firewalled off for exclusive use by OP-TEE. Any access to this device from Linux will result in firewall errors. We add the node for completeness of the hardware description. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20220823001136.10944-4-afd@ti.com
2022-09-01arm64: dts: ti: k3-am65-main: Do not exclusively claim SA2ULAndrew Davis1-1/+1
The SA2UL hardware is also used by SYSFW and OP-TEE. It should be requested using the shared TI-SCI flags instead of the exclusive flags or the request will fail. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20220823001136.10944-3-afd@ti.com
2022-09-01arm64: dts: ti: k3-am65-main: Move SA2UL to unused PSI-L thread IDAndrew Davis1-2/+2
The first TX and first two RX PSI-L threads for SA2UL are used by SYSFW on High Security(HS) devices. Use the next available threads to prevent resource allocation conflicts. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20220823001136.10944-2-afd@ti.com
2022-09-01arm64: dts: ti: k3-am65-main: Disable RNG nodeAndrew Davis1-0/+1
The hardware random number generator is used by OP-TEE and is access is denied to other users with SoC level bus firewalls. Any access to this device from Linux will result in firewall errors. We could remove this node, but it is still valid device description, and it is possible it could be re-enabled in the bootloader if OP-TEE is not used. So only disable this node for now. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20220823001136.10944-1-afd@ti.com
2022-09-01arm64: dts: ti: k3-j7200-main: Add main domain watchdog entriesGowtham Tammana1-0/+18
Add DT entries for main domain watchdog instances. Signed-off-by: Gowtham Tammana <g-tammana@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20220822235006.7081-1-afd%40ti.com
2022-09-01arm64: dts: ti: k3-am64-main: Add ELM (Error Location Module) nodeRoger Quadros3-0/+17
The ELM module is used for GPMC NAND accesses for detecting and correcting errors during reads due to NAND bitflips errors. 4-, 8-, and 16-bit error-correction levels are supported using the BCH (Bose-ChaudhurI-Hocquenghem) algorithm. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220802104456.11069-3-rogerq@kernel.org
2022-09-01arm64: dts: ti: k3-am64-main: Add GPMC memory controller nodeRoger Quadros3-0/+27
The GPMC is a unified memory controller dedicated for interfacing with external memory devices like - Asynchronous SRAM-like memories and ASICs - Asynchronous, synchronous, and page mode burst NOR flash - NAND flash - Pseudo-SRAM devices Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220802104456.11069-2-rogerq@kernel.org
2022-09-01arm64: dts: ti: k3-j721e-main: fix RNG node clock idDaniel Parks1-1/+1
The RNG node for this platform claims pka_in_clk. Change it to claim the correct clock x1_clk. [1] [1]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721e/clocks.html#clocks-for-sa2-ul0-device Signed-off-by: Daniel Parks <danielrparks@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/f29e2c65dc7310a926af8a676651592afac04b03.1659981162.git.danielrparks@ti.com
2022-09-01arm64: dts: ti: k3-am64-main: Enable crypto acceleratorPeter Ujfalusi1-0/+20
Add the node for SA2UL. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> [s-anna@ti.com: drop label, minor cleanups] Signed-off-by: Suman Anna <s-anna@ti.com> [j-choudhary@ti.com: disable rng-node, change flag to shared] Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com> Link: https://lore.kernel.org/r/20220711085743.10128-3-j-choudhary@ti.com
2022-09-01arm64: dts: ti: k3-am64: Add SA2UL address space to Main CBASS rangesSuman Anna1-0/+1
Add the address space for the SA2UL in MAIN domain to the ranges property of the cbass_main interconnect node so that the addresses within the corresponding sram nodes and its children can be translated properly by the relevant OF address API. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com> Link: https://lore.kernel.org/r/20220711085743.10128-2-j-choudhary@ti.com
2022-09-01arm64: dts: ti: k3-am64-main: Add main_cpts labelChristian Gmeiner1-1/+1
Makes it easier to reference the node in board dts files. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20220822095943.18563-1-christian.gmeiner@gmail.com
2022-08-31dt-bindings: arm: ti: k3: Sort the SoC definitions alphabeticallyNishanth Menon1-21/+21
Use alphabetical sort to organize the SoCs Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220830160507.7726-3-nm@ti.com
2022-08-31dt-bindings: arm: ti: k3: Sort the am654 board enumsNishanth Menon1-3/+3
Use alphabetical sort to organize the am654 board names. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220830160507.7726-2-nm@ti.com
2022-08-31arm64: dts: mediatek: Fix build warnings of mt8173 vcodec nodesTinghan Shen1-2/+2
Correct the phandle of power domain node referenced by vcodec nodes. arch/arm64/boot/dts/mediatek/mt8173.dtsi:1450.35-1471.5: Warning (power_domains_property): /soc/vcodec@18002000: Missing property '#power-domain-cells' in node /soc/syscon@10006000 or bad phandle (referred from power-domains[0]) arch/arm64/boot/dts/mediatek/mt8173.dtsi:1502.35-1522.5: Warning (power_domains_property): /soc/vcodec@19002000: Missing property '#power-domain-cells' in node /soc/syscon@10006000 or bad phandle (referred from power-domains[0]) Fixes: d3dfd4688574 ("arm64: dts: mediatek: Update mt81xx scpsys node to align with dt-bindings") Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Link: https://lore.kernel.org/r/20220831065100.27722-1-tinghan.shen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-30arm64: dts: mediatek: Add missing xHCI clocks for mt8192 and mt8195Nícolas F. R. A. Prado2-7/+20
The MediaTek xHCI dt-binding expects a specific order for the clocks, but the mt8192 and mt8195 devicetrees were skipping some of the middle clocks. These clocks are wired to the controller hardware but aren't controllable. Add the missing clocks as handles to fixed clocks, so that the clock order is respected and the dtbs_check warnings are gone. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220708194314.56922-1-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-30arm64: dts: renesas: r8a779f0: Add MSIOF nodesDuc Nguyen1-0/+64
Add MSIOF nodes for R-Car S4-8. Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com> [thanh: added DMA] Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com> [wsa: removed mso clock from clocks-property] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220829124130.2412-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-30dt-bindings: arm: renesas: Document Renesas R-Car V3H2 SoC and boardKuninori Morimoto1-0/+7
This patch adds the new R-Car V3H2 SoC and the Condor-I board using it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87wnaq4nkh.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: mt8192: Add dsi nodeAllen-KH Cheng1-0/+19
Add dsi node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-6-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: mt8192: Add display nodesAllen-KH Cheng1-0/+146
Add display nodes and gce info for mt8192 SoC. GCE (Global Command Engine) properties to the display nodes in order to enable the usage of the CMDQ (Command Queue), which is required for operating the display. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-5-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: mediatek: Add mmsys #reset-cells property for mt8192Allen-KH Cheng1-0/+2
To support reset of mmsys, we include mt8192-resets.h and add property of #reset-cells in mmsys. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-4-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: mt8192: Add mipi_tx nodeAllen-KH Cheng1-0/+10
Add mipi_tx node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-3-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: mt8192: Add pwm nodeAllen-KH Cheng1-0/+11
Add pwm node for mt8192 SoC. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220712114046.15574-2-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29arm64: dts: Add MediaTek MT8186 dts and evaluation board and MakefileAllen-KH Cheng3-0/+1040
MT8186 is a SoC based on 64bit ARMv8 architecture. It contains 6 CA55 and 2 CA76 cores. MT8186 share many HW IP with MT65xx series. We add basic chip support for MediaTek MT8186 on evaluation board. Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com> Link: https://lore.kernel.org/r/20220825170448.17024-1-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-08-29ARM: dts: at91: sam9x60ek: remove simple-bus for regulatorsClaudiu Beznea1-42/+36
Keep regulators as individual devices. There is no need to have them under simple bus. This will throw compilation warnings like: - unnecessary #address-cells/#size-cells without "ranges" or child "reg" property. - node has a unit name, but no reg or ranges property. While at it move it down a bit in the file to keep entries sorted alphabetically. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220826083927.3107272-10-claudiu.beznea@microchip.com
2022-08-29ARM: dts: lan966x: add support for pcb8290Horatiu Vultur2-0/+176
Add basic support for pcb8290. It has 2 lan8814 phys(each phy is a quad-port) on the external MDIO bus and no SFP ports. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220825065135.1075049-1-horatiu.vultur@microchip.com
2022-08-29arm64: dts: rockchip: specify pinctrl for i2c adapters on rock-3aMichael Riesch1-0/+12
On the Radxa ROCK3 Model A the I2C adapters related to the MIPI DSI connector and the M.2/NGFF connector use the non-default pins. Specify the correct pinctrl but leave the adapters disabled (as they are supposed to be activated by overlays that describe the external hardware). Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220712133204.2524942-3-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-08-29arm64: dts: rockchip: add vcc_mipi regulator to rock-3aMichael Riesch1-0/+22
The Radxa ROCK3 Model A features a voltage regulator that provides a 3V3 supply to the MIPI DSI connector. Add this regulator to the device tree of the board. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220712133204.2524942-2-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-08-29arm64: dts: rockchip: add vcc_cam regulator to rock-3aMichael Riesch1-0/+22
The Radxa ROCK3 Model A features a voltage regulator that provides a 3V3 supply to the MIPI CSI connector. Add this regulator to the device tree of the board. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220712133204.2524942-1-michael.riesch@wolfvision.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-08-29Merge tag 'gemini-dts-v6.1-1' of ↵Arnd Bergmann2-33/+4
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt Gemini DTS updates for kernel v6.1: - Enable Gigabit ethernet on SSI1328 and NS2502 - Modify NS2502 us use RedBoot partition parsing * tag 'gemini-dts-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: Let Gemini NS2502 parse redboot partitions ARM: dts: gemini: ssi1328: permit to use gigabit ARM: dts: gemini: ns2502: permit to use gigabit Link: https://lore.kernel.org/r/CACRpkdZt58ExwG+6EicODLhuVc8NSgCGUj4uNQmtnES8Cnf5uQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-08-29arm64: dts: meson-sm1-sei610: Remove 'enable-active-low'Fabio Estevam1-1/+0
The 'enable-active-low' property is not a valid one. Only 'enable-active-high' is valid, and when this property is absent the gpio regulator will act as active low by default. Remove the invalid 'enable-active-low' property. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220827203813.1742715-2-festevam@denx.de
2022-08-29arm64: dts: meson-g12a: Remove 'enable-active-low'Fabio Estevam1-1/+0
The 'enable-active-low' property is not a valid one. Only 'enable-active-high' is valid, and when this property is absent the gpio regulator will act as active low by default. Remove the invalid 'enable-active-low' property. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220827203813.1742715-1-festevam@denx.de
2022-08-29arm64: dts: renesas: r8a774a1: Put I2C aliases to board filesWolfram Sang3-11/+16
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-7-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a774e1: Rename i2c_dvfs to iic_pmicGeert Uytterhoeven1-1/+1
As RZ/G2 SoCs do not support DVFS, the "iic-dvfs" module was renamed to "iic-pmic" in the RZ/G Series, 2nd Generation User’s Manual: Hardware Rev. 1.00. See also commit a636d8037ef6028a ("arm64: dts: renesas: rzg2: Rename i2c_dvfs to iic_pmic"), which apparently forgot to update RZ/G2H. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/7d60653d4d63904dc025a133297a53eb885fa064.1661525361.git.geert+renesas@glider.be
2022-08-29arm64: dts: renesas: r8a779a0: Put I2C aliases to board filesWolfram Sang2-10/+7
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-6-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a77990: Put I2C aliases to board filesWolfram Sang2-11/+8
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a77980: Put I2C aliases to board filesWolfram Sang3-9/+12
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-4-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a77970: Put I2C aliases to board filesWolfram Sang3-8/+10
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a779{51|60|65}: Put I2C aliases to board filesWolfram Sang5-33/+16
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: rzv2m evk: Enable i2cPhil Edworthy1-0/+27
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Link: https://lore.kernel.org/r/20220819193944.337599-4-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r9a09g011: Add i2c nodesPhil Edworthy1-0/+28
Add device nodes for the I2C controllers that are not assigned to the ISP. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Link: https://lore.kernel.org/r/20220819193944.337599-3-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a779g0: Fix HSCIF0 interrupt numberGeert Uytterhoeven1-1/+1
The interrupt number for the HSCIF0 serial port, which serves as the serial console on the White Hawk board, is incorrect, causing userspace to hang immediately as soon as it tries to print something. Kernel output is unaffected, as it is printed using polling. Fixes: 987da486d84a5643 ("arm64: dts: renesas: Add Renesas R8A779G0 SoC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/751dcef40d4534e856ed49b1d5b3a3e8d365ec42.1661419377.git.geert+renesas@glider.be
2022-08-29Linux 6.0-rc3Linus Torvalds1-1/+1
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-28 05:59:43 +0300