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2022-09-17arm64: dts: imx8ulp: no executable source file permissionMarcel Ziswiler1-0/+0
This fixes the following error: arch/arm64/boot/dts/freescale/imx8ulp-pinfunc.h: error: do not set execute permissions for source files Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: Add SNVS LPGPRMarek Vasut1-0/+5
Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store e.g. boot counter. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-msc-sm2s: Add device trees for MSC SM2S-IMX8PLUS SoM and ↵Martyn Welch4-0/+941
carrier board Add device trees for one of a number of MSC's (parent company, Avnet) variants of the SM2S-IMX8PLUS system on module along with the compatible SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of SoMs use the NXP i.MX8MP SoC and provide the SMARC module interface. Signed-off-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm: Fix typo in license text for Engicam boardsJagan Teki3-3/+3
Fix the Amarula Solutions typo mistake in license text for Engicam i.MX8M boards add in below commits. commit <60ac35268f85b> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM") commit <aec8ad34f7f24> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit") commit <eefe06b295087> ("arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8-ss-dma: add IPG clock for i2cPeng Fan1-8/+12
i.MX8 LPI2C requires both PER and IPG clock, so add the missed IPG clk. Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: Add support for Kontron SL/BL i.MX8MM OSM-SFrieder Schrempf3-0/+707
This adds support for the Kontron Electronics SL i.MX8MM OSM-S SoM and the matching baseboard BL i.MX8MM OSM-S. The SoM hardware complies to the Open Standard Module (OSM) 1.0 specification, size S (https://sget.org/standards/osm). Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-kontron: Add SPI NOR partition layoutFrieder Schrempf1-0/+21
This is the layout used by the bootloader. Add it to the kernel devicetree to make the same layout available in Linux and have the devicetrees synced. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-kontron: Use voltage rail names from schematic for PMIC ↵Frieder Schrempf1-11/+11
regulator-names Improve the naming of the regulators to contain the voltage rail names from the schematic. Suggested-by: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-kontron: Remove low DDRC operating pointFrieder Schrempf1-4/+0
For some reason there is a problem with finding a DDR configuration that works on all operating points and all LPDDR4 types used on the SoM. Therefore the bootloader currently doesn't configure the lowest of the three operating points. Let's also skip this in the kernel devicetree to make sure it isn't used. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-kontron: Use the VSELECT signal to switch SD card IO voltageFrieder Schrempf2-2/+3
It turns out that it is not necessary to declare the VSELECT signal as GPIO and let the PMIC driver set it to a fixed high level. This switches the voltage between 3.3V and 1.8V by setting the PMIC register for LDO5 accordingly. Instead we can do it like other boards already do and simply mux the VSELECT signal of the USDHC interface to the pin. This makes sure that the correct voltage is selected by setting the PMIC's SD_VSEL input to high or low accordingly. Reported-by: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-kontron: Adjust compatibles, file names and model stringsFrieder Schrempf3-6/+6
The official naming includes "SL" (SoM-Line) or "BL" (Board-Line). By updating we make sure, that we can maintain this more easily in future and make sure that the proper devicetree can be selected for the hardware. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: add VPU blk ctrl nodePeng Fan1-0/+17
Add i.MX8MP VPU blk ctrl node Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: add vpu pgc nodesPeng Fan1-0/+27
Add i.MX8MP PGC nodes for vpu, which are used to supply power for VPU. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-verdin: add cpu-supplyMax Krummenacher1-1/+17
Add the cpu-supply property to all CPU nodes to enable the cpufreq driver. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-venice-gw7903: add digital I/O ctl gpiosTim Harvey1-1/+3
The GW7903-C revision introduced two additional GPIO's for controlling the digital I/O direction. Add them. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm/n-venice-gw7902: Remove invalid propertyFabio Estevam2-2/+0
The 'oscillator-frequency' property is not documented and it is not used anywhere. Remove it. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: Add SoM compatible to i.MX8M Plus DHCOM PDK2Marek Vasut1-1/+2
Add SoM compatible string into i.MX8MP DHCOM PDK2 compatible strings. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: Drop Atheros PHY header from i.MX8M Plus DHCOM PDK2Marek Vasut1-1/+0
This PHY is not used on PDK2, the header was added due to copy-paste error, drop it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: Add HW variant details to i.MX8M Plus DHCOM PDK2Marek Vasut1-0/+5
Add information about which exact SoM variant is used on which PDK2 variant. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: mnt-reform2: don't use multiple blank linesMarcel Ziswiler1-1/+0
Avoid the following checkpatch warning: arch/arm/boot/dts/imx8mq-mnt-reform2.dts:213: check: Please don't use multiple blank lines Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Lucas Stach <dev@lynxeye.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp-verdin: don't use multiple blank linesMarcel Ziswiler1-1/+0
Avoid the following checkpatch warning: arch/arm/boot/dts/imx8mp-verdin.dtsi:281: check: Please don't use multiple blank lines Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mm-venice-gw72xx-0x: blank line at end of fileMarcel Ziswiler1-1/+0
Avoid the following checkpatch warning: Found possible blank line(s) at end of file 'arch/arm/boot/dts/imx8mm-venice-gw72xx-0x.dts' Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8ulp-evk: Add the fec supportWei Fang1-0/+57
Enable the fec on i.MX8ULP EVK board. Signed-off-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8ulp: Add the fec supportWei Fang1-0/+11
Add the fec support on i.MX8ULP platforms. Signed-off-by: Wei Fang <wei.fang@nxp.com> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: add interconnect for hsio blk ctrlPeng Fan1-0/+5
Add interconnect property for hsio blk ctrl Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: imx8mp: add interconnects for media blk ctrlPeng Fan1-0/+13
Add interconnect property for media blk ctrl Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: imx: update fsl.yaml for imx8dxlShenwei Wang1-0/+6
i.MX8DXL is a device targeting the automotive and industrial market segments. The chip is designed to achieve both high performance and low power consumption. It has a dual (2x) Cortex-A35 processor. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: firmware: add missing resource IDs for imx8dxlShenwei Wang1-0/+7
Add the missing resource IDs for imx8dxl. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 boardTim Harvey1-0/+1
Add DT compatible string for i.MX8M Mini based Gateworks GW7904 board. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: add i.MX93 mediamix blk ctrlPeng Fan2-0/+95
Add DT bindings for i.MX93 MEDIAMIX BLK CTRL. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: add i.MX93 SRCPeng Fan1-0/+96
Add bindings for i.MX93 System Reset Controller(SRC). SRC supports resets and power gating for mixes. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registersPeng Fan1-0/+2
Document i.MX93 BLK CTRL system registers. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 CarrierMartyn Welch1-0/+7
Add DT compatible strings for a combination of the 14N0600E variant of the Avnet (MSC branded) SM2S-IMX8PLUS SoM on it's own and in combination with the SM2-MB-EP1 carrier board. Signed-off-by: Martyn Welch <martyn.welch@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S boardFrieder Schrempf1-0/+7
Add bindings for the Kontron BL i.MX8MM OSM-S board. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/boardFrieder Schrempf1-3/+3
This updates the bindings in order to use names for the boards that follow the latest convention used by Kontron marketing. By updating we make sure, that we can maintain this more easily in future and make sure that the proper devicetree can be selected for the hardware. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: imx: add i.MX8MP vpu blk ctrlPeng Fan2-17/+99
i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse the i.MX8MM VPU blk ctrl yaml file. And add description for the items. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrlPeng Fan1-0/+12
i.MX8MM VPU support NoC QoS setting, so add interconnect property for i.MX8MM VPU blk ctrl Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrlPeng Fan1-2/+0
minItems and maxItems are set as the same value. In such case minItems is not necessary. So drop it. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: power: imx8mp-power: add HDMI HDCP/HRVPeng Fan1-0/+2
Add i.MX8MP HDMI HDCP and HRV entries. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: arm: fsl: imx6ul-kontron: Update bindingsFrieder Schrempf1-19/+12
This updates the bindings in order to simplify the devicetree structure and to add names for the boards that follow the latest convention used by Kontron marketing. It also gets rid of the N6xxx notation in the compatibles and file names, as they are not really used anymore and often result in confusion. This is a breaking change, but the impact shouldn't be too big and it makes usage and maintenance easier in the future. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17dt-bindings: clk: imx8mm: don't use multiple blank linesMarcel Ziswiler1-1/+0
Avoid the following checkpatch warning: include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use multiple blank lines Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17ARM: dts: imx6qdl-gw54xx: add CAN regulatorTim Harvey1-1/+17
The GW54xx has a transceiver with a STBY pin connected to an IMX6 GPIO. Configure this as a regulator to drive it low when CAN is in use. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17ARM: dts: imx6qdl-gw53xx: add CAN regulatorTim Harvey1-1/+17
The GW53xx has a transceiver with a STBY pin connected to an IMX6 GPIO. Configure this as a regulator to drive it low when CAN is in use. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17ARM: dts: imx6qdl-gw52xx: add CAN regulatorTim Harvey1-1/+17
The GW52xx has a transceiver with a STBY pin connected to an IMX6 GPIO. Configure this as a regulator to drive it low when CAN is in use. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-16spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related propertiesSergiu Moga1-0/+10
The DT nodes of the SPI IP's may contain DMA related properties so make sure that the binding is able to properly validate those as well by making it aware of these optional properties. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220913142205.162399-5-sergiu.moga@microchip.com
2022-09-16ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodesSergiu Moga16-0/+89
Add the missing required DT property `atmel,usart-mode` to the serial nodes of Atmel/Microchip DT files. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220913142205.162399-4-sergiu.moga@microchip.com
2022-09-16ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1Sergiu Moga1-1/+1
Maintain consistency among the compatibles of the serial nodes of sam9x60ek and highlight the incremental characteristic of its serial IP's by making sure that all serial nodes contain both the sam9x60 and sam9260 usart/dbgu compatibles. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220913142205.162399-3-sergiu.moga@microchip.com
2022-09-16ARM: dts: at91: sama7g5: Swap rx and tx for spi11Sergiu Moga1-3/+3
Swap the rx and tx of the DMA related DT properties of the spi11 node in order to maintain consistency across Microchip/Atmel SoC files. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220913142205.162399-2-sergiu.moga@microchip.com
2022-09-15Merge tag 'arm-soc/for-6.1/devicetree-arm64' of ↵Arnd Bergmann2-0/+131
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SoC changes for 6.1, please pull the following: - Rafal adds the BCM4908 LED controller node and describes all 32 LED pins, he also adds support for the Asus GC-AC5300 LEDs * tag 'arm-soc/for-6.1/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: bcm4908: add Asus GT-AC5300 LEDs arm64: dts: broadcom: bcm4908: add LEDs controller block arm64: dts: broadcom: bcm4908: add remaining LED pins Link: https://lore.kernel.org/r/20220915023044.2350782-3-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-15Merge tag 'arm-soc/for-6.1/devicetree' of ↵Arnd Bergmann14-61/+77
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoC Device Tree updates for 6.1, please pull the following: - Rafal improves the BCM5301X PCIe DT nodes schema validation by flagging the PCIe controller with a missing "device_type" property - William merges BCM4908 within BCMBCA since this chip is part of the Broadcom Broadband Carrier Access group and follows the architecture of those chips * tag 'arm-soc/for-6.1/devicetree' of https://github.com/Broadcom/stblinux: arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA arm64: dts: Add BCM4908 generic board dts arm64: dts: Move BCM4908 dts to bcmbca folder arm64: dts: bcmbca: update BCM4908 board dts files dt-bindings: arm64: bcmbca: Update BCM4908 description dt-bindings: arm64: bcmbca: Merge BCM4908 into BCMBCA ARM: dts: BCM5301X: Add basic PCI controller properties Link: https://lore.kernel.org/r/20220915023044.2350782-2-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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