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2016-05-05drm/amdgpu: enable gfx clockgating for CZAlex Deucher1-1/+9
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx: rework fiji cg functions so they can be sharedAlex Deucher1-16/+202
They can be shared with other asics with minor modifications. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: add a new set of rlc function pointersAlex Deucher1-0/+9
Different asics tend to have different ways to interact with the RLC. This just covers enter/exit of safe mode for updating CG and PG state, but could be extended to cover other RLC operations in the future if necessary. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx: adjust gfx_v8_0_send_serdes_cmd for STAlex Deucher1-6/+17
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx8: rename send_serdes_cmdAlex Deucher1-7/+7
So it can be shared with CZ/ST. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gmc: add proper CG flags for fijiAlex Deucher2-5/+7
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/common: add proper CG flags for fijiAlex Deucher1-9/+13
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/sdma: add proper CG flags for fijiAlex Deucher2-3/+5
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx: add proper CG flags for fijiAlex Deucher2-35/+56
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: add new CG flag for ROM clockgatingAlex Deucher1-0/+1
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: implement LRU add callbacks v2Christian König12-9/+49
This allows fine grained control for the driver where to add a BO into the LRU. v2: fix typo in comment Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: add optional LRU removal callback v2Christian König2-5/+13
Useful for driver specific LRU handling. v2: fix typo in comment Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: remove unused validation sequenceChristian König2-3/+0
Not used any more. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: remove lazy parameter from ttm_bo_waitChristian König13-24/+24
Not used any more. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: remove use_ticket parameter from ttm_bo_reserveChristian König25-62/+55
Not used any more. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: don't wait for BO on initial allocationChristian König1-6/+12
When we use an extern reservation object that otherwise waits for every fence registered with it. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: fix the coding style in amdgpu_ring.cChristian König1-2/+3
No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: use the ring name for debugfs (v2)Christian König3-35/+25
Instead of hard coding just another name in the ring code. v2: squash in Tom's rebase fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: reduce the ring size for SDMAChristian König3-3/+3
Those are way too large. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: reduce the ring size for GFXChristian König2-4/+4
Those are way too large. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: use max_dw in ring_initChristian König10-22/+18
Instead of specifying the total ring size calculate that from the maximum number of dw a submission can have and the number of concurrent submissions. This fixes UVD with 8 concurrent submissions or more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/powerplay: fix fan speed percent setting error on FijiEric Huang1-2/+2
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/powerplay: fix fan speed percent setting error on TongaEric Huang1-2/+2
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: Fix TTM BO accountingFelix Kuehling1-3/+2
TTM BO accounting is out of sync with how memory is really allocated in ttm[_dma]_tt_alloc_page_directory. This resulted in excessive estimated overhead with many small allocations. ttm_dma_tt_alloc_page_directory makes a single allocation for three arrays: pages, DMA and CPU addresses. It uses drm_calloc_large, which uses kmalloc internally for allocations smaller than PAGE_SIZE. ttm_round_pot should be a good approximation of its memory usage both above and below PAGE_SIZE. Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd: make a type-safe cgs_device struct. (v2)Dave Airlie7-98/+93
This is just a type-safety things to avoid everyone taking void *, it doesn't change anything. v2: agd5f: split out the dal changes into a separate patch. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: handle more than 10 UVD sessions (v2)Arindam Nath6-18/+41
Change History -------------- v2: - Make firmware version check correctly. Firmware versions >= 1.80 should all support 40 UVD instances. - Replace AMDGPU_MAX_UVD_HANDLES with max_handles variable. v1: - The firmware can handle upto 40 UVD sessions. Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Ayyappa Chandolu <ayyappa.chandolu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd: make some function-local tables static constNils Wallménius3-6/+6
These tables were initialized on stack on each call, avoid that and save a little bit of text size. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/powerplay: mark phm_master_table_* structs as constNils Wallménius7-24/+24
Also adjust phm_construct_table to take a const pointer Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/powerplay: Mark pem_event_action chains as constNils Wallménius3-19/+19
As these arrays were of pointer to pointer type, they were pointer to pointer to const. Make them pointer to const pointer to const. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: Mark all instances of struct drm_info_list as constNils Wallménius8-10/+10
All these are compile time constand and the drm_debugfs_create/remove_files functions take a const pointer argument. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/scheduler: Mark amdgpu_sched_ops constNils Wallménius4-5/+5
This marks the struct amdgpu_sched_ops const and adjusts amd_sched_init to take a const pointer for the ops param. The ops member of struct amd_gpu_scheduler is also changed to const. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd: Mark some tables as constNils Wallménius13-29/+29
This patch marks some compile-time constant tables 'const'. The tables marked in this patch are the low hanging fruit where little other changes were necesary to avoid casting away constness etc. Also mark some tables that are private to a file as static. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/powerplay: fix stutter setup in mclk level initAlex Deucher1-8/+8
Stale ifdef. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/radeon: add support for SET_APPEND_CNT packet3 (v2)Dave Airlie3-1/+90
This adds support to the command parser for the set append counter packet3, this is required to support atomic counters on evergreen/cayman GPUs. v2: fixup some of the hardcoded numbers with real register names (Christian) Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/radeon: handle more than 10 UVD sessionsArindam Nath6-17/+44
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/radeon: add support for loading new UVD fwArindam Nath3-15/+49
Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: reuse VMIDs already assigned to a processChristian König1-31/+46
If we don't need to flush we can easily use another VMID already assigned to the process. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: add a fence after the VM flushChristian König3-14/+35
This way we can track when the flush is done. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: use a sync object for VMID fences v2Christian König3-32/+132
v2: rebase & cleanup This way we can store more than one fence as user for each VMID. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: merge VM manager and VM context ID structureChristian König2-78/+78
No need to have two of them any more. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: Set PFLIP_SUBMITTED for crtc after address updateAndrey Grodzovsky1-3/+11
Also add some pflip debug prints. This change allows us to wait on pflip status until the new surface address is actually submitted to the register. This reverts ed3020e923240829dcdfd3343f6e91dc02c63775 drm/amdgpu: Move MMIO flip out of spinlocked region The original change assumed DAL will aquire locks inside DAL implemetion of page_flip callback which eventaully didn't happen. This moves the flip before status update which makes sense for the non-DAL code pathes as well. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNCMichel Dänzer8-24/+35
When this flag is set, we program the hardware to execute the flip during horizontal blank (i.e. for the next scanline) instead of during vertical blank (i.e. for the next frame). Currently this is only supported on ASICs which have a page flip completion interrupt (>= R600), and only if the use_pflipirq parameter has value 2 (the default). Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/powerplay: add deep sleep divider id into DPM table on TongaEric Huang1-5/+24
Add a proper implementation for setting the deep sleep divider. Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05Merge tag 'topic/drm-misc-2016-05-04' of ↵Dave Airlie49-462/+657
git://anongit.freedesktop.org/drm-intel into drm-next Ofc I promise just a few leftovers for drm-misc and somehow it's the biggest pull. But really mostly trivial stuff: - MAINTAINERS updates from Emil - rename async to nonblock in atomic_commit to avoid the confusion between nonblocking ioctl and async flip (= not vblank synced), from Maarten. Needs to be regened with newer drivers, but probably only after -rc1 to catch them all. - actually lockless gem_object_free, plus acked driver conversion patches. All the trickier prep stuff already is in drm-next. - Noralf's nice work for generic defio support in our fbdev emulation. Keeps the udl hack, and qxl is tested by Gerd. * tag 'topic/drm-misc-2016-05-04' of git://anongit.freedesktop.org/drm-intel: (47 commits) drm: Fixup locking WARN_ON mistake around gem_object_free_unlocked drm/etnaviv: Use lockless gem BO free callback drm/imx: Use lockless gem BO free callback drm/radeon: Use lockless gem BO free callback drm/amdgpu: Use lockless gem BO free callback drm/gem: support BO freeing without dev->struct_mutex MAINTAINERS: Add myself for the new VC4 (RPi GPU) graphics driver. MAINTAINERS: Add a bunch of legacy (UMS) DRM drivers MAINTAINERS: Add a few DRM drivers by Dave Airlie MAINTAINERS: List the correct git repo for the Renesas DRM drivers MAINTAINERS: Update the files list for the Renesas DRM drivers MAINTAINERS: Update the files list for the Armada DRM driver MAINTAINERS: Update the files list for the Rockchip DRM driver MAINTAINERS: Update the files list for the Exynos DRM driver MAINTAINERS: Add maintainer entry for the VMWGFX DRM driver MAINTAINERS: Add maintainer entry for the MSM DRM driver MAINTAINERS: Add maintainer entry for the Nouveau DRM driver MAINTAINERS: Update the files list for the Etnaviv DRM driver MAINTAINERS: Remove unneded wildcard for the i915 DRM driver drm/atomic: Add WARN_ON when state->acquire_ctx is not set. ...
2016-05-05PM / OPP: Remove useless checkViresh Kumar1-3/+0
Regulators are optional for devices using OPPs and the OPP core shouldn't be printing any errors for such missing regulators. It was fine before the commit 0c717d0f9cb4, but that failed to update this part of the code to remove an 'always true' check and an extra unwanted print message. Fix that now. Fixes: 0c717d0f9cb4 (PM / OPP: Initialize regulator pointer to an error value) Reported-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-05-05Merge branch 'for-linus' of ↵Linus Torvalds3-24/+24
git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input Pull input fixes from Dmitry Torokhov. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: atmel_mxt_ts - use mxt_acquire_irq in mxt_soft_reset Input: zforce_ts - fix dual touch recognition Input: twl6040-vibra - fix atomic schedule panic
2016-05-05asm-generic: use compat version for preadv2 and pwritev2Yury Norov1-2/+2
Compat architectures that does not use generic unistd (mips, s390), declare compat version in their syscall tables for preadv2 and pwritev2. Generic unistd syscall table should do it as well. [arnd: this initially slipped through the review and an incorrect patch got merged. arch/tile/ is the only architecture that could be affected for their 32-bit compat mode, every other architecture we support today is fine.] Signed-off-by: Yury Norov <ynorov@caviumnetworks.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-05-04ACPICA: Dispatcher: Update thread ID for recursive method callsPrarit Bhargava1-0/+3
ACPICA commit 7a3bd2d962f221809f25ddb826c9e551b916eb25 Set the mutex owner thread ID. Original patch from: Prarit Bhargava <prarit@redhat.com> Link: https://bugzilla.kernel.org/show_bug.cgi?id=115121 Link: https://github.com/acpica/acpica/commit/7a3bd2d9 Signed-off-by: Prarit Bhargava <prarit@redhat.com> Tested-by: Andy Lutomirski <luto@kernel.org> # On a Dell XPS 13 9350 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Cc: All applicable <stable@vger.kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-05-04Merge branch 'for-linus' of ↵Linus Torvalds1-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security Pull IMA fix from James Morris. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security: ima: fix the string representation of the LSM/IMA hook enumeration ordering
2016-05-04Merge tag 'for-linus-4.6-rc6-tag' of ↵Linus Torvalds3-14/+26
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen regression fixes from David Vrabel: - Fix two regressions causing crashes in 32-bit PV guests - Fix a regression in the evtchn driver * tag 'for-linus-4.6-rc6-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: xen/evtchn: fix ring resize when binding new events xen/balloon: Fix crash when ballooning on x86 32 bit PAE xen: Fix page <-> pfn conversion on 32 bit systems
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