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2014-03-28time: Revert to calling clock_was_set_delayed() while in irq contextJohn Stultz1-1/+2
In commit 47a1b796306356f35 ("tick/timekeeping: Call update_wall_time outside the jiffies lock"), we moved to calling clock_was_set() due to the fact that we were no longer holding the timekeeping or jiffies lock. However, there is still the problem that clock_was_set() triggers an IPI, which cannot be done from the timer's hard irq context, and will generate WARN_ON warnings. Apparently in my earlier testing, I'm guessing I didn't bump the dmesg log level, so I somehow missed the WARN_ONs. Thus we need to revert back to calling clock_was_set_delayed(). Signed-off-by: John Stultz <john.stultz@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: http://lkml.kernel.org/r/1395963049-11923-1-git-send-email-john.stultz@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-03-28drm/i915: Undo gtt scratch pte unmapping againDaniel Vetter1-1/+1
It apparently blows up on some machines. This functionally reverts commit 828c79087cec61eaf4c76bb32c222fbe35ac3930 Author: Ben Widawsky <benjamin.widawsky@intel.com> Date: Wed Oct 16 09:21:30 2013 -0700 drm/i915: Disable GGTT PTEs on GEN6+ suspend Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=64841 Reported-and-Tested-by: Brad Jackson <bjackson0971@gmail.com> Cc: stable@vger.kernel.org Cc: Takashi Iwai <tiwai@suse.de> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Todd Previte <tprevite@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-03-28drm/radeon: fix runtime suspend breaking secondary GPUsDave Airlie1-5/+12
Same fix as for nouveau, when we fail with EINVAL, subsequent gets fail hard, causing the device not to open. Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-27net/mlx4_core: pass pci_device_id.driver_data to __mlx4_init_one during resetWei Yang1-1/+5
The second parameter of __mlx4_init_one() is used to identify whether the pci_dev is a PF or VF. Currently, when it is invoked in mlx4_pci_slot_reset() this information is missed. This patch match the pci_dev with mlx4_pci_table and passes the pci_device_id.driver_data to __mlx4_init_one() in mlx4_pci_slot_reset(). Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-27core, nfqueue, openvswitch: Orphan frags in skb_zerocopy and handle errorsZoltan Kiss4-12/+34
skb_zerocopy can copy elements of the frags array between skbs, but it doesn't orphan them. Also, it doesn't handle errors, so this patch takes care of that as well, and modify the callers accordingly. skb_tx_error() is also added to the callers so they will signal the failed delivery towards the creator of the skb. Signed-off-by: Zoltan Kiss <zoltan.kiss@citrix.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-27vlan: Set hard_header_len according to available accelerationVlad Yasevich2-2/+5
Currently, if the card supports CTAG acceleration we do not account for the vlan header even if we are configuring an 8021AD vlan. This may not be best since we'll do software tagging for 8021AD which will cause data copy on skb head expansion Configure the length based on available hw offload capabilities and vlan protocol. CC: Patrick McHardy <kaber@trash.net> Signed-off-by: Vlad Yasevich <vyasevic@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-27usbnet: include wait queue head in device structureOliver Neukum2-15/+20
This fixes a race which happens by freeing an object on the stack. Quoting Julius: > The issue is > that it calls usbnet_terminate_urbs() before that, which temporarily > installs a waitqueue in dev->wait in order to be able to wait on the > tasklet to run and finish up some queues. The waiting itself looks > okay, but the access to 'dev->wait' is totally unprotected and can > race arbitrarily. I think in this case usbnet_bh() managed to succeed > it's dev->wait check just before usbnet_terminate_urbs() sets it back > to NULL. The latter then finishes and the waitqueue_t structure on its > stack gets overwritten by other functions halfway through the > wake_up() call in usbnet_bh(). The fix is to just not allocate the data structure on the stack. As dev->wait is abused as a flag it also takes a runtime PM change to fix this bug. Signed-off-by: Oliver Neukum <oneukum@suse.de> Reported-by: Grant Grundler <grundler@google.com> Tested-by: Grant Grundler <grundler@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-27x86, hyperv: Bypass the timer_irq_works() checkJason Wang1-0/+6
This patch bypass the timer_irq_works() check for hyperv guest since: - It was guaranteed to work. - timer_irq_works() may fail sometime due to the lpj calibration were inaccurate in a hyperv guest or a buggy host. In the future, we should get the tsc frequency from hypervisor and use preset lpj instead. [ hpa: I would prefer to not defer things to "the future" in the future... ] Cc: K. Y. Srinivasan <kys@microsoft.com> Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: <stable@vger.kernel.org> Acked-by: K. Y. Srinivasan <kys@microsoft.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Link: http://lkml.kernel.org/r/1393558229-14755-1-git-send-email-jasowang@redhat.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-03-27KVM: Specify byte order for KVM_EXIT_MMIOChristoffer Dall1-0/+4
The KVM API documentation is not clear about the semantics of the data field on the mmio struct on the kvm_run struct. This has become problematic when supporting ARM guests on big-endian host systems with guests of both endianness types, because it is unclear how the data should be exported to user space. This should not break with existing implementations as all supported existing implementations of known user space applications (QEMU and kvmtools for virtio) only support default endianness of the architectures on the host side. Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-03-27virtio-net: correct error handling of virtqueue_kick()Jason Wang1-3/+3
Current error handling of virtqueue_kick() was wrong in two places: - The skb were freed immediately when virtqueue_kick() fail during xmit. This may lead double free since the skb was not detached from the virtqueue. - try_fill_recv() returns false when virtqueue_kick() fail. This will lead unnecessary rescheduling of refill work. Actually, it's safe to just ignore the kick failure in those two places. So this patch fixes this by partially revert commit 67975901183799af8e93ec60e322f9e2a1940b9b. Fixes 67975901183799af8e93ec60e322f9e2a1940b9b (virtio_net: verify if virtqueue_kick() succeeded). Cc: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-27vfs: Allocate anon_inode_inode in anon_inode_init()Jan Kara1-22/+8
Currently we allocated anon_inode_inode in anon_inodefs_mount. This is somewhat fragile as if that function ever gets called again, it will overwrite anon_inode_inode pointer. So move the initialization of anon_inode_inode to anon_inode_init(). Signed-off-by: Jan Kara <jack@suse.cz> [ Further simplified on suggestion from Dave Jones ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-03-27spi: omap-uwire: add missing iounmapNishanth Menon1-0/+1
This fixes the following coccicheck warning: linux-2.6/drivers/spi/spi-omap-uwire.c:485:2-8: ERROR: missing iounmap; ioremap on line 471 and execution via conditional on line 481 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-27[SCSI] sd: Quiesce mode sense error messagesMartin K. Petersen2-16/+28
Messages about discovered disk properties are only printed once unless they are found to have changed. Errors encountered during mode sense, however, are printed every time we revalidate. Quiesce mode sense errors so they are only printed during the first scan. [jejb: checkpatch fixes] Bugzilla: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=733565 Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2014-03-27[SCSI] add support for per-host cmd poolsChristoph Hellwig2-19/+84
This allows drivers to specify the size of their per-command private data in the host template and then get extra memory allocated for each command instead of needing another allocation in ->queuecommand. With the current SCSI code that already does multiple allocations for each command this probably doesn't make a big performance impact, but it allows to clean up the drivers, and prepare them for using the blk-mq infrastructure where the common allocation will make a difference. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2014-03-27[SCSI] simplify command allocation and freeing a bitChristoph Hellwig1-42/+25
Just have one level of alloc/free functions that take a host instead of two levels for the allocation and different calling conventions for the free. [fengguang.wu@intel.com: docbook problems spotted, now fixed] Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2014-03-27[SCSI] megaraid: simplify internal command handlingChristoph Hellwig4-150/+32
We don't use the passed in scsi command for anything, so just add a adapter- wide internal status to go along with the internal scb that is used unter int_mtx to pass back the return value and get rid of all the complexities and abuse of the scsi_cmnd structure. This gets rid of the only user of scsi_allocate_command/scsi_free_command, which can now be removed. [jejb: checkpatch fixes] Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Adam Radford <aradford@gmail.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2014-03-27[SCSI] ses: Use vpd information from scsi_deviceHannes Reinecke1-28/+10
The scsi_device now has VPD page83 information attached, so there is no need to query it again. Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2014-03-27[SCSI] Add EVPD page 0x83 and 0x80 to sysfsHannes Reinecke4-1/+130
EVPD page 0x83 is used to uniquely identify the device. So instead of having each and every program issue a separate SG_IO call to retrieve this information it does make far more sense to display it in sysfs. Some older devices (most notably tapes) will only report reliable information in page 0x80 (Unit Serial Number). So export this in the sysfs attribute 'vpd_pg80'. [jejb: checkpatch fix] [hare: attach after transport configure] [fengguang.wu@intel.com: spotted problems with the original now fixed] Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2014-03-27[SCSI] Return VPD page length in scsi_vpd_inquiry()Hannes Reinecke1-8/+11
We should be returning the number of bytes of the requested VPD page in scsi_vpd_inquiry. This makes it easier for the caller to verify the required space. [jejb: fix up mm warning spotted by Sergey] Tested-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2014-03-27ata: fix Marvell SATA driver dependenciesBartlomiej Zolnierkiewicz1-0/+2
Make sata_mv host driver depend on PCI || ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || ARCH_MVEBU || ARCH_ORION5X config options as Marvell SATA support covers both Marvell PCI devices and Marvell Dove, Kirkwood, MV78xx0, Armada 370/XP and Orion5x SoCs (for non-PCI devices the driver to work requires suitable device tree node or platform device to be defined). Additionally allow the driver build if COMPILE_TEST config option is set. Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-03-27spi: clps711x: Convert to use master->max_speed_hzAxel Lin1-7/+7
Set highest transfer speed to master->max_speed_hz and then we can remove hw->max_speed. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-27spi: clps711x: Enable driver compilation with COMPILE_TESTAxel Lin1-1/+1
This helps increasing build testing coverage. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-27KVM: vmx: fix MPX detectionPaolo Bonzini1-1/+2
kvm_x86_ops is still NULL at this point. Since kvm_init_msr_list cannot fail, it is safe to initialize it before the call. Fixes: 93c4adc7afedf9b0ec190066d45b6d67db5270da Reported-by: Fengguang Wu <fengguang.wu@intel.com> Tested-by: Jet Chen <jet.chen@intel.com> Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-03-27regmap: mmio: Add support for 1/2/8 bytes wide register address.Xiubo Li1-3/+21
Since regmap core and mmio have already support for 1/2/8 bytes wide values, so adds support for 1/2/8 bytes wide registers address. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-27regmap: mmio: add regmap_mmio_{regsize, count}_check.Xiubo Li1-3/+13
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-27drm/nouveau: fail runtime pm properly.Dave Airlie1-4/+10
If we were on a non-optimus device, we'd return -EINVAL, this would lead to the over engineered runtime pm system to go into an error state, subsequent get_sync's would fail, so we'd never be able to open the device again. (like really get_sync shouldn't fail if the device isn't powered down). Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-27drm/udl: take reference to device struct for dma-bufsDave Airlie1-3/+8
this stops the device from being deleted before all the dma-bufs on it are freed, this fixes an oops when you unplug a udl device while it has imported a buffer from another device. Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-03-27MIPS: JZ4740: Don't select HAVE_PWMJingoo Han1-1/+0
The HAVE_PWM symbol is only for legacy platforms that provide the PWM API without using the generic framework. The jz4740 platform uses the generic PWM framework, after the commit "f6b8a57 pwm: Add Ingenic JZ4740 support". Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6525/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Restore init.h usage to arch/mips/ar7/time.cPaul Gortmaker1-0/+1
Commit 0046be10e0c502705fc74d91408eba13a73bc201 ("mips: delete non-required instances of include <linux/init.h>") inadvertently removed an include that was actually correct. Restore it. Note that it gets init.h implicitly anyway, so this is largely a cosmetic fixup; no build regressions were caused by this. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6416/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: BCM47XX: Add Belkin F7Dxxxx board detectionCody P Schafer4-0/+16
Add a few Belkin F7Dxxxx entries, with F7D4401 sourced from online documentation and the "F7D7302" being observed. F7D3301, F7D3302, and F7D4302 are reasonable guesses which are unlikely to cause mis-detection. Signed-off-by: Cody P Schafer <devel@codyps.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: zajec5@gmail.com Cc: Cody P Schafer <devel@codyps.com> Patchwork: https://patchwork.linux-mips.org/patch/6594/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: BCM47XX: Add detection and GPIO config for Siemens SE505v2Hauke Mehrtens3-0/+31
This adds board detection for the Siemens SE505v2 and the led gpio configuration. This board does not have any buttons. This is based on OpenWrt broadcom-diag and Manuel Munz's nvram dump. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: zajec5@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/6593/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: BCM47XX: Add button and led configuration for some Linksys devicesHauke Mehrtens2-0/+60
This adds led and button GPIO configuration for Linksys wrt54g3gv2, wrt54gsv1 and wrtsl54gs. This is based on OpenWrt broadcom-diag code. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: zajec5@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/6592/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: BCM47XX: Detect some more Linksys devicesHauke Mehrtens2-2/+4
The Linksys WRT54G/GS/GL family uses the same boardtype numbers, and the same gpio configuration. The boardtype numbers are changing with the hardware versions, but these hardware numbers are different or each model. Detect them all as one device, this also worked in OpenWrt. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: zajec5@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/6591/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: cpu-probe: Add support for probing M5150 coresLeonid Yegoshin1-0/+4
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6597/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Add support for the M5150 processorLeonid Yegoshin7-1/+10
The M5150 core is a 32-bit MIPS RISC which implements the MIPS Architecture Release-5 in a 5-stage pipeline. In addition, it includes the MIPS Architecture Virtualization Module that enables virtualization of operating systems, which provides a scalable, trusted, and secure execution environment. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6596/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Add processor identifier for the M5150 processorLeonid Yegoshin1-0/+1
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6595/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Add defconfig for Malta SMVP with EVAMarkos Chandras1-0/+200
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6581/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Default NR_CPUS=8 for malta SMP defconfigsPaul Burton3-3/+3
The previous NR_CPUS=2 default is not an optimal default for current Malta setups where it is common to have more than 2 CPUs available. It makes sense to increase this to a number which covers all common setups currently in use, such that all of those cores are usable. 8 seems to fit that description. If the user has less than 8 CPUs & they wish to have a more optimal kernel they can simply reduce this in their config. It makes sense for the default to work on as many systems as possible. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6580/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Set page size to 16KB for malta SMP defconfigsPaul Burton3-0/+3
For Malta defconfigs which may run on an SMP configuration without hardware cache anti-aliasing, a 16KB page size is a safer default. Most notably at the moment it will avoid cache aliasing issues for multicore proAptiv systems. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6579/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Malta: Enable DEVTMPFSMarkos Chandras7-0/+7
Recent versions of udev and systemd require the kernel to be compiled with CONFIG_DEVTMPFS in order to populate the /dev directory. Most MIPS platforms have it enabled by default, so enable it for Malta configs as well. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6582/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Regenerate malta defconfigsPaul Burton7-26/+3
This patch simply regenerates the malta defconfigs such that they don't change after being used & saved as a defconfig again. ie. it is the result of running the following: for cfg in arch/mips/configs/malta*; do ARCH=mips make `basename ${cfg}` ARCH=mips make savedefconfig mv -v defconfig ${cfg} done Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6578/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Alchemy: pata_platform for DB1200Manuel Lauss2-10/+14
The au1xxx-ide driver isn't any faster than pata_platform since it spends a lot of time busy waiting for DMA to finish; faster PIO/DMA modes only work on the db1200 with a certain cpu speed, UDMA is broken, and finally the old IDE layer is on death row, so time to switch to the newer ATA layer. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6662/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Alchemy: fold mach-db1xxx/db1x00 headers into board codeManuel Lauss4-133/+80
Merge the db1200.h and db1300.h headers into their only users. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6660/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Alchemy: Unify Devboard support.Manuel Lauss12-863/+339
This patch merges support for all DB1xxx and PB1xxx boards into a single image, along with a new single defconfig for them. Run-tested on DB1300 and DB1500. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6577/ Patchwork: https://patchwork.linux-mips.org/patch/6659/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Alchemy: Determine cohereny at runtime based on cpu typeManuel Lauss4-8/+13
All Alchemy chips have coherent DMA, but for example the USB or AC97 peripherals on the Au1000/1500/1100 are not. This patch uses DMA_MAYBE_COHERENT on Alchemy and sets coherentio based on CPU type. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6576/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Extend DMA_MAYBE_COHERENT logic to DMA_NONCOHERENT useManuel Lauss3-7/+7
Setting DMA_MAYBE_COHERENT gives a platform the opportunity to select use of cache ops at boot. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6575/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-27MIPS: Enable MIPS 3.5 features on MaltaMarkos Chandras1-0/+1
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-03-27MIPS: malta: Add support for SMP EVAMarkos Chandras2-1/+7
Allow secondary cores to program their segment control registers during smp bootstrap code. This enables EVA on Malta SMP configurations Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-03-27MIPS: malta: malta-init: Fix System Controller memory mapping for EVALeonid Yegoshin1-0/+13
Shift System Controller memory mapping to 0x80000000 Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-03-27MIPS: malta: malta-memory: Add free_init_pages_eva() callbackMarkos Chandras1-0/+8
Use a Malta specific function to free the init section once the kernel has booted. When operating in EVA mode, the physical memory is shifted to 0x80000000. Kernel is loaded into 0x80000000 (virtual) so the offset between physical and virtual addresses is 0. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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