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2023-12-12pinctrl: core: Embed struct pingroup into struct group_descAndy Shevchenko2-3/+17
struct group_desc is a particular version of the struct pingroup with associated opaque data. Start switching pin control core and drivers to use it explicitly. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231211190321.307330-5-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12pinctrl: ingenic: Use C99 initializers in PINCTRL_PIN_GROUP()Andy Shevchenko1-8/+13
For the better flexibility use C99 initializers in PINCTRL_PIN_GROUP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231211190321.307330-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12pinctrl: mediatek: Use C99 initializers in PINCTRL_PIN_GROUP()Andy Shevchenko2-12/+12
For the better flexibility use C99 initializers in PINCTRL_PIN_GROUP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231211190321.307330-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12pinctrl: core: Add a convenient define PINCTRL_GROUP_DESC()Andy Shevchenko2-4/+10
Add PINCTRL_GROUP_DESC() macro for inline use. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231211190321.307330-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-12Merge tag 'gpio-remove-gpiochip_is_requested-for-v6.8-rc1' of ↵Linus Walleij9-47/+96
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel gpio: remove gpiochip_is_requested() - provide a safer alternative to gpiochip_is_requested() - convert all existing users - remove gpiochip_is_requested()
2023-12-08gpiolib: remove gpiochip_is_requested()Bartosz Golaszewski2-36/+13
We have no external users of gpiochip_is_requested(). Let's remove it and replace its internal calls with direct testing of the REQUESTED flag. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08gpiolib: use gpiochip_dup_line_label() in for_each helpersBartosz Golaszewski1-8/+29
Rework for_each_requested_gpio_in_range() to use the new helper to retrieve a dynamically allocated copy of the descriptor label and free it at the end of each iteration. We need to leverage the CLASS()' destructor to make sure that the label is freed even when breaking out of the loop. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08pinctrl: sppctl: use gpiochip_dup_line_label()Bartosz Golaszewski1-5/+5
Use the new gpiochip_dup_line_label() helper to safely retrieve the descriptor label. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08pinctrl: baytrail: use gpiochip_dup_line_label()Bartosz Golaszewski1-5/+6
Use the new gpiochip_dup_line_label() helper to safely retrieve the descriptor label. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08pinctrl: nomadik: use gpiochip_dup_line_label()Bartosz Golaszewski1-1/+5
Use the new gpiochip_dup_line_label() helper to safely retrieve the descriptor label. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08pinctrl: abx500: use gpiochip_dup_line_label()Bartosz Golaszewski1-2/+7
Use the new gpiochip_dup_line_label() helper to safely retrieve the descriptor label. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08gpio: stmpe: use gpiochip_dup_line_label()Bartosz Golaszewski1-1/+5
Use the new gpiochip_dup_line_label() helper to safely retrieve the descriptor label. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08gpio: wm8994: use gpiochip_dup_line_label()Bartosz Golaszewski1-5/+8
Use the new gpiochip_dup_line_label() helper to safely retrieve the descriptor label. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08gpio: wm831x: use gpiochip_dup_line_label()Bartosz Golaszewski1-5/+9
Use the new gpiochip_dup_line_label() helper to safely retrieve the descriptor label. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-08gpiolib: provide gpiochip_dup_line_label()Bartosz Golaszewski2-0/+30
gpiochip_is_requested() not only has a misleading name but it returns a pointer to a string that is freed when the descriptor is released. Provide a new helper meant to replace it, which returns a copy of the label string instead. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP()Andy Shevchenko1-5/+4
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231204160033.1872569-6-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07pinctrl: keembay: Convert to use struct pingroupAndy Shevchenko1-2/+2
The pin control header provides struct pingroup. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231204160033.1872569-5-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07pinctrl: equilibrium: Convert to use struct pingroupAndy Shevchenko1-13/+13
The pin control header provides struct pingroup. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231204160033.1872569-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07pinctrl: core: Make pins const unsigned int pointer in struct group_descAndy Shevchenko2-3/+3
It's unclear why it's not a const unsigned int pointer from day 1. Make the pins member const unsigned int pointer in struct group_desc. Update necessary APIs. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231204160033.1872569-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-07pinctrl: renesas: Mark local variable with const in ->set_mux()Andy Shevchenko2-2/+2
We are not going to change pins in the ->set_mux() callback. Mark the local variable with a const qualifier. While at it, make it also unsigned. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231204160033.1872569-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04dt-bindings: pinctrl: qcom,sm8550-lpass-lpi: add X1E80100 LPASS LPIKrzysztof Kozlowski1-1/+5
Document the Qualcomm X1E80100 SoC Low Power Audio SubSystem Low Power Island (LPASS LPI) pin controller, compatible with earlier SM8550 model. Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231129155738.167030-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04pinctrl: pinctrl-single: add ti,j7200-padconf compatibleThomas Richard1-0/+5
On j7200, during suspend to ram pinctrl contexts are lost. To save and restore contexts during suspend/resume, the flag PCS_CONTEXT_LOSS_OFF shall be set. Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20231128-j7200-pinctrl-s2r-v1-2-704e7dc24460@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04dt-bindings: pinctrl: pinctrl-single: add ti,j7200-padconf compatibleThomas Richard1-0/+1
Add the "ti,j7200-padconf" compatible to support suspend to ram on j7200. Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231128-j7200-pinctrl-s2r-v1-1-704e7dc24460@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04pinctrl: qcom: fail to retrieve configuration from invalid pin groupsRichard Acayan1-0/+4
The pinconf-groups debugfs file dumps each valid configuration item of all pin groups. Some platforms and devices may have pin groups which cannot be accessed, according to commit 691bf5d5a7bf ("pinctrl: qcom: Don't allow protected pins to be requested"). Fail for each configuration item of an invalid pin group by checking the GPIO chip's valid mask. The validity of the pin group cannot be checked in the generic pinconf dump (function "pinconf_generic_dump_one"), as it does not directly interact with the gpiochip or the pinmux callbacks (which would give it access to the request callback). Instead, an entry contains the ID and name of the pingroup with no properties when all items fail. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Link: https://lore.kernel.org/r/20231128020202.728156-3-mailingradian@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04pinctrl: mediatek: Switch to use no-IRQ PM helpersAndy Shevchenko14-18/+16
Since pm.h provides a helper for system no-IRQ PM callbacks, switch the driver to use it instead of open coded variant. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231122144744.2222207-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-04pinctrl: Convert unsigned to unsigned intAndy Shevchenko15-134/+134
Simple type conversion with no functional change implied. While at it, adjust indentation where it makes sense. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-24-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: imx: Use temporary variable to hold pinsAndy Shevchenko1-8/+9
The pins are allocated from the heap, but in order to pass them as constant object, we need to use non-constant pointer. Achieve this by using a temporary variable. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-6-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: equilibrium: Use temporary variable to hold pinsAndy Shevchenko1-7/+6
The pins are allocated from the heap, but in order to pass them as constant object, we need to use non-constant pointer. Achieve this by using a temporary variable. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-5-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: equilibrium: Unshadow error code of of_property_count_u32_elems()Andy Shevchenko1-3/+4
of_property_count_u32_elems() might return an error code in some cases. It's naturally better to assign what it's returned to the err variable and supply the real code to the upper layer(s). Besides that, it's a common practice to avoid assignments for the data in cases when we know that the error condition happened. Refactor the code accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: qcom: lpass-lpi: Remove unused member in struct lpi_pingroupAndy Shevchenko9-163/+0
The group is not used anywhere, remove it. And if needed, it should be struct pingroup anyway. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01pinctrl: qcom: lpass-lpi: Replace kernel.h with what is being usedAndy Shevchenko1-1/+1
Replace kernel.h with what exactly is being used, i.e. array_size.h. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-01Merge tag 'renesas-pinctrl-for-v6.8-tag1' of ↵Linus Walleij2-1/+2
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.8 - Add support for interrupt affinity to the RZ/G2L GPIO driver, - Drop unneeded quotes in the RZ/A2 Pin controller DT bindings. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-27dt-bindings: pinctrl: renesas: Drop unneeded quotesRob Herring1-1/+1
Drop unneeded quotes over simple string values to fix a soon to be enabled yamllint warning: [error] string value is redundantly quoted with any quotes (quoted-strings) Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231122224409.2808999-1-robh@kernel.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-11-27pinctrl: renesas: rzg2l: Enhance driver to support interrupt affinity settingLad Prabhakar1-0/+1
Implement irq_set_affinity callback so that we can set affinity for GPIO IRQs. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231011195923.67404-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-11-25pinctrl: don't include GPIOLIB private headerBartosz Golaszewski1-4/+1
gpio_to_desc() is declared in linux/gpio.h so there's no need to include gpiolib.h directly. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231115165001.2932350-4-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-25pinctrl: stop using gpiod_to_chip()Bartosz Golaszewski1-6/+7
Don't dereference struct gpio_chip directly, use dedicated gpio_device getters instead. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231115165001.2932350-3-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-25Merge tag 'gpio-device-get-label-for-v6.8-rc1' of ↵Linus Walleij2-0/+15
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel gpiolib: provide gpio_device_get_label() Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24gpiolib: provide gpio_device_get_label()Bartosz Golaszewski2-0/+15
Provide a getter for the GPIO device label string so that users don't have to dereference struct gpio_chip directly. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-11-24pinctrl: as3722: Use devm_gpiochip_add_data() to simplify remove pathAndrew Davis1-15/+2
Use devm version of gpiochip add function to handle removal for us. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20231116223045.274211-1-afd@ti.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24pinctrl: qcom: Add X1E80100 pinctrl driverRajendra Nayak3-0/+1887
Add initial pinctrl driver to support pin configuration with pinctrl framework for X1E80100 SoC. Co-developed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231117093921.31968-3-quic_sibis@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24dt-bindings: pinctrl: qcom: Add X1E80100 pinctrlRajendra Nayak1-0/+143
Add device tree binding Documentation details for Qualcomm X1E80100 TLMM device. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231117093921.31968-2-quic_sibis@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24pinctrl: npcm7xx: prevent glitch when setting the GPIO to output highTomer Maimon1-1/+1
Enable GPIO output after setting the output value to prevent a glitch when pinctrl driver sets gpio pin to output high and the pin is in the default state (high->low->high). Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: William A. Kennington III <william@wkennington.com> Link: https://lore.kernel.org/r/20231115211209.1683449-1-william@wkennington.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-24pinctrl: stm32: return errors from stm32_gpio_direction_output()Sergey Shtylyov1-2/+1
In the STMicroelectronics STM32 driver, stm32_gpio_direction_output() ignores the result of pinctrl_gpio_direction_output() for no good reason. Let's propagate errors from pinctrl_gpio_direction_output() upstream... Found by Linux Verification Center (linuxtesting.org) with the Svace static analysis tool. Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru> Link: https://lore.kernel.org/r/5ce023a8-db0c-13a9-be42-09e3348ca44d@omp.ru Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14pinctrl: tps6594: Add driver for TPS6594 pinctrl and GPIOsEsteban Blanc3-0/+390
TI TPS6594 PMIC has 11 GPIOs which can be used for different functions. This patch adds a pinctrl and GPIO drivers in order to use those functions. Signed-off-by: Esteban Blanc <eblanc@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20231108104124.2818275-1-eblanc@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14pinctrl: qcom: lpass-lpi: allow slew rate bit in main pin config registerKrzysztof Kozlowski2-6/+21
Existing Qualcomm SoCs have the LPASS pin controller slew rate control in separate register, however this will change with upcoming Qualcomm SoCs. The slew rate will be part of the main register for pin configuration, thus second device IO address space is not needed. Prepare for supporting new SoCs by adding flag customizing the driver behavior for slew rate. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231013145935.220945-3-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14pinctrl: qcom: lpass-lpi: split slew rate set to separate functionKrzysztof Kozlowski1-20/+33
Setting slew rate for each pin will grow with upcoming Qualcomm SoCs, so split the code responsible for this into separate function for easier readability and maintenance. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231013145935.220945-2-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13pinctrl: qcom: Introduce the SM8650 Top Level Mode Multiplexer driverNeil Armstrong3-0/+1771
Add Top Level Mode Multiplexer (pinctrl) support for the SM8650 platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-tlmm-v3-3-0e179c368933@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13pinctrl: qcom: handle intr_target_reg wakeup_present/enable bitsNeil Armstrong2-0/+47
New platforms uses a new set of bits to control the wakeirq delivery to the PDC block. The intr_wakeup_present_bit indicates if the GPIO supports wakeirq and intr_wakeup_enable_bit enables wakeirq delivery to the PDC block. While the name seems to imply this only enables wakeup events, it is required to allow interrupts events to the PDC block. Enable this bit in the irq resource request/free if: - gpio is in wakeirq map - has the intr_wakeup_present_bit - the intr_wakeup_enable_bit is set Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-tlmm-v3-2-0e179c368933@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13dt-bindings: pinctrl: document the SM8650 Top Level Mode MultiplexerNeil Armstrong1-0/+147
Document the Top Level Mode Multiplexer on the SM8650 Platform. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-tlmm-v3-1-0e179c368933@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-13pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASSKrzysztof Kozlowski3-0/+266
Add driver for the pin controller in Low Power Audio SubSystem (LPASS) of Qualcomm SM8650 SoC. Notable differences against SM8550 LPASS pin controller: 1. Additional address space for slew rate thus driver uses LPI_FLAG_SLEW_RATE_SAME_REG and sets slew rate via different register. 2. Two new pin mux functions: qca_swr_clk and qca_swr_data Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231027093615.140656-3-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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