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2019-04-29Merge tag 'qcom-drivers-for-5.2' of ↵Olof Johansson5-9/+27
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.2 * Update MAINTAINERS for Andy Gross's new email address * Add support for mmap in RMTFS * Fixup for QMI to change txn wait to non-interruptible * Fixup for error code in probe of cmd-db * Fixup for slot number check in RMPH-RSC * tag 'qcom-drivers-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: MAINTAINERS: Update email for Qualcomm SoC maintainer drivers: soc: qcom: rpmh-rsc: Correct check for slot number soc: qcom: cmd-db: Fix an error code in cmd_db_dev_probe() soc: qcom: qmi: Change txn wait to non-interruptible soc: qcom: rmtfs: Add support for mmap functionality Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29soc: add aspeed folder and misc driversPatrick Venture8-18/+23
Create a SoC folder for the ASPEED parts and place the misc drivers currently present into this folder. These drivers are not generic part drivers, but rather only apply to the ASPEED SoCs. Signed-off-by: Patrick Venture <venture@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'imx-drivers-5.2' of ↵Olof Johansson9-89/+376
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers change for 5.2: - A series from Aisheng to generalize the SCU powerdomain driver for easier adding new SCU based platforms like imx8qm. - Add a generic i.MX8 SoC driver for reporting SoC and platform information. - Replace explicit polling loop with a call to regmap_read_poll_timeout() for gpcv2 driver to avoid code repetition. - Use devm_platform_ioremap_resource() to simplify gpc/gpcv2 driver code a bit. - Add general IRQ support for imx-scu driver, so that interrupt of device like RTC, thermal and watchdog can be handled. * tag 'imx-drivers-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: Add generic i.MX8 SoC driver firmware: imx: enable imx scu general irq function soc: imx: gpcv2: use devm_platform_ioremap_resource() to simplify code soc: imx: gpc: use devm_platform_ioremap_resource() to simplify code firmware: imx: scu-pd: decouple the SS information from domain names firmware: imx: scu-pd: add specifying the base of domain name index support firmware: imx: scu-pd: use bool to set postfix soc: imx: gpcv2: Make use of regmap_read_poll_timeout() Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29spi: zynqmp: Fix build breakOlof Johansson1-0/+1
Missing include: drivers/spi/spi-zynqmp-gqspi.c:1025:13: error: implicit declaration of function 'zynqmp_pm_get_eemi_ops'; did you mean 'zynqmp_process_dma_irq'? [-Werror=implicit-function-declaration] Fixes: 3d0313786470a ('drivers: Defer probe if firmware is not ready') Cc: Rajan Vaja <rajan.vaja@xilinx.com> Cc: Jolly Shah <jollys@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'amlogic-drivers-2' of ↵Olof Johansson1-16/+144
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers soc: amlogic: updates for v5.2, round 2 - VPU power domain: add supporg for G12A SoCs - socinfo: add new SoC and package IDS. * tag 'amlogic-drivers-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: soc: amlogic: meson-gx-pwrc-vpu: Add support for G12A soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'renesas-drivers-for-v5.2' of ↵Olof Johansson1-0/+3
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/drivers Renesas ARM Based SoC Drivers Updates for v5.2 * Identify R-Car M3-W ES1.3 * tag 'renesas-drivers-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: Identify R-Car M3-W ES1.3 Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'tegra-for-5.2-arm-soc' of ↵Olof Johansson3-17/+4
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers ARM: tegra: Core changes for v5.2-rc1 One of these patches enables PM by default on 32-bit ARM, following the same default that we already have on 64-bit ARM. The other patch fixes a cosmetic issue in the cpuidle driver for Tegra20 and Tegra30. * tag 'tegra-for-5.2-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: cpuidle: Handle tick broadcasting within cpuidle core on Tegra20/30 ARM: tegra: enforce PM requirement Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'tegra-for-5.2-memory' of ↵Olof Johansson9-66/+42
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers memory: tegra: Changes for v5.2-rc1 These are a set of fixes for various issues related to the Tegra memory controller. * tag 'tegra-for-5.2-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: memory: tegra: Fix a typos for "fdcdwr2" mc client Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+" memory: tegra: Replace readl-writel with mc_readl-mc_writel memory: tegra: Fix integer overflow on tick value calculation memory: tegra: Fix missed registers values latching memory: tegra: Properly spell "tegra" memory: tegra: Make terga20_mc_reset_ops static Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'tegra-for-5.2-soc' of ↵Olof Johansson4-78/+389
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers soc/tegra: Changes for v5.2-rc1 Besides a couple of fixes to better cope with deferred probing, this set of patches also implements the acquire/release protocol for resets used during powergate operations. This is necessary to allow these resets to be temporarily shared with other devices that may also need to control these resets. * tag 'tegra-for-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Move powergate initialisation to probe soc/tegra: pmc: Remove reset sysfs entries on error soc/tegra: pmc: Fix reset sources and levels soc/tegra: pmc: Implement acquire/release for resets reset: Add acquire/release support for arrays reset: Add acquired flag to of_reset_control_array_get() reset: add acquired/released state for exclusive reset controls Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'tegra-for-5.2-bus' of ↵Olof Johansson1-20/+46
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers bus/tegra: Changes for v5.2-rc1 This pair of patches adds support for system sleep to the ACONNECT bus found on Tegra SoCs. * tag 'tegra-for-5.2-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: bus: tegra-aconnect: add system sleep callbacks bus: tegra-aconnect: use devm_clk_*() helpers Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'tee-optee-for-5.2' of ↵Olof Johansson1-31/+49
http://git.linaro.org:/people/jens.wiklander/linux-tee into arm/drivers Allow OP-TEE driver to work without static shared memory * tag 'tee-optee-for-5.2' of http://git.linaro.org:/people/jens.wiklander/linux-tee: optee: allow to work without static shared memory Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'scmi-fixes-5.2' of ↵Olof Johansson1-4/+4
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers ARM SCMI fixes/cleanup for v5.2 1. Fix for of_node reference leak in scmi_mailbox_check by passing NULL argument to of_parse_phandle_with_args instead of dummy argument 2. Cleanup of_match_device->data NULL pointer handling using of_device_get_match_data() helper * tag 'scmi-fixes-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_scmi: replace of_match_device->data with of_device_get_match_data() firmware: arm_scmi: fix of_node leak in scmi_mailbox_check Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'zynqmp-soc-for-v5.2' of https://github.com/Xilinx/linux-xlnx into ↵Olof Johansson14-39/+302
arm/drivers arm64: zynqmp: SoC changes for v5.2 - Add support for ZynqMP fpga manager - Defer some probes which depends on firmware driver to be ready - Debugfs fix * tag 'zynqmp-soc-for-v5.2' of https://github.com/Xilinx/linux-xlnx: fpga manager: Adding FPGA Manager support for Xilinx zynqmp dt-bindings: fpga: Add bindings for ZynqMP fpga driver firmware: xilinx: Add fpga API's drivers: Defer probe if firmware is not ready firmware: xilinx: fix debugfs write handler Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-29Merge tag 'omap-for-v5.2/am4-pm-v2-signed' of ↵Olof Johansson11-62/+409
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers PM changes for am335x and am437x This series adds support for am437x RTC-only mode in suspend. In the RTC-only mode suspend, everything is shut down except the RTC. This makes the power consumption very low for suspend mode. To support RTC-only mode, we need to export omap_rtc_power_off_program() from the rtc driver and improve PM code to save and restore the wkup domain context. As RTC-only mode depends on the device being wired properly for things like memory, we need to also check for the machine type before we allow it. We also need to run DDR3 hardware leveling on resume. Note that there is a trivial merge conflict between the RTC branch and these changes where the RTC branch makes tm2bcd() a void function and the error handling parts can be just dropped. * tag 'omap-for-v5.2/am4-pm-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: sleep43xx: Run EMIF HW leveling on resume path memory: ti-emif-sram: Add ti_emif_run_hw_leveling for DDR3 hardware leveling soc: ti: pm33xx: AM437X: Add rtc_only with ddr in self-refresh support soc: ti: pm33xx: Move the am33xx_push_sram_idle to the top ARM: OMAP2+: pm33xx: Add support for rtc+ddr in self refresh mode rtc: OMAP: Add support for rtc-only mode Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-28Merge tag 'amlogic-drivers' of ↵Olof Johansson1-16/+27
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers soc: Amlogic updates for v5.2 - socinfo: support new SoCs / packages * tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: meson-gx-socinfo: add missing of_node_put after of_device_is_available soc: amlogic: gx-socinfo: Add new SoC IDs and Packages IDs soc: amlogic: gx-socinfo: Add mask for each SoC packages Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-20soc: imx: Add generic i.MX8 SoC driverAbel Vesa2-0/+116
Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code. For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ revision it will print 'unknown'. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-19MAINTAINERS: Update email for Qualcomm SoC maintainerAndy Gross1-1/+1
This patch changes the email for Andy Gross to agross@kernel.org. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-18memory: tegra: Fix a typos for "fdcdwr2" mc clientEdward Cragg2-2/+2
Fix typo for fdcwr2 to fdcdwr2 to match the TRM. Signed-off-by: Edward Cragg <drq.11235@gmail.com> Signed-off-by: Kejia Hu <kejia.hu@codethink.co.uk> Acked-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-18Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+"Dmitry Osipenko2-30/+0
Turned out that the actual bug was in the Memory Controller driver that programmed shadowed registers without latching the new values and then there was a bug on EMEM arbitration configuration calculation that results in a wrong value being latched on resume from suspend. The Memory Controller has been fixed properly now, hence the workaround patch could be reverted safely. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-18memory: tegra: Replace readl-writel with mc_readl-mc_writelDmitry Osipenko1-5/+5
There is no need for a memory barriers on reading/writing of register values as we only care about the read/write order, hence let's use the common helpers. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-18memory: tegra: Fix integer overflow on tick value calculationDmitry Osipenko1-1/+1
Multiplying the Memory Controller clock rate by the tick count results in an integer overflow and in result the truncated tick value is being programmed into hardware, such that the GR3D memory client performance is reduced by two times. Cc: stable <stable@vger.kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-18memory: tegra: Fix missed registers values latchingDmitry Osipenko1-0/+6
Some of Memory Controller registers are shadowed and require latching in order to copy assembly state into the active, MC_EMEM_ARB_CFG is one of these registers. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-18ARM: tegra: cpuidle: Handle tick broadcasting within cpuidle core on Tegra20/30Dmitry Osipenko2-17/+3
Tegra20/30 drivers do not handle the tick_broadcast_enter() error which potentially could happen when CPU timer isn't permitted to be stopped. Let's just move out the broadcasting to the CPUIDLE core by setting the respective flag in the Tegra20/30 drivers. This patch doesn't fix any problem because currently tick_broadcast_enter() could fail only on ARM64, so consider this change as a minor cleanup. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17optee: allow to work without static shared memoryVolodymyr Babchuk1-31/+49
On virtualized systems it is possible that OP-TEE will provide only dynamic shared memory support. So it is fine to boot without static SHM enabled if dymanic one is supported. Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2019-04-17soc/tegra: pmc: Move powergate initialisation to probeJon Hunter1-15/+68
Commit 8df127456f29 ("soc/tegra: pmc: Enable XUSB partitions on boot") was added as a workaround to ensure that the XUSB powergates or domains were turned on early during boot because as this time the Tegra XHCI driver did not handle the power domains at all. Now that the Tegra XHCI driver has been updated to properly managed the power domains, the workaround to enable the XUSB power domain early has been removed. This also means that we can now move the initialisation of the powergates into the PMC driver probe. Therefore, move the powergate initialisation into the PMC driver probe and return any errors detected. To handle any errors, functions to cleanup and remove any power-domains registered with the generic power-domain framework have been added. Finally the initialisation of the 'powergates_available' bitmask is kept in the PMC early init function to allow the legacy PMC powergate APIs to be called during early boot for enabling secondary CPUs on 32-bit Tegra devices. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17soc/tegra: pmc: Remove reset sysfs entries on errorJon Hunter1-1/+4
Commit 5f84bb1a4099 ("soc/tegra: pmc: Add sysfs entries for reset info") added sysfs entries for Tegra reset source and level. However, these sysfs are not removed on error and so if the registering of PMC device is probe deferred, then the next time we attempt to probe the PMC device warnings such as the following will be displayed on boot ... sysfs: cannot create duplicate filename '/devices/platform/7000e400.pmc/reset_reason' Fix this by calling device_remove_file() for each sysfs entry added on failure. Note that we call device_remove_file() unconditionally without checking if the sysfs entry was created in the first place, but this should be OK because kernfs_remove_by_name_ns() will fail silently. Fixes: 5f84bb1a4099 ("soc/tegra: pmc: Add sysfs entries for reset info") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-17soc/tegra: pmc: Fix reset sources and levelsJon Hunter1-15/+29
Commit 5f84bb1a4099 ("soc/tegra: pmc: Add sysfs entries for reset info") added support for reading the Tegra reset source and level from sysfs. However, there are a few issues with this commit which are ... 1. The number of reset sources for Tegra210 is defined as 5 but it should be 6. 2. The number of reset sources for Tegra186 is defined as 13 but it should be 15. 3. The SoC data variables num_reset_sources and num_reset_levels are defined but never used. Fix the above by ... 1. Removing the reset source 'AOTAG' from the tegra30_reset_sources because this is only applicable for Tegra210. 2. Adding a new tegra210_reset_sources structure for Tegra210 reset sources. 3. Correct the number of reset sources for Tegra210 and Tegra186 by using the ARRAY_SIZE macro. 4. Updating the functions reset_reason_show() and reset_level_show() to check whether the value read is valid. While we are at it clean-up these functions to remove an unnecessary u32 variable. Fixes: 5f84bb1a4099 ("soc/tegra: pmc: Add sysfs entries for reset info") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-16soc: amlogic: meson-gx-pwrc-vpu: Add support for G12ANeil Armstrong1-12/+140
The Amlogic G12A SoC has a very similar VPU Power Controller setup than the older GXBB, GXL & GXm SoCs. This patch adds the variant support for G12A. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-16soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmaskNeil Armstrong1-4/+4
The register bitmask to power on/off the VPU memories was incorectly set to 0x2 instead of 0x3. While still working, let's use the recommended vendor value instead. Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-04-15fpga manager: Adding FPGA Manager support for Xilinx zynqmpNava kishore Manne3-0/+169
This patch adds FPGA Manager support for the Xilinx ZynqMP chip. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Reviewed-by: Moritz Fischer <mdf@kernel.org> Acked-by: Alan Tull <atull@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-15dt-bindings: fpga: Add bindings for ZynqMP fpga driverNava kishore Manne1-0/+25
Add documentation to describe Xilinx ZynqMP fpga driver bindings. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Alan Tull <atull@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-15firmware: xilinx: Add fpga API'sNava kishore Manne2-0/+57
This Patch Adds fpga API's to support the Bitstream loading by using firmware interface. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Reviewed-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-12firmware: arm_scmi: replace of_match_device->data with ↵Aditya Pakki1-1/+3
of_device_get_match_data() of_match_device can return NULL if no matching device is found though it's highly unlikely to happen in scmi_probe as it's called only if a valid match is found. However we can use of_device_get_match_data() instead of of_match_device()->data to handle NULL pointer checks and return -EINVAL in such a scenario. Reviewed-by: Steven Price <steven.price@arm.com> Signed-off-by: Aditya Pakki <pakki001@umn.edu> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-04-12firmware: arm_scmi: fix of_node leak in scmi_mailbox_checkSteven Price1-3/+1
of_parse_phandle_with_args() requires the caller to call of_node_put() on the returned args->np pointer. Otherwise the reference count will remain incremented. However, in this case, since we don't actually use the returned pointer, we can simply pass in NULL. Fixes: aa4f886f3893f ("firmware: arm_scmi: add basic driver infrastructure for SCMI") Signed-off-by: Steven Price <steven.price@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-04-11memory: tegra: Properly spell "tegra"Thierry Reding7-29/+29
Rename all occurrences of "terga" to "tegra". It's an easy typo to make and a difficult one to spot. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-11memory: tegra: Make terga20_mc_reset_ops staticYue Haibing1-1/+1
Fix sparse warning: drivers/memory/tegra/tegra20.c:277:33: warning: symbol 'terga20_mc_reset_ops' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yue Haibing <yuehaibing@huawei.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-11firmware: imx: enable imx scu general irq functionAnson Huang4-1/+180
The System Controller Firmware (SCFW) controls RTC, thermal and WDOG etc., these resources' interrupt function are managed by SCU. When any IRQ pending, SCU will notify Linux via MU general interrupt channel #3, and Linux kernel needs to call SCU APIs to get IRQ status and notify each module to handle the interrupt. Since there is no data transmission for SCU IRQ notification, so doorbell mode is used for this MU channel, and SCU driver will use notifier mechanism to broadcast to every module which registers the SCU block notifier. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11soc: imx: gpcv2: use devm_platform_ioremap_resource() to simplify codeAnson Huang1-3/+1
Use the new helper devm_platform_ioremap_resource() which wraps the platform_get_resource() and devm_ioremap_resource() together, to simplify the code. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11soc: imx: gpc: use devm_platform_ioremap_resource() to simplify codeAnson Huang1-3/+1
Use the new helper devm_platform_ioremap_resource() which wraps the platform_get_resource() and devm_ioremap_resource() together, to simplify the code. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-10Merge branch 'omap-for-v5.2/am4-ddr3' into omap-for-v5.2/am4-pm-v2Tony Lindgren5-0/+54
2019-04-10drivers: soc: qcom: rpmh-rsc: Correct check for slot numberMaulik Shah1-1/+1
The return index value from bitmap_find_next_zero_area can be higher than available slot. So correct the check to return error in such case. Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Reviewed-by: Lina Iyer <ilina@codeaurora.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-09ARM: OMAP2+: sleep43xx: Run EMIF HW leveling on resume pathDave Gerlach1-0/+3
When returning from DeepSleep mode on AM437x platforms the EMIF must run DDR hardware leveling, same as done during u-boot, to properly restore the EMIF PHY to it's operational state on platforms using DDR3. Call the ti-emif-sram-pm run_hw_leveling routine to perform this. This happens after all other EMIF values are restored so the exact same configuration used at boot is used at the end of EMIF resume as well. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-09memory: ti-emif-sram: Add ti_emif_run_hw_leveling for DDR3 hardware levelingDave Gerlach4-0/+51
In certain situations, such as when returning from low power modes, the EMIF must re-run hardware leveling to properly restore DDR3 access. This is accomplished by introducing a new ti-emif-sram-pm call, ti_emif_run_hw_leveling, to check if DDR3 is in use and if so, trigger the full write and read leveling processes. Suggested-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08soc: ti: pm33xx: AM437X: Add rtc_only with ddr in self-refresh supportKeerthy2-11/+185
During RTC-only suspend, power is lost to the wkup domain, so we need to save and restore the state of that domain. We also need to store some information within the RTC registers so that u-boot can do the right thing at powerup. The state is entered by getting the RTC to bring the pmic_power_en line low which will instruct the PMIC to disable the appropriate power rails after putting DDR into self-refresh mode. To bring pmic_power_en low, we need to get an ALARM2 event. Since we are running from SRAM at that point, it means calculating what the next second is (via ASM) and programming that into the RTC. This patch also adds support for wake up source detection. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08soc: ti: pm33xx: Move the am33xx_push_sram_idle to the topKeerthy1-50/+50
Move the am33xx_push_sram_idle function to the top as a preparation for rtc+ddr mode as the function will be called by multiple functions currently present before it. No functional changes. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08ARM: OMAP2+: pm33xx: Add support for rtc+ddr in self refresh modeKeerthy2-1/+80
Add support for rtc+ddr in self refresh mode. Add addtional pm hooks for save/restore and rtc suspend/resume. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08rtc: OMAP: Add support for rtc-only modeKeerthy2-9/+49
Prepare rtc driver for rtc-only with DDR in self-refresh mode. omap_rtc_power_off now should cater to two features: 1) RTC plus DDR in self-refresh is power a saving mode where in the entire system including the different voltage rails from PMIC are shutdown except the ones feeding on to RTC and DDR. DDR is kept in self-refresh hence the contents are preserved. RTC ALARM2 is connected to PMIC_EN line once we the ALARM2 is triggered we enter the mode with DDR in self-refresh and RTC Ticking. After a predetermined time an RTC ALARM1 triggers waking up the system[1]. The control goes to bootloader. The bootloader then checks RTC scratchpad registers to confirm it was an rtc_only wakeup and follows a different path, configure bare minimal clocks for ddr and then jumps to the resume address in another RTC scratchpad registers and transfers the control to Kernel. Kernel then restores the saved context. omap_rtc_power_off_program does the ALARM2 programming part. [1] http://www.ti.com/lit/ug/spruhl7h/spruhl7h.pdf Page 2884 2) Power-off: This is usual poweroff mode. omap_rtc_power_off calls the above omap_rtc_power_off_program function and in addition to that programs the OMAP_RTC_PMIC_REG for any external wake ups for PMIC like the pushbutton and shuts off the PMIC. Hence the split in omap_rtc_power_off. Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> [tony@atomide.com: folded in a fix for compile warning] Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-01Linux 5.1-rc3Linus Torvalds1-1/+1
2019-03-31Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds60-201/+409
Pull KVM fixes from Paolo Bonzini: "A collection of x86 and ARM bugfixes, and some improvements to documentation. On top of this, a cleanup of kvm_para.h headers, which were exported by some architectures even though they not support KVM at all. This is responsible for all the Kbuild changes in the diffstat" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (28 commits) Documentation: kvm: clarify KVM_SET_USER_MEMORY_REGION KVM: doc: Document the life cycle of a VM and its resources KVM: selftests: complete IO before migrating guest state KVM: selftests: disable stack protector for all KVM tests KVM: selftests: explicitly disable PIE for tests KVM: selftests: assert on exit reason in CR4/cpuid sync test KVM: x86: update %rip after emulating IO x86/kvm/hyper-v: avoid spurious pending stimer on vCPU init kvm/x86: Move MSR_IA32_ARCH_CAPABILITIES to array emulated_msrs KVM: x86: Emulate MSR_IA32_ARCH_CAPABILITIES on AMD hosts kvm: don't redefine flags as something else kvm: mmu: Used range based flushing in slot_handle_level_range KVM: export <linux/kvm_para.h> and <asm/kvm_para.h> iif KVM is supported KVM: x86: remove check on nr_mmu_pages in kvm_arch_commit_memory_region() kvm: nVMX: Add a vmentry check for HOST_SYSENTER_ESP and HOST_SYSENTER_EIP fields KVM: SVM: Workaround errata#1096 (insn_len maybe zero on SMAP violation) KVM: Reject device ioctls from processes other than the VM's creator KVM: doc: Fix incorrect word ordering regarding supported use of APIs KVM: x86: fix handling of role.cr4_pae and rename it to 'gpte_size' KVM: nVMX: Do not inherit quadrant and invalid for the root shadow EPT ...
2019-03-31Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds8-22/+19
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Thomas Gleixner: "A pile of x86 updates: - Prevent exceeding he valid physical address space in the /dev/mem limit checks. - Move all header content inside the header guard to prevent compile failures. - Fix the bogus __percpu annotation in this_cpu_has() which makes sparse very noisy. - Disable switch jump tables completely when retpolines are enabled. - Prevent leaking the trampoline address" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/realmode: Make set_real_mode_mem() static inline x86/cpufeature: Fix __percpu annotation in this_cpu_has() x86/mm: Don't exceed the valid physical address space x86/retpolines: Disable switch jump tables when retpolines are enabled x86/realmode: Don't leak the trampoline kernel address x86/boot: Fix incorrect ifdeffery scope x86/resctrl: Remove unused variable
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