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2020-11-26ARM: tegra: Add missing gpu-throt-level to Tegra124 socthermNicolas Chauvet1-0/+1
On Jetson TK1 the following message can be seen: tegra_soctherm 700e2000.thermal-sensor: throttle-cfg: heavy: no throt prop or invalid prop This patch will fix the invalid prop issue according to the binding. Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: Populate OPP table for Tegra20 VentanaJon Hunter1-0/+11
Commit 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)") update the Tegra20 CPUFREQ driver to use the generic CPUFREQ device-tree driver. Since this change CPUFREQ support on the Tegra20 Ventana platform has been broken because the necessary device-tree nodes with the operating point information are not populated for this platform. Fix this by updating device-tree for Venata to include the operating point informration for Tegra20. Fixes: 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)") Cc: stable@vger.kernel.org Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: nexus7: Use panel-lvds as the only panel compatibleDmitry Osipenko1-2/+10
Depending on a driver probe order, panel-simple driver may probe first, which results in this error: panel-simple display-panel: Reject override mode: panel has a fixed mode We don't want to use panel-simple anyways because customized timings are preferred for Nexus 7, hence remove the panel-simple compatibles from the panel node. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: nexus7: Rename gpio-hog nodesDmitry Osipenko3-4/+4
Devicetree schema now requires gpio-hog nodes to have a certain naming pattern, like a -hog suffix. This patch fixes dtbs_check warnings about the names. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: nexus7: Add power-supply to lvds-encoder nodeDmitry Osipenko1-0/+1
The lvds-encoder binding now supports power-supply property, let's specify it in the device-tree for completeness. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: nexus7: Improve CPU passive-cooling thresholdDmitry Osipenko1-3/+3
The current CPU thermal limit is a bit inappropriate for Nexus 7 once device is getting used on a daily bases. For example, currently it's may be impossible to watch a hardware accelerated 720p video without hitting a severe CPU throttling, which ruins user experience. This patch improves the thermal throttling thresholds. In my experience setting CPU thermal threshold to 57C provides the most reasonable result, where device is a bit warm under constant load and not getting overly hot, in the same time performance is okay. Let's bump the passive-cooling threshold from 50C to 57C and also lower the thermal hysteresis to 0.2C in order to make throttling more reactive. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: nexus7: Correct thermal zone namesDmitry Osipenko1-2/+2
Rename thermal zones in order fix dt_binding_check warning telling that names do not match the expected pattern. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: acer-a500: Add power-supply to lvds-encoder nodeDmitry Osipenko1-0/+1
The lvds-encoder binding now supports power-supply property, let's specify it in the device-tree for completeness. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: acer-a500: Correct thermal zone namesDmitry Osipenko1-2/+2
Rename thermal zones in order fix dt_binding_check warning telling that names do not match the expected pattern. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: Add device-tree for OuyaPeter Geis2-1/+4513
The Ouya was the sole device produced by Ouya Inc in 2013. It was a game console originally running Android 5 on top of Linux 3.1.10. This patch adds the device tree supporting the Ouya. It has been tested on the original variant with Samsung ram. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26Merge branch 'for-5.11/dt-bindings' into for-5.11/arm/dtThierry Reding3-0/+188
2020-11-26dt-bindings: bus: Convert ACONNECT doc to json-schemaSameer Pujar2-44/+82
Move ACONNECT documentation to YAML format. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26dt-bindings: interrupt-controller: arm,gic: Update Tegra compatiblesSameer Pujar1-1/+8
Update Tegra compatibles to support newer Tegra chips and required combinations. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26dt-bindings: dma: Convert ADMA doc to json-schemaSameer Pujar2-56/+99
Move ADMA documentation to YAML format. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26dt-bindings: memory: tegra124: Add memory client IDsDmitry Osipenko1-0/+68
Each memory client has unique hardware ID, add these IDs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26dt-bindings: Fix entry name for I/O High Voltage propertyVidya Sagar1-1/+1
Correct the name of the I/O High Voltage Property from 'nvidia,io-high-voltage' to 'nvidia,io-hv'. Fixes: 2585a584f844 ("pinctrl: Add Tegra194 pinctrl DT bindings") Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26dt-bindings: ARM: tegra: Add Ouya game consolePeter Geis1-0/+3
Add a binding for the Tegra30-based Ouya game console. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26dt-bindings: Add vendor prefix for Ouya Inc.Peter Geis1-0/+2
Ouya is a defunct company from 2012 to 2015. They produced a single device, the Ouya game console. In 2015 they were purchased by Razer Inc. and the Ouya was discontinued. All Ouya services were shuttered in 2019. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26dt-bindings: memory: tegra30: Add memory client IDsDmitry Osipenko1-0/+67
Each memory client has unique hardware ID, add these IDs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26dt-bindings: memory: tegra20: Add memory client IDsDmitry Osipenko1-0/+53
Each memory client has unique hardware ID, add these IDs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26arm64: dts: qcom: sdm845: use GIC_SPI for IPA interruptsAlex Elder1-2/+2
Use GIC_SPI rather than 0 in the specifiers for the two ARM GIC interrupts used by IPA. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20201126015457.6557-4-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26arm64: dts: qcom: sc7180: use GIC_SPI for IPA interruptsAlex Elder1-2/+2
Use GIC_SPI rather than 0 in the specifiers for the two ARM GIC interrupts used by IPA. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20201126015457.6557-3-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26arm64: dts: qcom: sc7180: limit IPA iommu streamsAlex Elder1-1/+2
Recently we learned that Android and Windows firmware don't seem to like using 3 as an iommu mask value for IPA. A simple fix was to specify exactly the streams needed explicitly, rather than implying a range with the mask. Make the same change for the SC7180 platform. See also: https://lore.kernel.org/linux-arm-msm/20201123052305.157686-1-bjorn.andersson@linaro.org/ Fixes: d82fade846aa8 ("arm64: dts: qcom: sc7180: add IPA information") Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20201126015457.6557-2-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26arm64: dts: qcom: sm8150: Add Coresight supportSai Prakash Ranjan1-0/+591
Add coresight components found on Qualcomm Technologies, Inc. SM8150 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201126052422.24869-1-saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26ARM: dts: qcom: msm8974-lge-nexus5: Add fuel gaugeIskren Chernev1-0/+25
The LG Nexus 5 uses a maxim17048 fuelgauge. The maxim,rcomp value is taken from downstream dt. Temperature-based compensation is not yet supported in the mainline driver, but the readings seem fine nevertheless. Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@protonmail.com> Link: https://lore.kernel.org/r/20201126141144.1763779-2-iskren.chernev@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26ARM: dts: qcom: msm8974-klte: Add fuel gaugeIskren Chernev1-0/+39
The Samsung Galaxy S5 uses a maxim17048 fuelgauge. The maxim,rcomp value is taken from downstream kernel. Model data and temperature-based compensation are not yet supported in the mainline driver, but the readings seem fine nevertheless. Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> Link: https://lore.kernel.org/r/20201126141144.1763779-1-iskren.chernev@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26arm64: tegra: Fix Tegra194 HDA {clock,reset}-names orderingSameer Pujar1-6/+6
As per the HDA binding doc reorder {clock,reset}-names entries for Tegra194. This also serves as a preparation for converting existing binding doc to json-schema. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26arm64: tegra: Enable AHCI on Jetson TX2Sowjanya Komatineni2-0/+32
This patch enables AHCI on Jetson TX2. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210Sowjanya Komatineni2-6/+6
Tegra AHCI dt-binding doc is converted from text based to yaml based. dtbs_check valdiation strictly follows reset-names order specified in yaml dt-binding. Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold. Tegra186 has 2 resets sata and sata-cold. This patch changes order of SATA resets to maintain proper resets order for commonly available resets across Tegra124 thru Tegra186 for dtbs_check to pass. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26arm64: tegra: Add XUSB pad controller interruptJC Kuo3-0/+3
This commit adds "interrupts" property to Tegra210/Tegra186/Tegra194 XUSB PADCTL node. XUSB PADCTL interrupt will be raised when USB wake event happens. This is required for supporting XUSB host controller ELPG. Signed-off-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatiblesAhmad Fatoum1-1/+1
Earlier commit modified the binding, so the SiP is to be specified as well. Adjust the device tree accordingly. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1Ahmad Fatoum1-1/+7
The Linux Automation MC-1 is built around an OSD32MP15x SiP with CPU, RAM, PMIC, Oscillator and EEPROM. Adjust the binding, so the SiP compatible is contained as well. This allows boot firmware to match against it to apply fixups if necessary. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26dt-bindings: vendor-prefixes: document Octavo Systems oct prefixAhmad Fatoum1-0/+2
Octavo Systems is an American company specializing in design and manufacturing of System-in-Package devices. The prefix is already in use for the Octavo Systems OSD3358-SM-RED device tree, but was so far undocumented. Fix this. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Cc: Neeraj Dantu <neeraj.dantu@octavosystems.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: Add DHCOM based PicoITX boardMarek Vasut3-0/+179
Add DT for DH PicoITX unit, which is a bare-bones carrier board for the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom board-to-board expansion connector. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boardsMarek Vasut1-1/+14
Document devicetree compatible strings of the DH SoMs and boards. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP sysconAhmad Fatoum1-1/+1
The stm32mp1 TAMP peripheral has 32 backup registers that survive a warm reset. This makes them suitable for storing a reboot mode, which the vendor's kernel tree is already doing[0]. The actual syscon-reboot-mode child node can be added by a board.dts or fixed up by the bootloader. For the child node to be probed, the compatible needs to include simple-mfd. The binding now specifies this, so have the SoC dtsi adhere to it. [0]: https://github.com/STMicroelectronics/linux/commit/2e9bfc29dd Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26dt-bindings: arm: stm32: add simple-mfd compatible for tamp nodeAhmad Fatoum1-0/+4
The stm32mp1 TAMP (Tamper and backup registers) does tamper detection and features 32 backup registers that, being in the RTC domain, may survive even with Vdd switched off. This makes it suitable for use to communicate a reboot mode from OS to bootloader via the syscon-reboot-mode binding. Add a "simple-mfd" to support probing such a child node. The actual reboot mode node could then be defined in a board.dts or fixed up by the bootloader. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: update stm32mp151 for remote proc synchronization supportArnaud Pouliquen1-0/+7
Two backup registers are used to store the Cortex-M4 state and the resource table address. Declare the tamp node and add associated properties in m4_rproc node to allow Linux to attach to a firmware loaded by the first boot stages. Associated driver implementation is available in commit 9276536f455b3 ("remoteproc: stm32: Parse syscon that will manage M4 synchronisation"). Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151Amelie Delaunay1-2/+2
Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes). This patch optimizes USB OTG FIFO sizes accordingly. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: fix dmamux reg property on stm32h743Amelie Delaunay1-1/+1
Reg property length should cover all DMAMUX_CxCR registers. DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest offset is at 0x3c, so length should be 0x40. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: fix dmamux reg property on stm32mp151Amelie Delaunay1-1/+1
Reg property length should cover all DMAMUX_CxCR registers. DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest offset is at 0x3c, so length should be 0x40. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151Amelie Delaunay1-3/+3
Update mdma1 clients channel priority level following stm32-mdma bindings. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkxAmelie Delaunay2-0/+37
This patch adds support for STUSB1600 USB Type-C port controller, used on I2C4 on stm32mp15xx-dkx. The default configuration on this board, on Type-C connector, is: - Dual Power Role (DRP), so set power-role to "dual"; - Vbus limited to 500mA, so set typec-power-opmode to "default" (it means 500mA in USB 2.0). typec-power-opmode is used to reconfigure the STUSB1600 advertising of current capability when its NVM is not in line with the board layout. On stm32mp15xx-dkx, Vbus power source of STUSB1600 is 5V_VIN. So power operation mode depends on the power supply used. To avoid any power issues, it is better to limit Vbus to 500mA on this board. ALERT# is the interrupt pin of STUSB1600. It needs an external pull-up, and signal is active low. USB OTG controller ID and Vbus signals are not connected on stm32mp15xx-dkx boards, so disconnection are not detected. Without DWC2 usb-role-switch: - if you unplug the USB cable from the Type-C port, you have to manually disconnect the USB gadget: echo disconnect > /sys/devices/platform/soc/49000000.usb-otg/udc/49000000.usb-otg/soft_connect - Then you can plug the USB cable again in the Type-C port, and manually reconnect the USB gadget: echo connect > /sys/devices/platform/soc/49000000.usb-otg/udc/49000000.usb-otg/soft_connect With DWC2 usb-role-switch, USB gadget is dynamically disconnected or connected. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26dt-bindings: usb: Add DT bindings for STUSB160x Type-C controllerAmelie Delaunay1-0/+87
Add binding documentation for the STMicroelectronics STUSB160x Type-C port controller. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26dt-bindings: connector: add typec-power-opmode property to usb-connectorAmelie Delaunay1-0/+24
Power operation mode may depends on hardware design, so, add the optional property typec-power-opmode for usb-c connector to select the power operation mode capability. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrlPatrick Delaunay1-14/+14
Move spi4 at the right alphabetical place within stm32mp15-pinctrl Fixes: 4fe663890ac5 ("ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval boardHugues Fruchet1-0/+1
Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5). Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 boardHugues Fruchet1-0/+1
Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5). Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: enable CRYP by default on stm32mp15Lionel Debieve2-0/+8
Enable CRYP1 device for cryp accelerated support on stm32mp157C-EV1/DK2 STMicroelectronics platforms. Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: enable CRC1 by default on stm32mp15Nicolas Toromanoff2-0/+8
Enable CRC1 device for CRC-32 accelerated support on stm32mp15 STMicroelectronics platforms. Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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