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2021-10-15tee: add sec_world_id to struct tee_shmJens Wiklander1-1/+6
Adds sec_world_id to struct tee_shm which describes a shared memory object. sec_world_id can be used by a driver to store an id assigned by secure world. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-15memory: tegra20-emc: Support matching timings by LPDDR2 configurationDmitry Osipenko2-14/+186
ASUS Transformer TF101 doesn't provide RAM code and in this case memory timings should be selected based on identity information read out from SDRAM chip. Support matching timings by LPDDR2 configuration. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15memory: Add LPDDR2-info helpersDmitry Osipenko4-0/+184
Add common helpers for reading and parsing standard LPDDR2 configuration properties. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20211006224659.21434-9-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-nodeDmitry Osipenko1-2/+21
Some Tegra20 boards don't have RAM code stored in NVMEM, which is used for the memory chip identification and the identity information should be read out from LPDDR2 chip in this case. Document new sub-node containing generic LPDDR2 properties that will be used for the memory chip identification if RAM code isn't available. The identification is done by reading out memory configuration values from generic LPDDR2 mode registers of SDRAM chip and comparing them with the values of device-tree 'lpddr2' sub-node. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-8-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: Add vendor prefix for Elpida MemoryDmitry Osipenko1-0/+2
Elpida Memory designed, manufactured and sold dynamic random-access memory (DRAM) products. It was acquired by Micron Technology in 2013, still there are many devices with components from Elpida. Document the vendor prefix. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-6-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-FDmitry Osipenko1-0/+1
Elpida B8132B2PB-6D-F memory chip is used by ASUS Transformer TF101 tablet, add compatible for it. We need to specify this compatible it for a device-tree node containing corresponding memory timings in order to allow software to match the timings with the detected hardware. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-5-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: memory: lpddr2: Add revision-id propertiesDmitry Osipenko1-0/+14
Add optional revision-id standard LPDDR2 properties which will help to identify memory chip. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-4-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: memory: lpddr2: Convert to schemaDmitry Osipenko2-102/+208
Convert LPDDR2 binding to schema. I removed obsolete ti,jedec-lpddr2-* compatibles since they were never used by device-trees and by the code. I also changed "Elpida" compatible prefix to lowercase "elpida". Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-3-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: Relocate DDR bindingsDmitry Osipenko5-3/+5
Move DDR bindings to memory-controllers directory to make them more discoverable. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-2-digetx@gmail.com [krzysztof: Correct path in lpddr3.txt and samsung,exynos5422-dmc.yaml] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15soc: samsung: exynos-chipid: Add Exynos850 supportSam Protsenko1-0/+10
Add chip-id support for Exynos850 SoC. Despite its "E3830" ID, the actual SoC name is Exynos850 (Exynos3830 name is internal and outdated). Format of Product_ID register in Exynos850 (offset 0x0): [31:0] Product ID (identification) Format of CHIPID_REV register in Exynos850 (offset 0x10): [23:20] Main revision [19:16] Sub revision Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20211014133508.1210-3-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15dt-bindings: samsung: exynos-chipid: Document Exynos850 compatibleSam Protsenko1-2/+3
Add compatible string for Exynos850 chip-id. While at it, use enum instead of items/const, to reduce further cluttering of "compatible" list. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20211014133508.1210-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15soc: samsung: exynos-chipid: Pass revision reg offsetsSam Protsenko2-15/+60
Old Exynos SoCs have both Product ID and Revision ID in one single register, while new SoCs tend to have two separate registers for those IDs. Implement handling of both cases by passing Revision ID register offsets in driver data. Previously existing macros for Exynos4210 (removed in this patch) were incorrect: #define EXYNOS_SUBREV_MASK (0xf << 4) #define EXYNOS_MAINREV_MASK (0xf << 0) Actual format of PRO_ID register in Exynos4210 (offset 0x0): [31:12] Product ID [9:8] Package information [7:4] Main Revision Number [3:0] Sub Revision Number This patch doesn't change the behavior on existing platforms, so '/sys/devices/soc0/revision' will show the same string as before. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Henrik Grimler <henrik@grimler.se> Link: https://lore.kernel.org/r/20211014133508.1210-1-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-15soc: imx: imx8m-blk-ctrl: off by one in imx8m_blk_ctrl_xlate()Dan Carpenter1-1/+1
The > comparison should be >= to prevent reading one element beyond the end of the array. The onecell_data->domains[] array is allocated in imx8m_blk_ctrl_probe() and it has "onecell_data->num_domains" elements. Fixes: 5b340e7813d4 ("soc: imx: add i.MX8M blk-ctrl driver") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15soc: qcom: smem: Support reserved-memory descriptionBjorn Andersson2-18/+40
Practically all modern Qualcomm platforms has a single reserved-memory region for SMEM. So rather than having to describe SMEM in the form of a node with a reference to a reserved-memory node, allow the SMEM device to be instantiated directly from the reserved-memory node. The current means of falling back to dereferencing the "memory-region" is kept as a fallback, if it's determined that the SMEM node is a reserved-memory node. The "qcom,smem" compatible is added to the reserved_mem_matches list, to allow the reserved-memory device to be probed. In order to retain the readability of the code, the resolution of resources is split from the actual ioremapping. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20210930182111.57353-4-bjorn.andersson@linaro.org
2021-10-15dt-bindings: soc: smem: Make indirection optionalBjorn Andersson1-4/+30
In the olden days the Qualcomm shared memory (SMEM) region consisted of multiple chunks of memory, so SMEM was described as a standalone node with references to its various memory regions. But practically all modern Qualcomm platforms has a single reserved memory region used for SMEM. So rather than having to use two nodes to describe the one SMEM region, update the binding to allow the reserved-memory region alone to describe SMEM. The olden format is preserved as valid, as this is widely used already. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20210930182111.57353-3-bjorn.andersson@linaro.org
2021-10-15dt-bindings: sram: Document qcom,rpm-msg-ramBjorn Andersson1-1/+4
The Qualcomm SMEM binding always depended on a reference to a SRAM node of compatible "qcom,rpm-msg-ram", document this as part of the SRAM binding. The SRAM is consumed as a whole and not split up using subnodes, so properties related to this are not required. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/r/20210930182111.57353-2-bjorn.andersson@linaro.org
2021-10-14Merge tag 'arm-soc/for-5.16/drivers' of https://github.com/Broadcom/stblinux ↵Arnd Bergmann5-8/+11
into arm/drivers This pull request contains Broadcom ARM/ARM64 SoC drivers changes for 5.16, please pull the following: - Cai updates the bcm-pmb and bcm63xx-power drivers to use the devm_platform_ioremap_resource() helper - Florian updates the Bus Interface Unit code to tune the 72116 and 72113 chips according to their existing counterparts. The GISB driver is updated to be built as a non-removable module * tag 'arm-soc/for-5.16/drivers' of https://github.com/Broadcom/stblinux: bus: brcmstb_gisb: Allow building as module soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72116 soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72113 soc: bcm63xx-power: Make use of the helper function devm_platform_ioremap_resource() soc: bcm: bcm-pmb: Make use of the helper function devm_platform_ioremap_resource() Link: https://lore.kernel.org/r/20211013174016.831348-3-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-13Merge tag 'qcom-drivers-for-5.16' of ↵Arnd Bergmann36-598/+1259
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.16 This drops the use of power-domains for exposing the load_state from the QMP driver to clients, to avoid issues related to system suspend. SMP2P becomes wakeup capable, to allow dying remoteprocs to wake up Linux from suspend to perform recovery. It adds RPM power-domain support for SM6350 and MSM8953 and base RPM support for MSM8953 and QCM2290. It adds support for MSM8996, SDM630 and SDM660 in the SPM driver, which will enable the introduction of proper voltage scaling of the CPU subsystem. Support for releasing secondary CPUs on MSM8226 is introduced. The Asynchronous Packet Router (APR) driver is extended to support the new Generic Packet Router (GPR) variant, which is used to communicate with the firmware in the new AudioReach audio driver. Lastly it transitions a number of drivers to safer string functions, as well as switching things to use devm_platform_ioremap_resource(). * tag 'qcom-drivers-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (40 commits) soc: qcom: apr: Add GPR support soc: dt-bindings: qcom: add gpr bindings soc: qcom: apr: make code more reuseable soc: dt-bindings: qcom: apr: deprecate qcom,apr-domain property soc: dt-bindings: qcom: apr: convert to yaml dt-bindings: soc: qcom: aoss: Delete unused power-domain definitions dt-bindings: msm/dp: Remove aoss-qmp header soc: qcom: aoss: Drop power domain support dt-bindings: soc: qcom: aoss: Drop the load state power-domain soc: qcom: smp2p: Add wakeup capability to SMP2P IRQ dt-bindings: power: rpmpd: Add SM6350 to rpmpd binding dt-bindings: soc: qcom: aoss: Add SM6350 compatible soc: qcom: llcc: Disable MMUHWT retention soc: qcom: smd-rpm: Add QCM2290 compatible dt-bindings: soc: qcom: smd-rpm: Add QCM2290 compatible firmware: qcom_scm: Add compatible for MSM8953 SoC dt-bindings: firmware: qcom-scm: Document msm8953 bindings soc: qcom: pdr: Prefer strscpy over strcpy soc: qcom: rpmh-rsc: Make use of the helper function devm_platform_ioremap_resource_byname() soc: qcom: gsbi: Make use of the helper function devm_platform_ioremap_resource() ... Link: https://lore.kernel.org/r/20211012173442.1017010-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-13bus: sun50i-de2: Adjust printing error messageJernej Skrabec1-4/+3
SRAM driver often returns -EPROBE_DEFER and thus this bus driver often prints error message, even if it probes successfully later. This is confusing for users and they often think that something is wrong. Use dev_err_probe() helper for printing error message. It handles -EPROBE_DEFER automatically. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211010071812.145178-1-jernej.skrabec@gmail.com
2021-10-12tee: optee: Fix missing devices unregister during optee_removeSumit Garg3-0/+26
When OP-TEE driver is built as a module, OP-TEE client devices registered on TEE bus during probe should be unregistered during optee_remove. So implement optee_unregister_devices() accordingly. Fixes: c3fa24af9244 ("tee: optee: add TEE bus device enumeration support") Reported-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-11Merge tag 'omap-for-v5.16/ti-sysc-signed' of ↵Arnd Bergmann2-35/+244
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers Driver changes for ti-sysc for v5.16 Changes for ti-sysc driver for improved system suspend and resume support as some drivers need to be reinitialized on resume. Also a non-urgent resume warning fix, and dropping of legacy flags for gpio and sham: - Fix timekeeping suspended warning on resume. Probably no need to merge this into fixes as it's gone unnoticed for a while. - Check for context loss for reinit of a module - Add add quirk handling to reinit on context loss, and also fix a build warning it caused - Add quirk handling to reset on reinit - Use context loss quirk for gpmc and otg - Handle otg force-idle quirk even if no driver is loaded - Drop legacy flags for gpio and sham * tag 'omap-for-v5.16/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: bus: ti-sysc: Fix variable set but not used warning for reinit_modules bus: ti-sysc: Drop legacy quirk flag for sham bus: ti-sysc: Drop legacy quirk flag for gpio bus: ti-sysc: Handle otg force idle quirk bus: ti-sysc: Use context lost quirk for otg bus: ti-sysc: Use context lost quirks for gpmc bus: ti-sysc: Add quirk handling for reset on re-init bus: ti-sysc: Add quirk handling for reinit on context lost bus: ti-sysc: Check for lost context in sysc_reinit_module() bus: ti-sysc: Fix timekeeping_suspended warning on resume Link: https://lore.kernel.org/r/pull-1633950030-501948@atomide.com-2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'v5.15-next-soc' of ↵Arnd Bergmann6-1/+199
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers - mt8192: add mutex support - mmsys: add more components add routing table for mt8192 add reset controller support * tag 'v5.15-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: drm/mediatek: mtk_dsi: Reset the dsi0 hardware soc: mediatek: mmsys: Add reset controller support soc: mediatek: add mtk mutex support for MT8192 soc: mediatek: mmsys: Add mt8192 mmsys routing table soc: mediatek: mmsys: add comp OVL_2L2/POSTMASK/RDMA4 Link: https://lore.kernel.org/r/b1d364d0-f2ae-488b-b3f7-c694049c20d3@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'memory-controller-drv-5.16' of ↵Arnd Bergmann6-51/+141
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.16 1. Renesas RPC: fix unaligned bus access and QSPI data transfers in manual modes. 2. Renesas RPC: select RESET_CONTROLLER as it is necessary for operation. 3. FSL IFC: fix error paths. 4. Broadcom: allow building as module. * tag 'memory-controller-drv-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probe memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLER memory: brcmstb_dpfe: Allow building Broadcom STB DPFE as module memory: samsung: describe drivers in KConfig memory: renesas-rpc-if: Avoid unaligned bus access for HyperFlash memory: renesas-rpc-if: Correct QSPI data transfer in Manual mode dt-bindings: rpc: renesas-rpc-if: Add support for the R8A779A0 RPC-IF Link: https://lore.kernel.org/r/20211010175836.13302-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'memory-controller-drv-mtk-5.16' of ↵Arnd Bergmann4-248/+393
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.14 - Mediatek Add MT8195 support to the Mediatek SMI memory controller driver. This brings also several cleanups and minor enhancements before adding actual new device support. * tag 'memory-controller-drv-mtk-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: MAINTAINERS: Add entry for MediaTek SMI memory: mtk-smi: mt8195: Add initial setting for smi-larb memory: mtk-smi: mt8195: Add initial setting for smi-common memory: mtk-smi: mt8195: Add smi support memory: mtk-smi: Use devm_platform_ioremap_resource memory: mtk-smi: Add clocks for smi-sub-common memory: mtk-smi: Add device link for smi-sub-common memory: mtk-smi: Add error handle for smi_probe memory: mtk-smi: Adjust some code position memory: mtk-smi: Rename smi_gen to smi_type memory: mtk-smi: Use clk_bulk clock ops dt-bindings: memory: mediatek: Add mt8195 smi sub common dt-bindings: memory: mediatek: Add mt8195 smi binding Link: https://lore.kernel.org/r/20211010175836.13302-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'memory-controller-drv-tegra-5.16' of ↵Arnd Bergmann5-19/+23
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.16 - Tegra SoC 1. Several minor improvements. 2. Handle errors in BPMP response of Tegra186 EMC. * tag 'memory-controller-drv-tegra-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with memory: tegra186-emc: Fix error return code in tegra186_emc_probe() memory: tegra: Make use of the helper function devm_add_action_or_reset() memory: tegra186-emc: Handle errors in BPMP response memory: tegra: Remove interconnect state syncing hack memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE memory: tegra30-emc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE memory: tegra: make the array list static const, makes object smaller Link: https://lore.kernel.org/r/20211010175836.13302-3-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'tegra-for-5.16-cpuidle' of ↵Arnd Bergmann3-2/+27
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers cpuidle: tegra: Changes for v5.16-rc1 This pulls in the for-5.16/clk and for-5.16/soc branches and uses the stubs added in them to enable compile testing of the cpuidle driver. While at it, this also fixes a potential driver probe order race condition between the PMC and the cpuidle driver. * tag 'tegra-for-5.16-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: cpuidle: tegra: Check whether PMC is ready cpuidle: tegra: Enable compile testing clk: tegra: Add stubs needed for compile testing Link: https://lore.kernel.org/r/20211008201132.1678814-5-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'tegra-for-5.16-soc' of ↵Arnd Bergmann6-13/+138
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers soc/tegra: Changes for v5.16-rc1 This set consists of stub additions to enable compile testing for more drivers, exposes the PMC's USB regmap on all SoC generations, removes a state synchronization workaround that is no longer needed and adds an error reporting driver that can help troubleshoot crashes. To top it all off, an error handling path in the powergating code is fixed and the devm_platform_ioremap_resource() function is used to remove some boilerplate code. * tag 'tegra-for-5.16-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Use devm_platform_ioremap_resource() soc/tegra: Add Tegra186 ARI driver soc/tegra: Fix an error handling path in tegra_powergate_power_up() soc/tegra: pmc: Expose USB regmap to all SoCs soc/tegra: pmc: Disable PMC state syncing soc/tegra: pm: Make stubs usable for compile testing soc/tegra: irq: Add stubs needed for compile testing soc/tegra: fuse: Add stubs needed for compile testing Link: https://lore.kernel.org/r/20211008201132.1678814-4-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'tegra-for-5.16-firmware' of ↵Arnd Bergmann2-14/+19
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers firmware: tegra: Changes for v5.16-rc1 This contains a fix for a stack usage problem that was causing build failures on 32-bit ARM and a minor janitorial cleanup. * tag 'tegra-for-5.16-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: firmware: tegra: bpmp: Use devm_platform_ioremap_resource() firmware: tegra: Reduce stack usage Link: https://lore.kernel.org/r/20211008201132.1678814-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-11Merge tag 'amlogic-drivers-for-v5.16' of ↵Arnd Bergmann3-6/+3
git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/drivers Amlogic Drivers updates for v5.16: Minor cleanups, and the addition of the S905Y2 SoC ID * tag 'amlogic-drivers-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: soc: amlogic: meson-clk-measure: Make use of the helper function devm_platform_ioremap_resource() soc: amlogic: canvas: Make use of the helper function devm_platform_ioremap_resource() soc: amlogic: meson-gx-socinfo: Add S905Y2 ID for Radxa Zero Link: https://lore.kernel.org/r/f8e020d3-29f7-0745-3864-01975edd20f7@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-10Merge branch 'for-v5.16/renesas-rpc' into mem-ctrl-nextKrzysztof Kozlowski4-36/+126
2021-10-10soc: samsung: pm_domains: drop unused is_off fieldKrzysztof Kozlowski1-1/+0
The 'is_off' member of internal state structure 'exynos_pm_domain' is not used anymore. Fixes: 2ed5f236716c ("ARM: EXYNOS: Detect power domain state on registration from DT") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211008075253.67961-1-krzysztof.kozlowski@canonical.com
2021-10-08soc/tegra: pmc: Use devm_platform_ioremap_resource()Cai Huoqing1-2/+1
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately. Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-08soc/tegra: Add Tegra186 ARI driverMikko Perttunen2-0/+81
Add a driver to hook into panic notifiers and print machine check status for debugging. Status information is retrieved via SMC. This is supported by upstream ARM Trusted Firmware. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-08drm/mediatek: mtk_dsi: Reset the dsi0 hardwareEnric Balletbo i Serra1-1/+4
Reset dsi0 HW to default when power on. This prevents to have different settingis between the bootloader and the kernel. As not all Mediatek boards have the reset consumer configured in their board description, also is not needed on all of them, the reset is optional, so the change is compatible with all boards. Cc: Jitao Shi <jitao.shi@mediatek.com> Suggested-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20210930103105.v4.7.Idbb4727ddf00ba2fe796b630906baff10d994d89@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08soc: mediatek: mmsys: Add reset controller supportEnric Balletbo i Serra2-0/+70
Among other features the mmsys driver should implement a reset controller to be able to reset different bits from their space. Cc: Jitao Shi <jitao.shi@mediatek.com> Suggested-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20210930103105.v4.6.I15e2419141a69b2e5c7e700c34d92a69df47e04d@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08soc: mediatek: add mtk mutex support for MT8192Yongqiang Niu1-0/+35
Add mtk mutex support for MT8192 SoC. Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://lore.kernel.org/r/20210930155222.5861-5-yongqiang.niu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-07firmware: tegra: bpmp: Use devm_platform_ioremap_resource()Cai Huoqing1-5/+2
Use the devm_platform_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately. Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-07firmware: tegra: Reduce stack usageArnd Bergmann1-9/+17
Building the bpmp-debugfs driver for Arm results in a warning for stack usage: drivers/firmware/tegra/bpmp-debugfs.c:321:16: error: stack frame size of 1224 bytes in function 'bpmp_debug_store' [-Werror,-Wframe-larger-than=] static ssize_t bpmp_debug_store(struct file *file, const char __user *buf, It should be possible to rearrange the code to not require two separate buffers for the file name, but the easiest workaround is to use dynamic allocation. Fixes: 5e37b9c137ee ("firmware: tegra: Add support for in-band debug") Link: https://lore.kernel.org/all/20201204193714.3134651-1-arnd@kernel.org/ Signed-off-by: Arnd Bergmann <arnd@arndb.de> [treding@nvidia.com: consistently return NULL on failure] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-07memory: fsl_ifc: fix leak of irq and nand_irq in fsl_ifc_ctrl_probeDongliang Mu1-7/+6
The error handling code of fsl_ifc_ctrl_probe is problematic. When fsl_ifc_ctrl_init fails or request_irq of fsl_ifc_ctrl_dev->irq fails, it forgets to free the irq and nand_irq. Meanwhile, if request_irq of fsl_ifc_ctrl_dev->nand_irq fails, it will still free nand_irq even if the request_irq is not successful. Fix this by refactoring the error handling code. Fixes: d2ae2e20fbdd ("driver/memory:Move Freescale IFC driver to a common driver") Signed-off-by: Dongliang Mu <mudongliangabcd@gmail.com> Link: https://lore.kernel.org/r/20210925151434.8170-1-mudongliangabcd@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE withKai Song1-1/+1
fix debugfs_simple_attr.cocci warning: drivers/memory/tegra/tegra210-emc-core.c:1665:0-23: WARNING:tegra210_emc_debug_min_rate_fops should be defined with DEFINE_DEBUGFS_ATTRIBUTE Commit 6fc5f1adf5a1 ("memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE") fixed the same warning, but didn't fix all matches in this file at once. Signed-off-by: Kai Song <songkai01@inspur.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20211005043514.9650-1-songkai01@inspur.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07memory: renesas-rpc-if: RENESAS_RPCIF should select RESET_CONTROLLERGeert Uytterhoeven1-0/+1
The Renesas RPC-IF driver calls devm_reset_control_get_exclusive(), which returns -ENOTSUPP if CONFIG_RESET_CONTROLLER is not enabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/e443aa66d146da5646b7ebece8876545b8621063.1633447756.git.geert+renesas@glider.be Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07memory: tegra186-emc: Fix error return code in tegra186_emc_probe()Yang Yingliang1-0/+1
Return the error code when command fails. Fixes: 13324edbe926 ("memory: tegra186-emc: Handle errors in BPMP response") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Link: https://lore.kernel.org/r/20210928021545.3774677-1-yangyingliang@huawei.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-10-07soc/tegra: Fix an error handling path in tegra_powergate_power_up()Christophe JAILLET1-1/+1
If an error occurs after a successful tegra_powergate_enable_clocks() call, it must be undone by a tegra_powergate_disable_clocks() call, as already done in the below and above error handling paths of this function. Update the 'goto' to branch at the correct place of the error handling path. Fixes: a38045121bf4 ("soc/tegra: pmc: Add generic PM domain support") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-10-06soc: imx: imx8m-blk-ctrl: add DISP blk-ctrlLucas Stach1-0/+70
This adds the description for the i.MX8MM disp blk-ctrl. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: add i.MX8M blk-ctrl driverLucas Stach2-0/+454
This adds a driver for the blk-ctrl blocks found in the i.MX8M* line of SoCs. The blk-ctrl is a top-level peripheral located in the various *MIX power domains and interacts with the GPC power controller to provide the peripherals in the power domain access to the NoC and ensures that those peripherals are properly reset when their respective power domain is brought back to life. Software needs to do different things to make the bus handshake happen after the GPC *MIX domain is powered up and before it is powered down. As the requirements are quite different between the various blk-ctrls there is a callback function provided to hook in the proper sequence. The peripheral domains are quite uniform, they handle the soft clock enables and resets in the blk-ctrl address space and sequencing with the upstream GPC power domains. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: gpcv2: support system suspend/resumeLucas Stach1-0/+31
Our usage of runtime PM to control the hierarchy of power domains is slightly unusual and means that powering up a domain may fail in early system resume, as runtime PM is still disallowed at this stage. However the system suspend/resume path takes care of powering down/up the power domains in the order defined by the device parent/child and power-domain provider/consumer hierarachy. So we can just runtime resume all our power-domain devices to allow the power-up to work properly in the resume path. System suspend will still disable all domains as intended. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: gpcv2: keep i.MX8M* bus clocks enabledLucas Stach1-0/+6
Annotate the domains with bus clocks to keep those clocks enabled as long as the domain is active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: gpcv2: add domain option to keep domain clocks enabledLucas Stach1-5/+9
Some of the MIX domains are using clocks to drive the bus bridges. Those must be enabled at all times, as long as the domain is powered up and they don't have any other consumer than the power domain. Add an option to keep the clocks attached to a domain enabled as long as the domain is power up and only disable them after the domain is powered down. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06soc: imx: gpcv2: add lockdep annotationLucas Stach1-0/+4
Some of the GPCv2 power domains are nested inside each other without visibility to lockdep at the genpd level, as they are in separate driver instances and don't have a parent/child power-domain relationship. Add a subclass annotation to the nested domains to let lockdep know that it is okay to take the genpd lock in a nested fashion. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-06bus: ti-sysc: Fix variable set but not used warning for reinit_modulesTony Lindgren1-2/+1
Fix drivers/bus/ti-sysc.c:2494:13: error: variable 'error' set but not used introduced by commit 9d881361206e ("bus: ti-sysc: Add quirk handling for reinit on context lost"). Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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