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2016-05-05drm/amdgpu/dce11: add dce clock setting for ELM/BAFAlex Deucher1-1/+9
Setup the disp clock and dp reference clock. This is now a separate command table on elm/baf compared to older asics. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu/dce11: update pll programming for ELM/BAFAlex Deucher1-2/+29
SetPixelClock table handles pll divider calculation and spread spectrum setup, so no need to use calculate the dividers and call the ss enable cmd table. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu: add ELM/BAF support to dce_v11_0_pick_pll (v2)Alex Deucher1-0/+38
New PLL scheme on ELM/BAF. v2: squash in pll fix. Plls are part of the phys. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu/atom: add support for new UNIPHYTransmitterContol cmd tableAlex Deucher1-1/+50
New uniphy transmitter setup table for elm/baf. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu/atom: add support for new DIGxEncoderControl cmd tableAlex Deucher1-0/+42
New digital encoder setup table for elm/baf. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu/atom: add support for new SetPixelClock tableAlex Deucher1-12/+41
New version of the SetPixelClock table for elm/baf. The new table calculates the pll dividers and handles spread spectrum calculations and setup. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu/atom: add SetDCEClock helperAlex Deucher2-1/+46
New cmd table for ELM/BAF for setting the dispclock or dprefclock. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu: update atombios.h (v2)Alex Deucher1-44/+619
update to internal version 893 v2: Pull in gfx_info changes from 898 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu: bump the afmt limit for CZ, ST, PolarisAlex Deucher1-1/+1
Fixes array overflow on these chips. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-05drm/amdgpu: use defines for CRTCs and AMFT blocksAlex Deucher1-2/+2
Prerequiste for the next patch which ups the limits. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-05drm/amdgpu: add ELM/BAF DCE11 configs (v2)Alex Deucher1-1/+24
Add support for the display configuration on elm/baf. v2: add missing Stoney case Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amdgpu: add ELM/BAF asic typesAlex Deucher2-0/+4
New asic types for ellesmere and baffin. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-05drm/amd: add DCE 11.2 register headersAlex Deucher3-0/+35575
Add register headers for DCE (Display and Composition Engine) 11.2. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/radeon: Allow setting shader registers using DMA/COPY packet3 on SI.Bas Nieuwenhuizen2-1/+6
Mesa uses a COPY_DATA packet to copy the grid size for indirect dispatches into COMPUTE_USER_DATA_*. Setting those registers with a SET_SH_REG packet is allowed, not allowing them with other packets seems like an oversight. v2: Clarify commit message. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: remove sorting of CS BOsChristian König1-23/+0
Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: group BOs by log2 of the size on the LRU v2Christian König2-2/+70
This allows us to have small BOs on the LRU before big ones. v2: fix of by one and list corruption bug Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: drop apply quirks for now.Dave Airlie1-15/+0
This isn't being used so drop it. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: fix error checking when reuse vmid on same ringChunming Zhou1-2/+2
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: only update last_flush when vmid doesn't have other new ownerChunming Zhou2-5/+11
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: double fence slotChunming Zhou1-2/+2
we introduced vmid fence, so one hw submission could produce two fences. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable sdma clockgating on STAlex Deucher1-1/+3
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable sdma clockgating on CZAlex Deucher1-1/+3
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/sdma: rename fiji cg functionsAlex Deucher1-65/+39
They care common for all sdma 3.0 parts Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable gmc clockgating for STAlex Deucher1-1/+4
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable gmc clockgating for CZAlex Deucher1-1/+4
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/vi: rename fiji cg functionsAlex Deucher1-12/+21
They can be used for other VI parts. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable gfx clockgating for ST (v2)Alex Deucher1-1/+3
v2: just enable MGCG for now since CGCG causes hangs Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: enable gfx clockgating for CZAlex Deucher1-1/+9
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx: rework fiji cg functions so they can be sharedAlex Deucher1-16/+202
They can be shared with other asics with minor modifications. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: add a new set of rlc function pointersAlex Deucher1-0/+9
Different asics tend to have different ways to interact with the RLC. This just covers enter/exit of safe mode for updating CG and PG state, but could be extended to cover other RLC operations in the future if necessary. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx: adjust gfx_v8_0_send_serdes_cmd for STAlex Deucher1-6/+17
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx8: rename send_serdes_cmdAlex Deucher1-7/+7
So it can be shared with CZ/ST. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gmc: add proper CG flags for fijiAlex Deucher2-5/+7
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/common: add proper CG flags for fijiAlex Deucher1-9/+13
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/sdma: add proper CG flags for fijiAlex Deucher2-3/+5
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu/gfx: add proper CG flags for fijiAlex Deucher2-35/+56
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: add new CG flag for ROM clockgatingAlex Deucher1-0/+1
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: implement LRU add callbacks v2Christian König12-9/+49
This allows fine grained control for the driver where to add a BO into the LRU. v2: fix typo in comment Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: add optional LRU removal callback v2Christian König2-5/+13
Useful for driver specific LRU handling. v2: fix typo in comment Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: remove unused validation sequenceChristian König2-3/+0
Not used any more. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: remove lazy parameter from ttm_bo_waitChristian König13-24/+24
Not used any more. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: remove use_ticket parameter from ttm_bo_reserveChristian König25-62/+55
Not used any more. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/ttm: don't wait for BO on initial allocationChristian König1-6/+12
When we use an extern reservation object that otherwise waits for every fence registered with it. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: fix the coding style in amdgpu_ring.cChristian König1-2/+3
No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: use the ring name for debugfs (v2)Christian König3-35/+25
Instead of hard coding just another name in the ring code. v2: squash in Tom's rebase fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: reduce the ring size for SDMAChristian König3-3/+3
Those are way too large. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: reduce the ring size for GFXChristian König2-4/+4
Those are way too large. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amdgpu: use max_dw in ring_initChristian König10-22/+18
Instead of specifying the total ring size calculate that from the maximum number of dw a submission can have and the number of concurrent submissions. This fixes UVD with 8 concurrent submissions or more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/powerplay: fix fan speed percent setting error on FijiEric Huang1-2/+2
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-05drm/amd/powerplay: fix fan speed percent setting error on TongaEric Huang1-2/+2
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-29 14:24:17 +0300