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2024-02-28arm64: dts: rockchip: add RK3588-Q7 (Tiger) SoMHeiko Stuebner1-0/+690
The RK3588-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230 connector) system-on-module from Theobroma Systems, featuring the Rockchip RK3588. It provides the following feature set: * up to 16GB LPDDR4x * on-module eMMC * SD card (on a baseboard) via edge connector * Gigabit Ethernet with on-module GbE PHY * HDMI/eDP * MIPI-DSI * 4x MIPI-CSI (3x on FPC connectors, 1x over Q7) * HDMI input over FPC connector * CAN * USB - 1x USB 3.0 dual-role (direct connection) - 2x USB 3.0 host + 1x USB 2.0 host * PCIe - 1x PCIe 2.1 Gen3, 4 lanes - 2xSATA / 2x PCIe 2.1 Gen1, 2 lanes * on-module ATtiny816 companion controller, implementing: - low-power RTC functionality (ISL1208 emulation) - fan controller (AMC6821 emulation) * on-module Secure Element with Global Platform 2.2.1 compliant JavaCard environment Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240227164659.705271-4-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-28dt-bindings: arm: rockchip: Add Theobroma-Systems RK3588 Q7 with baseboardHeiko Stuebner1-0/+6
Add binding for the Tiger Q7 SoM when used in conjunction with the Haikou baseboard. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240227164659.705271-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-28arm64: dts: rockchip: drop rockchip,trcm-sync-tx-only from rk3588 i2sHeiko Stuebner1-2/+0
The rockchip,trcm-sync-tx-only property is at this time only documented for the tdm variant of Rockchip i2s controllers. While there was a series [0] adding code and binding for the property, it doesn't seem to have gone forward back in 2021. So for now fix the devicetree check by removing the property from rk3588 i2s controllers until support for it gets merged. [0] https://patchwork.kernel.org/project/linux-rockchip/patch/1629796734-4243-5-git-send-email-sugar.zhang@rock-chips.com/ Fixes: 8ae112a5554f ("arm64: dts: rockchip: Add rk3588s I2S nodes") Cc: Sugar Zhang <sugar.zhang@rock-chips.com> Cc: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240227164659.705271-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-28arm64: dts: rockchip: fix reset-names for rk356x i2s2 controllerHeiko Stuebner1-1/+1
The dtbscheck reports a warning for a wrong reset-names property for the i2s2 controller on rk356x socs. The other controllers on the soc provide tx and rx directions and hence two resets and separate clocks for each direction, while i2s2 only provides one reset. This was so far named just "m" which isn't part of the binding. The clock-names the controller uses all end in "tx", so use the matching "tx-m" reset-name for the i2s controller. Fixes: 755f37010f3e ("arm64: dts: rockchip: RK356x: Add I2S2 device node") Acked-by: Uwe Kleine-König <ukleinek@debian.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240227173526.710056-2-heiko@sntech.de
2024-02-28arm64: dts: rockchip: add missing interrupt-names for rk356x vdpuHeiko Stuebner1-0/+1
The video-codec@fdea0400 was missing the interrupt-names property that is part of the binding. Add it. Fixes: 944be6fba401 ("arm64: dts: rockchip: Add VPU support for RK3568/RK3566") Cc: Piotr Oniszczuk <piotr.oniszczuk@gmail.com> Acked-by: Uwe Kleine-König <ukleinek@debian.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240227173526.710056-1-heiko@sntech.de
2024-02-28arm64: dts: rockchip: add clock to vo1-grf syscon on rk3588Heiko Stuebner1-0/+1
The VO*-general-register-files need a clock, so add the correct one. Cc: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240227210521.724754-1-heiko@sntech.de
2024-02-28dt-bindings: arm: rockchip: Add Toybrick TB-RK3588XElon Zhang1-0/+5
Add devicetree binding for Toybrick TB-RK3588X board from Rockchip Toybrick. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com> Signed-off-by: Elon Zhang <zhangzj@rock-chips.com> Link: https://lore.kernel.org/r/20240221022902.751528-2-zhangzj@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-28arm64: dts: rockchip: Add devicetree support for TB-RK3588X boardElon Zhang2-0/+689
Add board file for Rockchip Toybrick TB-RK3588X board. Specification: Rockchip Rk3588 SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 8/16GB Memory LPDDR4x Mali G610MC4 GPU 2× MIPI-CSI0 Connector 1x 2Lanes PCIe3.0 Connector 1x SATA3.0 Connector 32GB eMMC Module 2x USB 2.0, 2x USB 3.0 1x HDMI Output, 1x HDMI Input 2x Ethernet Port Functions work normally: [1] USB2.0 Host [2] Ethernet0 with PHY RTL8211F More information can be obtained from the following websites: [1] https://t.rock-chips.com/en/wiki/EN/tb-rk3588x_en/index.html [2] http://t.rock-chips.com/ Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com> Signed-off-by: Elon Zhang <zhangzj@rock-chips.com> Link: https://lore.kernel.org/r/20240221022902.751528-1-zhangzj@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-28arm64: dts: rockchip: adjust vendor on orangepi rk3399 boardTim Lunn1-1/+1
Adjust compatible string to match the board vendor of Xunlong Signed-off-by: Tim Lunn <tim@feathertop.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240214040731.3069111-5-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-28arm64: dts: rockchip: adjust vendor on Banana Pi R2 Pro boardTim Lunn1-1/+1
Adjust compatible string to match the board vendor of Sinovoip Signed-off-by: Tim Lunn <tim@feathertop.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240214040731.3069111-4-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-28dt-bindings: arm: rockchip: Correct vendor for Banana Pi R2 ProTim Lunn1-2/+2
The vendor for this board was incorrectly listed as Rockchip. Fix this now while they are not used anywhere, in the future they may be used by bootloader to select dts. Update the vendor to Sinovoip. Signed-off-by: Tim Lunn <tim@feathertop.org> Fixes: 8ad885126daa ("dt-bindings: rockchip: Add BananaPi R2 Pro Board") Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240214040731.3069111-3-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-28dt-bindings: arm: rockchip: Correct vendor for Orange Pi RK3399 boardTim Lunn1-2/+2
The vendor for this board was incorrectly listed as Rockchip. Fix this now while they are not used anywhere, in the future they may be used by bootloader to select dts. Update the vendor to Xunlong. Signed-off-by: Tim Lunn <tim@feathertop.org> Fixes: 08b64bd2c681 ("arm64: dts: rockchip: Add support for the Orange Pi RK3399 board") Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240214040731.3069111-2-tim@feathertop.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-28arm64: dts: rockchip: Add HDMI0 PHY to rk3588Cristian Ciocaltea1-0/+21
Add DT nodes for HDMI0 PHY and related syscon found on RK3588 SoC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20240219204626.284399-1-cristian.ciocaltea@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-27Merge branch 'v6.9-shared/clkids' into v6.9-armsoc/dts64Heiko Stuebner4-3/+24
2024-02-27dt-bindings: clock: rk3588: add missing PCLK_VO1GRFSebastian Reichel1-0/+1
Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed for HDMI support. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240126182919.48402-4-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-27dt-bindings: clock: rk3588: drop CLK_NR_CLKSSebastian Reichel1-2/+0
CLK_NR_CLKS should not be part of the binding. Let's drop it, since the kernel code no longer uses it either. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240126182919.48402-3-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-27clk: rockchip: rk3588: fix CLK_NR_CLKS usageSebastian Reichel3-1/+23
CLK_NR_CLKS is not part of the DT bindings and needs to be removed from it, just like it recently happened for other platforms. This takes care of it by introducing a new function identifying the maximum used clock ID at runtime. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240126182919.48402-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: Add USB3.0 to Indiedroid NovaChris Morgan1-0/+8
Add the proper nodes to activate the USB 3.0 ports on the Indiedroid Nova. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20240125201943.90476-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: adjust phy-handle name on rock-pi-eTrevor Woerner1-2/+2
The rock-pi-e currently comes in 4 board spins, the latest one (v1.21) swaps out the Realtek 8211e PHY for an 8211f PHY. Therefore modify the phy-handle name to be more generic. Signed-off-by: Trevor Woerner <twoerner@gmail.com> Link: https://lore.kernel.org/r/20240116204103.29318-1-twoerner@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: fix rk3399 hdmi ports nodeJohan Jonker1-2/+10
Fix rk3399 hdmi ports node so that it matches the rockchip,dw-hdmi.yaml binding. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/a6ab6f75-3b80-40b1-bd30-3113e14becdd@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: fix rk3328 hdmi ports nodeJohan Jonker1-1/+10
Fix rk3328 hdmi ports node so that it matches the rockchip,dw-hdmi.yaml binding. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/e5dea3b7-bf84-4474-9530-cc2da3c41104@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: remove redundant cd-gpios from rk3588 sdmmc nodesKever Yang4-4/+0
The sdmmc node already have a "&sdmmc_det" for pinctrl which switch the GPIO0A4 to sdmmc detect function, no need to define a separate "cd-gpios". RK3588 has force_jtage feature which is enable JTAG function via sdmmc pins automatically when there is no SD card insert, this feature will need the GPIO0A4 works in sdmmc_det function like other mmc signal instead of GPIO function, or else the force_jtag can not auto be disabled when SD card insert. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Link: https://lore.kernel.org/r/20240201034621.1970279-1-kever.yang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: add rs485 support on uart5 of px30-ringneck-haikouFarouk Bouabid1-0/+1
A hardware switch can set the rs485 transceiver into half or full duplex mode. Switching to the half-duplex mode requires the user to enable em485 on uart5 using ioctl, DE/RE are both connected to GPIO0_B5 which is the RTS signal for uart0. Implement GPIO0_B5 as rts-gpios with RTS_ON_SEND option enabled (default) so that driver mode gets enabled while sending (RTS high) and receiver mode gets enabled while not sending (RTS low). In full-duplex mode (em485 is disabled), DE is connected to GPIO0_B5 and RE is grounded (enabled). Since GPIO0_B5 is implemented as rts-gpios, the driver mode gets enabled whenever we want to send something and RE is not affected (always enabled) in this case by the state of RTS. Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com> Link: https://lore.kernel.org/r/20240208-dev-rx-enable-v6-2-39e68e17a339@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: add rs485 support on uart2 of rk3399-puma-haikouFarouk Bouabid1-1/+2
A hardware switch can set the rs485 transceiver into half or full duplex mode. Switching to the half-duplex mode requires the user to enable em485 on uart5 using ioctl, DE/RE are both connected to GPIO2_C3 which is the RTS signal for uart0. Implement GPIO2_C3 as rts-gpios with RTS_ON_SEND option enabled (default) so that driver mode gets enabled while sending (RTS high) and receiver mode gets enabled while not sending (RTS low). In full-duplex mode (em485 is disabled), DE is connected to GPIO2_C3 and RE is grounded (enabled). Since GPIO2_C3 is implemented as rts-gpios, the driver mode gets enabled whenever we want to send something and RE is not affected (always enabled) in this case by the state of RTS. Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com> Link: https://lore.kernel.org/r/20240208-dev-rx-enable-v6-1-39e68e17a339@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: Add Powkiddy RGB10MAX3Chris Morgan2-0/+88
Add support for the Powkiddy RGB10MAX3. The Powkiddy RGB10MAX3 is a handheld gaming device with a 720p 5.0 inch screen powered by the Rockchip RK3566 SoC. It includes a Realtek 8723ds WiFi/BT module, 2 ADC joysticks powered by a 4-way muxed ADC channel, and several GPIO face buttons. There are 2 SDMMC slots (sdmmc1 and sdmmc3), 3 pwm controlled LEDs, and the device includes 1GB of RAM. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20240212184950.52210-8-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13dt-bindings: arm: rockchip: Add Powkiddy RGB10MAX3Chris Morgan1-0/+1
The Powkiddy RGB10MAX3 is a handheld gaming device made by Powkiddy and powered by the Rockchip RK3566 SoC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240212184950.52210-7-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: Update powkiddy rk2023 dtsi for RGB10MAX3Chris Morgan3-17/+37
Move the vdd_cpu regulator to the device specific dts. This is in preparation of adding the Powkiddy RGB10MAX3 device, which uses a different vendor for the CPU regulator at a different i2c address. Also add a phandle to the bluetooth device so that we can change the compatible string for the RGB10MAX3. This device uses the same pinouts but a different bluetooth device. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20240212184950.52210-6-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-04arm64: dts: rockchip: Add devicetree for Pine64 PineTab2Manuel Traut4-0/+1021
This includes support for both the v0.1 units that were sent to developers and the v2.0 units from production. v1.0 is not included as no units are known to exist. Working/Tested: - SDMMC - UART - Buttons - Charging/Battery/PMIC - Audio - USB - Display - SPI NOR Flash Signed-off-by: Alexander Warnecke <awarnecke002@hotmail.com> Signed-off-by: Manuel Traut <manut@mecka.net> Tested-By: Diederik de Haas <didi.debian@cknow.org> Reviewed-by: Ondrej Jirman <megi@xff.cz> Tested-by: Ondrej Jirman <megi@xff.cz> Link: https://lore.kernel.org/r/20240127-pinetab2-v4-4-37aab1c39194@mecka.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-04dt-bindings: arm64: rockchip: Add Pine64 PineTab2Manuel Traut1-0/+8
Add devicvetree binding documentation for Pine64 PineTab2 which uses the Rockchip RK3566 SoC. Signed-off-by: Manuel Traut <manut@mecka.net> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240127-pinetab2-v4-3-37aab1c39194@mecka.net [moved Pinetab below Pinephone to keep alphabetical sorting] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-04arm64: dts: rockchip: Add Touch to Anbernic RG-ARC DChris Morgan1-4/+22
Add the Goodix GT927 touchscreen to the Anbernic RG-ARC D. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Tested-by: Trooper_Max <troopermax@gmail.com> Link: https://lore.kernel.org/r/20240201150620.886786-1-macroalpha82@gmail.com [renamed node to generic touchscreen@14] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-26arm64: dts: rockchip: fix nanopc-t6 sdmmc regulatorJohn Clark1-1/+12
sdmmc on the nanopc-t6 is powered by vcc3v3_sd_s0, not vcc_3v3_s3 add the vcc3v3_sd_s0 regulator, and control it with gpio4_a5 Signed-off-by: John Clark <inindev@gmail.com> Link: https://lore.kernel.org/r/20240102024054.1030313-1-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-26arm64: dts: rockchip: remove duplicate SPI aliases for helios64Quentin Schulz1-3/+0
An earlier commit defined an alias for all SPI controllers found on the RK3399, so there's no need to duplicate the aliases in helios64's device tree. Cc: Quentin Schulz <foss+kernel@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240109-rk3399-spi-aliases-v1-2-2009e44e734a@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-26arm64: dts: rockchip: add spi controller aliases on rk3399Quentin Schulz1-0/+6
There are 6 SPI controllers on RK3399 and they are all numbered in the TRM, so let's add the appropriate aliases to the main DTSI so that any RK3399-based board doesn't need to define the aliases themselves to benefit from stable SPI indices in userspace. Cc: Quentin Schulz <foss+kernel@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240109-rk3399-spi-aliases-v1-1-2009e44e734a@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add support for NanoPi R6CMuhammed Efe Cetin2-0/+15
NanoPi R6C is mostly same as R6S variant. It has M2 port instead of a NIC port and different led labeling. Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com> Link: https://lore.kernel.org/r/0f9ee0baa6c9de4d54dd6d13957ca15a63ec934f.1703934548.git.efectn@protonmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add support for NanoPi R6SMuhammed Efe Cetin2-0/+765
Add basic NanoPi R6S support that comes with USB2, PCIe, SD card, eMMC support. Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com> Link: https://lore.kernel.org/r/6db3b653efc6f0a2dca8e96fdd0503906db72fb6.1703934548.git.efectn@protonmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25dt-bindings: arm: rockchip: Add NanoPi R6 series boardsMuhammed Efe Cetin1-0/+7
Add support for NanoPi R6 series boards that based on RK3588S. NanoPi R6S basically has: - USB3 - USB2 - eMMC - 2x 2.5GBe & 1x 1GBe ethernet - HDMI - SD card support Unlike R6S variant, NanoPi R6C has PCIe M.2 M-key instead of 1x 2.5GBe. Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/30c1c7eac02cd32b76edb77572523f6ad8de89fb.1703934548.git.efectn@protonmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Increase maximum frequency of SPI flash for ROCK Pi 4A/B/CStefan Nagy3-3/+3
The ROCK Pi 4A/B/C boards come with a 32 Mbit SPI NOR flash chip (XTX Technology Limited XT25F32) with a maximum clock frequency of 108 MHz. Use this value for the device node's spi-max-frequency property. This patch has been tested on ROCK Pi 4A. Signed-off-by: Stefan Nagy <stefan.nagy@ixypsilon.net> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20231217113208.64056-1-stefan.nagy@ixypsilon.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: add sdmmc card detect to the nanopc-t6John Clark1-0/+1
The nanopc-t6 has an sdmmc card detect connected to gpio0_a4 which is active low. Signed-off-by: John Clark <inindev@gmail.com> Link: https://lore.kernel.org/r/20231230165053.3781-1-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add cache information to the SoC dtsi for RK3399Dragan Simic1-2/+62
Add missing cache information to the Rockchip RK3399 SoC dtsi. The specified values were derived by hand from the cache size specifications available from the RK3399 datasheet; for future reference, here's a brief summary: - Each Cortex-A72 core has 48 KB of L1 instruction cache and 32 KB of L1 data cache available, four-way set associative - Each Cortex-A53 core core has 32 KB of instruction cache and 32 KB of L1 data cache available, four-way set associative - The big (A72) cluster has 1 MB of unified L2 cache available - The little (A53) cluster has 512 KB of unified L2 cache available This patch allows /proc/cpuinfo and lscpu(1) to display proper RK3399 cache information, and it eliminates the following error in the kernel log: cacheinfo: Unable to detect cache hierarchy for CPU 0 While there, add a couple of somewhat useful comments, which may help a bit anyone going through the RK3399 SoC dtsi. Co-developed-by: Kyle Copperfield <kmcopper@danwin1210.me> Signed-off-by: Kyle Copperfield <kmcopper@danwin1210.me> Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/be3cbcae5c40fa72a52845d30dcc66c847a98cfa.1702616304.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: add rfkill node for M.2 Key E WiFi on rock-5bAlexey Charkov1-0/+7
By default the GPIO pin that connects to the WiFi enable signal inside the M.2 Key E slot is driven low, resulting in impossibility to connect to any network. Add a DT node to expose it as an RFKILL device, which lets the WiFi driver or userspace toggle it as required. Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20240106202650.22310-1-alchark@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: enable NanoPC-T6 MiniPCIe powerHugh Cole-Baker1-0/+17
The NanoPC-T6 has a Mini PCIe slot intended to be used for a 4G or LTE modem. This slot has no PCIe functionality, only USB 2.0 pins are wired to the SoC, and USIM pins are wired to a SIM card slot on the board. Define the 3.3v supply for the slot so it can be used. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Link: https://lore.kernel.org/r/20240109202729.54292-1-sigmaris@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add LED_GREEN for edgeble-neu6aJagan Teki1-0/+24
Edgeble NCM6A, NCM6B SoM has Green LED on the module. Enable them with heartbeat function. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20231125190522.87607-11-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add Edgeble NCM6A-IO USB2Jagan Teki1-0/+55
Edgeble NCM6A-IO board has 2 port USB2.0 Host and USB2.0 on E-Key. Add support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20231125190522.87607-10-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add Edgeble NCM6A-IO M.2 B-Key, E-KeyJagan Teki1-0/+30
Edgeble NCM6A-IO board has M.2 B-Key, E-Key via PCI3x2. Add support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20231125190522.87607-9-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add Edgeble NCM6A-IO M.2 M-KeyJagan Teki1-0/+36
Edgeble NCM6A-IO board has M.2 M-Key via PCI3x4. Add support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20231125190522.87607-8-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add Edgeble NCM6A-IO 2.5G ETHJagan Teki1-0/+30
Edgeble NCM6A-IO board has 2.5Gbps Ethernet via PCI2_0. Add support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20231125190522.87607-7-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add vdd_cpu_big reg to rk3588-edgeble-ncm6Jagan Teki1-0/+56
The RK8602 and RK8603 voltage regulators on the Rock 5B board provide the power lines vdd_cpu_big0 and vdd_cpu_big1, respectively. Add the necessary device tree nodes and bind them to the corresponding CPU big core nodes. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20231125190522.87607-6-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add Edgeble NCM6A WiFi6 OverlayJagan Teki2-0/+57
Edgeble NCM6A SOM has on-module M.2 1216-compatible WiFi modules. Currently, AW-XM548NF WiFi6 and Intel 8260D2W WiFi5 modules are supported. WiFi modules are fixed on SoM, not pluggable M.2 slots, so different SoM's for each type of WiFi module. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20231125190522.87607-5-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add common DT for edgeble-neu6b-ioJagan Teki3-84/+83
Edgeble Neu6a and Neu6b are compatible with common IO board. So, maintain the IO board in rk3588-edgeble-neu6a-io.dtsi. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20231125190522.87607-4-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: Add edgeble-neu6a-common DTJagan Teki3-403/+390
Edgeble NCM6A-IO is common compatible IO board for both NCM6A and NCM6B. Add a common io DTSI for it to include them in both NCM6A and NCM6B DTS files. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20231125190522.87607-3-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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