summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2023-12-12dt-bindings: arm: rockchip: Add Powkiddy X55Chris Morgan1-0/+1
The Powkiddy X55 is a handheld gaming device made by Powkiddy and powered by the Rockchip RK3566 SoC. This device is somewhat similar to the existing Powkiddy RK3566 devices, which have been grouped together with a previous commit[1]. [1] https://lore.kernel.org/linux-rockchip/20231117202536.1387815-1-macroalpha82@gmail.com/T/#m4764997cfafaca22fe677200de96caa5fb8f0005 Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231204185719.569021-10-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add USB3 host to rock-5aSebastian Reichel1-0/+8
Enable USB3 host controller for the Radxa ROCK 5 Model A. This adds USB3 for the lower USB3 port (the one closer to the PCB). The upper USB3 port uses the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20231106155934.80838-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add USB3 host to rock-5bSebastian Reichel1-0/+8
Enable USB3 host controller for the Radxa ROCK 5 Model B. This adds USB3 for the upper USB3 port (the one further away from the PCB). The lower USB3 and the USB-C ports use the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20231106155934.80838-1-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add missing tx/rx-fifo-depth for rk3328 gmacshironeko1-0/+4
Without fifo depths attempting to change the MTU will fail. These values are from the RK3328 Technical Reference Manual, gmac2io interface tested with Rock64. Signed-off-by: shironeko <shironeko@tesaguri.club> Link: https://lore.kernel.org/r/20231116214042.11134-2-shironeko@tesaguri.club Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-sTrevor Woerner1-0/+58
Add names to the pins of the general-purpose expansion header as given in the Radxa GPIO page[1] following the conventions in the kernel documentation[2] to make it easier for users to correlate the pins with functions when using utilities such as gpioinfo. [1] https://wiki.radxa.com/RockpiS/hardware/gpio [2] Documentation/devicetree/bindings/gpio/gpio.txt Signed-off-by: Trevor Woerner <twoerner@gmail.com> Link: https://lore.kernel.org/r/20231120162232.27653-1-twoerner@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12ARM: dts: rockchip: add hdmi-connector node to rk3036-kylinJohan Jonker1-0/+17
Add hdmi-connector node to comply with the inno_hdmi binding. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/f5bc182b-f9b6-26a8-8649-19ce33e3c0e1@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12ARM: dts: rockchip: fix rk3036 hdmi ports nodeJohan Jonker1-3/+11
Fix hdmi ports node so that it matches the rockchip,inno-hdmi.yaml binding. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/9a2afac1-ed5c-382d-02b0-b2f5f1af3abb@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12ARM: dts: microchip: sama5d27_som1_ek: Remove mmc-ddr-3_3v property from ↵Mihai Sain1-1/+0
sdmmc0 node On board the sdmmc0 interface is wired to a SD Card socket. According with mmc-controller bindings, the mmc-ddr-3_3v property is used for eMMC devices to enable high-speed DDR mode (3.3V I/O). Remove the mmc-ddr-3_3v property from sdmmc0 node. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20231211070345.2792-1-mihai.sain@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2023-12-12arm64: dts: juno: Align thermal zone names with bindingsKrzysztof Kozlowski2-12/+12
Thermal bindings require thermal zone node names to match certain patterns: | juno.dtb: thermal-zones: 'big-cluster', 'gpu0', 'gpu1', | 'little-cluster', 'pmic', 'soc' | do not match any of the regexes: | '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://lore.kernel.org/r/20231209171612.250868-1-krzysztof.kozlowski@linaro.org Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2023-12-11arm64: dts: mediatek: mt8192: Add Smart Voltage Scaling nodeAngeloGioacchino Del Regno1-0/+12
Add the MediaTek SVS node: this will lower the voltage of various components of the SoC based on chip quality (read from fuses) in order to save power and generate less heat. Link: https://lore.kernel.org/r/20231121125044.78642-20-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8195: Add SVS node and reduce LVTS_AP iospaceAngeloGioacchino Del Regno1-1/+16
Add the MediaTek SVS node: this will lower the voltage of various components of the SoC based on chip quality (read from fuses) in order to save power and generate less heat. Also, reduce the LVTS_AP iospace to 0xc00, because that's exactly where SVS starts. - LVTS_AP start: 0x1100b000 length: 0xc00 - SVS start: 0x1100bc00 length: 0x400 Link: https://lore.kernel.org/r/20231121125044.78642-21-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8183: Change iospaces for thermal and svsAngeloGioacchino Del Regno1-13/+13
The SVS iospace starts at 0x1100bc00 and not at 0x1100b000 as the latter is the thermal sensor iospace instead. Change the iospaces for both as following: - Thermal: 0x1100b000, length 0xc00 - SVS: 0x1100bc00, length 0x400 Please note that while this would be a breaking change for SVS (but not for thermal sensors), it doesn't matter because the svs driver never worked anyway because of the missing trips in tzts2, causing that thermal zone to never actually register, hence the SVS driver to fail probing anyway. Link: https://lore.kernel.org/r/20231121125044.78642-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8186: fix address warning for ADSP mailboxesEugen Hristev1-2/+2
Fix warnings reported by dtbs_check : arch/arm64/boot/dts/mediatek/mt8186.dtsi:1163.35-1168.5: Warning (simple_bus_reg): /soc/mailbox@10686000: simple-bus unit address format error, expected "10686100" arch/arm64/boot/dts/mediatek/mt8186.dtsi:1170.35-1175.5: Warning (simple_bus_reg): /soc/mailbox@10687000: simple-bus unit address format error, expected "10687100" by having the right bus address as node name. Fixes: 379cf0e639ae ("arm64: dts: mediatek: mt8186: Add ADSP mailbox nodes") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Link: https://lore.kernel.org/r/20231204135533.21327-1-eugen.hristev@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8186: Fix alias prefix for ovl_2l0Chen-Yu Tsai1-1/+1
The alias prefix for ovl_2l (2 layer overlay) is "ovl-2l", not "ovl_2l". Fix this. Fixes: 7e07d3322de2 ("arm64: dts: mediatek: mt8186: Add display nodes") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20231130074032.913511-4-wenst@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mt6358: Drop bogus "regulator-fixed" compatible propertiesChen-Yu Tsai1-13/+0
Whether a regulator under the MT6358 PMIC is a fixed regulator or not is derived from the node name. Compatible string properties are not used. This causes validation errors after the regulator binding is converted to DT schema. Drop the bogus "regulator-fixed" compatible properties from the PMIC's regulator sub-nodes. Fixes: 9f8872221674 ("arm64: dts: mt6358: add PMIC MT6358 related nodes") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20231130074032.913511-3-wenst@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mt8183: kukui-jacuzzi: Drop bogus anx7625 panel_flag propertyChen-Yu Tsai1-1/+0
The panel_flag property was used in ChromeOS's downstream kernel. It was used to signal whether the downstream device was a fixed panel or a connector for an external display. This property was dropped in favor of standard OF graph descrptions of downstream display panels and bridges. Drop the property from the device tree file. Fixes: cabc71b08eb5 ("arm64: dts: mt8183: Add kukui-jacuzzi-damu board") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20231130074032.913511-2-wenst@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: Add MediaTek MT8188 dts and evaluation board and Makefilejason-ch chen3-0/+1344
MT8188 is a SoC based on 64bit ARMv8 architecture. It contains 6 CA55 and 2 CA78 cores. MT8188 share many HW IP with MT65xx series. We add basic chip support for MediaTek MT8188 on evaluation board. Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20231023083839.24453-5-jason-ch.chen@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: soc: mediatek: pwrap: Modify compatible for MT8188jason-ch chen1-1/+5
The reason for changing the patch was that while MT8188 uses the same pwrap as MT8195, the original code was only applicable to 'compatible = "mediatek,mt8188-pwrap"'. To resolve the DTBS check warning that '['mediatek,mt8188-pwrap', 'mediatek,mt8195-pwrap', 'syscon'] is too long', it is necessary to modify the code. Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20231023083839.24453-4-jason-ch.chen@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: arm: mediatek: Add mt8188 pericfg compatiblejason-ch chen1-0/+1
Add mt8188 pericfg compatible to binding document. Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231023083839.24453-3-jason-ch.chen@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: arm: Add compatible for MediaTek MT8188jason-ch chen1-0/+4
This commit adds dt-binding documentation for the MediaTek MT8188 reference board. Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231023083839.24453-2-jason-ch.chen@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8195: add DSI and MIPI DPHY nodesMichael Walle1-0/+48
Add the two DSI controller node and the associated DPHY nodes. Individual boards have to enable them in the board device tree. Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: display: mediatek: dsi: add compatible for MediaTek MT8195Michael Walle1-0/+4
Add the compatible string for MediaTek MT8195 SoC, using the same DSI block as the MT8183. Signed-off-by: Michael Walle <mwalle@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt6358: Merge ldo_vcn33_* regulatorsChen-Yu Tsai1-9/+2
The ldo_vcn33_bt and ldo_vcn33_wifi regulators are actually the same regulator, having the same voltage setting and output pin. There are simply two enable bits that are ORed together to enable the regulator. Having two regulators representing the same output pin is misleading from a design matching standpoint, and also error-prone in driver implementations. Now that the bindings have these two merged, merge them in the device tree as well. Neither vcn33 regulators are referenced in upstream device trees. As far as hardware designs go, none of the Chromebooks using MT8183 w/ MT6358 use this output. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: arm: mediatek: convert audsys and mt2701-afe-pcm to yamlEugen Hristev4-185/+269
Convert the mediatek,audsys binding to YAML, together with the associated binding bindings/sound/mt2701-afe-pcm.yaml . Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8195: add MDP3 nodesMoudy Ho1-0/+392
Add device nodes for Media Data Path 3 (MDP3) modules. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8195: revise VDOSYS RDMA node nameMoudy Ho1-8/+16
DMA-related nodes have their own standardized naming. Therefore, the MT8195 VDOSYS RDMA has been unified and corrected. Additionally, these modifications will facilitate the further integration of bindings. Fixes: 92d2c23dc269 ("arm64: dts: mt8195: add display node for vdosys1") Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8183: correct MDP3 DMA-related nodesMoudy Ho1-2/+4
In order to generalize the node names, the DMA-related nodes corresponding to MT8183 MDP3 need to be corrected. Fixes: 60a2fb8d202a ("arm64: dts: mt8183: add MediaTek MDP3 nodes") Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: display: mediatek: padding: add compatible for MT8195Moudy Ho1-1/+3
Add a compatible string for the PADDING block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: display: mediatek: split: add compatible for MT8195Moudy Ho1-0/+27
Add compatible string and GCE property for MT8195 SPLIT, of which is operated by MDP3. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: display: mediatek: ovl: add compatible for MT8195Moudy Ho1-0/+1
Add a compatible string for the OVL block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: display: mediatek: merge: add compatible for MT8195Moudy Ho1-0/+1
Add a compatible string for the MERGE block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: display: mediatek: color: add compatible for MT8195Moudy Ho1-0/+1
Add a compatible string for the COLOR block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: display: mediatek: aal: add compatible for MT8195Moudy Ho1-0/+1
Add a compatible string for the AAL block in MediaTek MT8195 that is controlled by MDP3. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: add component TDSHP for MT8195Moudy Ho1-0/+61
Add the fundamental hardware configuration of component TDSHP, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: add component TCC for MT8195Moudy Ho1-0/+62
Add the fundamental hardware configuration of component TCC, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: add component STITCH for MT8195Moudy Ho1-0/+61
Add the fundamental hardware configuration of component STITCH, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: add component HDR for MT8195Moudy Ho1-0/+61
Add the fundamental hardware configuration of component HDR, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: add component FG for MT8195Moudy Ho1-0/+61
Add the fundamental hardware configuration of component FG, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <zangelogioacchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: add compatible for MT8195 WROTMoudy Ho1-1/+5
MT8195 WROT inherited from MT8183, add the corresponding compatible name to it. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: add compatible for MT8195 RSZMoudy Ho1-1/+5
MT8195 RSZ inherited from MT8183, add the corresponding compatible name to it. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: add config for MT8195 RDMAMoudy Ho1-0/+21
Added the configuration for MT8195 RDMA. In comparison to MT8183, it no longer shares SRAM with RSZ, and there are now preconfigured 5 mbox. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: merge the indentical RDMA under displayMoudy Ho2-96/+42
To simplify maintenance and avoid branches, the identical component should be merged and placed in the path belonging to the MDP (from display/* to media/*). In addition, currently only MDP utilizes RDMA through CMDQ, and the necessary properties for "mediatek,gce-events", and "mboxes" have been set up for this purpose. Within DISP, it directly receives component interrupt signals. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: media: mediatek: mdp3: correct RDMA and WROT node with generic ↵Moudy Ho2-21/+31
names The DMA-related nodes RDMA/WROT in MDP3 should be changed to generic names. In addition, fix improper space indent in example. Fixes: 4ad7b39623ab ("media: dt-binding: mediatek: add bindings for MediaTek MDP3 components") Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11media: dt-bindings: mediatek: Add phandle to mediatek,scp on MDP3 RDMAAngeloGioacchino Del Regno1-0/+8
The MDP3 RDMA needs to communicate with the SCP remote processor: allow specifying a phandle to a SCP core. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8195-cherry: Assign sram supply to MFG1 pdAngeloGioacchino Del Regno2-2/+5
Add a phandle to the MT8195_POWER_DOMAIN_MFG1 power domain and assign the GPU SRAM (vsram_others) supply to that in mt8195-cherry: this allows to keep the sram powered up while the GPU is used. This means that it's now possible to remove the regulator-always-on property from the mt6359_vsram_others_ldo_reg vreg, so that it will be switched on and off during suspend. Tested-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11arm64: dts: mediatek: mt8195-cherry: Add MFG0 domain supplyAngeloGioacchino Del Regno1-1/+4
MFG0 is the main power domain for the GPU and its surrounding glue logic, and has a specific power rail. Add its power supply on Cherry platforms and remove the now useless (and wrong) regulator-always-on property from the vbuck1 regulator. Tested-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: reset: mt8188: Add VDOSYS reset control bitsHsiao Chien Sung1-0/+75
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: arm: mediatek: Add compatible for MT8188Hsiao Chien Sung1-0/+1
Add compatible name for MediaTek MT8188 VDOSYS1. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: display: mediatek: padding: Add MT8188Hsiao Chien Sung1-0/+81
Padding is a new hardware module on MediaTek MT8188, add dt-bindings for it. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2023-12-11dt-bindings: display: mediatek: merge: Add compatible for MT8188Hsiao Chien Sung1-0/+3
Add compatible name for MediaTek MT8188 MERGE. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-29 22:33:40 +0300