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2012-09-12net-sched: sch_cbq: avoid infinite loopEric Dumazet1-2/+3
Its possible to setup a bad cbq configuration leading to an infinite loop in cbq_classify() DEV_OUT=eth0 ICMP="match ip protocol 1 0xff" U32="protocol ip u32" DST="match ip dst" tc qdisc add dev $DEV_OUT root handle 1: cbq avpkt 1000 \ bandwidth 100mbit tc class add dev $DEV_OUT parent 1: classid 1:1 cbq \ rate 512kbit allot 1500 prio 5 bounded isolated tc filter add dev $DEV_OUT parent 1: prio 3 $U32 \ $ICMP $DST 192.168.3.234 flowid 1: Reported-by: Denys Fedoryschenko <denys@visp.net.lb> Tested-by: Denys Fedoryschenko <denys@visp.net.lb> Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-12ARM: OMAP2+: clean up PRCM sections of the MakefilePaul Walmsley1-25/+10
Clean up the PRCM sections of the Makefile; this saves a few lines. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-09-12ARM: OMAP2+: clean up OMAP clock Makefile sectionsPaul Walmsley1-13/+8
Clean up the OMAP clock code sections of the Makefile to save some lines of diff. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-09-12ARM: OMAP2+: clean up OMAP4 PRM & sleep build directives in MakefilePaul Walmsley1-11/+7
The prm44xx.o and sleep44xx.o build directives belong with the other PRCM- and PM-related build sections in the Makefile; move them there. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-09-12ARM: OMAP2+: move MPU INTCPS, secure monitor, SDRC build directives in MakefilePaul Walmsley1-8/+13
Move MPU INTCPS (interrupt controller) and secure monitor code build directives to their own Makefile sections, for clarity. Coalesce SDRC-related Makefile directives into the SDRC Makefile section. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-09-12ARM: OMAP2+: clean up omap_hwmod.o build directives in MakefilePaul Walmsley1-8/+7
Move the omap_hwmod_common_data.o build directive down to the hwmod data Makefile section where it belongs. Move the omap_hwmod.o build directive to the top 'Common support' line, since we have no separate hwmod code Makefile section, and it's currently needed for all OMAP2+. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-09-12ARM: OMAP2+: clean up whitespace in MakefilePaul Walmsley1-8/+8
Convert spaces that should be tabs into tabs. Fix another minor formatting issue. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-09-12ARM: OMAP3+: hwmod: Add AM33XX HWMOD dataVaibhav Hiremath4-0/+3388
This patch adds HWMOD data for all the peripherals of AM335X device and also hooks up to the existing OMAP framework. hwmod data has been already been cleaned up for the recent changes in clocktree, where all leaf nodes have been removed, since with modulemode based control, both clock and hwmod interface does same thing. This reduces the code size to large extent and also avoids duplication of same control. So instead of specifying module's leaf node as a main_clk, now we are relying on parent clock of module's functional clock. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: removed period in hwmod device names; changed mmc2 main_clk to mmc_clk at Vaibhav's request; added trailing commas to structure records at Tony's request to deal with some rmk parsing issues; added OMAP_INTC_START to facilitate sparse-IRQ conversion] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-09-12ARM: OMAP2+: hwmod: Hook-up am33xx support in omap_hwmod frameworkVaibhav Hiremath1-0/+178
AM33XX PRCM architecture is different that any OMAP family of devices, so it is required to have separate implementation to handle AM33XX module enable/disable, reset assert/deassert functionality. This patch adds wrapper api's in omap_hwmod framework to access prm/cm for AM33XX family of devices. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> [paul@pwsan.com: fixed checkpatch messages] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-09-12Merge branch 'for-3.6-fixes' of ↵Linus Torvalds1-21/+89
git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq Pull workqueue fixes from Tejun Heo: "It's later than I'd like but well the timing just didn't work out this time. There are three bug fixes. One from before 3.6-rc1 and two from the new CPU hotplug code. Kudos to Lai for discovering all of them and providing fixes. * Atomicity bug when clearing a flag and setting another. The two operation should have been atomic but wasn't. This bug has existed for a long time but is unlikely to have actually happened. Fix is safe. Marked for -stable. * If CPU hotplug cycles happen back-to-back before workers finish the previous cycle, the states could get out of sync and it could get stuck. Fixed by waiting for workers to complete before finishing hotplug cycle. * While CPU hotplug is in progress, idle workers could be depleted which can then lead to deadlock. I think both happening together is highly unlikely but still better to fix it and the fix isn't too scary. There's another workqueue related regression which reported a few days ago: https://bugzilla.kernel.org/show_bug.cgi?id=47301 It's a bit of head scratcher but there is a semi-reliable reproduce case, so I'm hoping to resolve it soonish." * 'for-3.6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq: workqueue: fix possible idle worker depletion across CPU hotplug workqueue: restore POOL_MANAGING_WORKERS workqueue: fix possible deadlock in idle worker rebinding workqueue: move WORKER_REBIND clearing in rebind_workers() to the end of the function workqueue: UNBOUND -> REBIND morphing in rebind_workers() should be atomic
2012-09-12Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds2-2/+3
Pull crypto fixes from Herbert Xu: "This fixes the authenc self-test crash as well as a missing export of a symbol used by a module." * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: authenc - Fix crash with zero-length assoc data crypto/caam: Export gen_split_key symbol for other modules
2012-09-12Merge branch 'for-linus' of ↵Linus Torvalds5-159/+75
git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin Pull blackfin updates from Bob Liu: "One kbuild and a smp build fix." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin: kbuild: add symbol prefix arg to kallsyms blackfin: smp: adapt to generic smp helpers
2012-09-11ARM: dt: tegra: configure power off for some boardsStephen Warren3-0/+6
For Seaboard, Ventana, and Cardhu, add DT property to tell the regulator that it should provide the pm_power_off() implementation. This allows "shutdown" to work. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-11NFS: fsync() must exit with an error if page writeback failedTrond Myklebust2-2/+6
We need to ensure that if the call to filemap_write_and_wait_range() fails, then we report that error back to the application. Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
2012-09-11USB: option: replace ZTE K5006-Z entry with vendor class ruleBjørn Mork1-2/+4
Fix the ZTE K5006-Z entry so that it actually matches anything commit f1b5c997 USB: option: add ZTE K5006-Z added a device specific entry assuming that the device would use class/subclass/proto == ff/ff/ff like other ZTE devices. It turns out that ZTE has started using vendor specific subclass and protocol codes: T: Bus=01 Lev=01 Prnt=01 Port=03 Cnt=01 Dev#= 4 Spd=480 MxCh= 0 D: Ver= 2.00 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=64 #Cfgs= 1 P: Vendor=19d2 ProdID=1018 Rev= 0.00 S: Manufacturer=ZTE,Incorporated S: Product=ZTE LTE Technologies MSM S: SerialNumber=MF821Vxxxxxxx C:* #Ifs= 5 Cfg#= 1 Atr=c0 MxPwr=500mA I:* If#= 0 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=86 Prot=10 Driver=(none) E: Ad=81(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=01(O) Atr=02(Bulk) MxPS= 512 Ivl=4ms I:* If#= 1 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=02 Prot=05 Driver=(none) E: Ad=82(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=02(O) Atr=02(Bulk) MxPS= 512 Ivl=4ms I:* If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=02 Prot=01 Driver=(none) E: Ad=83(I) Atr=03(Int.) MxPS= 64 Ivl=2ms E: Ad=84(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=03(O) Atr=02(Bulk) MxPS= 512 Ivl=4ms I:* If#= 3 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=06 Prot=00 Driver=qmi_wwan E: Ad=85(I) Atr=03(Int.) MxPS= 64 Ivl=2ms E: Ad=86(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=04(O) Atr=02(Bulk) MxPS= 512 Ivl=4ms I:* If#= 4 Alt= 0 #EPs= 2 Cls=08(stor.) Sub=06 Prot=50 Driver=usb-storage E: Ad=05(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms E: Ad=87(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms We do not have any information on how ZTE intend to use these codes, but let us assume for now that the 3 sets matching serial functions in the K5006-Z always will identify a serial function in a ZTE device. Cc: Thomas Schäfer <tschaefer@t-online.de> Cc: stable <stable@vger.kernel.org> Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-09-11serial/8250: Limit the omap workarounds to omap1Tony Lindgren1-2/+2
These workarounds do not apply for CONFIG_ARCH_OMAP2PLUS at all, so let's make it just CONFIG_ARCH_OMAP1. This is needed to for ARM common zImage changes for omap2+ to avoid including plat and mach headers. Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-09-11ARM: tegra: cpu-tegra: explicitly manage re-parentingStephen Warren1-1/+47
When changing a PLL's rate, it must have no active children. The CPU clock cannot be stopped, and CPU clock's divider is not used. The old clock driver used to handle this by internally reparenting the CPU clock onto a different PLL when changing the CPU clock rate. However, the new common-clock based clock driver does not do this, and probably cannot do this due to the locking issues it would cause. To solve this, have the Tegra cpufreq driver explicitly perform the reparenting operations itself. This is probably reasonable anyway, since such reparenting is somewhat a matter of policy (e.g. which alternate clock source to use, whether to leave the CPU clock a child of the alternate clock source if it's running at the desired rate), and hence is something more appropriate for the cpufreq driver than the core clock driver anyway. Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-11ARM: tegra: fix overflow in tegra20_pll_clk_round_rate()Stephen Warren1-1/+1
32-bit math isn't enough when e.g. *prate=12000000, and sel->n=1000. Use 64-bit math to prevent this. Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-11drm/i915: fix up the IBX transcoder B checkDaniel Vetter1-2/+4
This has been added in commit de9a35abb3b343a25065449234e47a76c4f3454a Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Tue Jun 5 11:03:40 2012 +0200 drm/i915: assert that the IBX port transcoder select w/a is implemented Unfortunately I've failed to notice that these checks are not just called for the port that is about to be disabled, but for all (which makes sense for an assert ...), and the WARN missfired when disabling another pipe than the one with the dp port. Hence also check whether the port is actually disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54688 Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-09-11ALSA: hda_intel: add position_fix quirk for Asus K53ECatalin Iacob1-0/+1
Commit c20c5a841cbe47f5b7812b57bd25397497e5fbc0 changed some chipsets to default to POS_FIX_COMBO so they now use POS_FIX_LPIB instead of POS_FIX_POSBUF. Since then I've been getting artifacts on playback, including repeated sounds on my Asus laptop. My hardware is Cougar Point which the commit log of c20c5a841cbe47f5b7812b57bd25397497e5fbc0 mentions as tested so POS_FIX_COMBO probably works in general but apparently it doesn't on Asus K53E therefore the need for the quirk. Signed-off-by: Catalin Iacob <iacobcatalin@gmail.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2012-09-11ALSA: compress_core: fix open flags test in snd_compr_open()Dan Carpenter1-5/+3
O_RDONLY is zero so the original test (f->f_flags & O_RDONLY) is always false and it will never do compress capture. The test for O_WRONLY is also slightly off. The original test would consider "->flags = (O_WRONLY | O_RDWR)" as write only instead of rejecting it as invalid. I've also removed the pr_err() because that could flood dmesg. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2012-09-11ARM: imx6q: replace clk_register_clkdev with clock DT lookupShawn Guo5-50/+291
It really becomes an maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock. Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx6q client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: clk-imx35: Fix SSI clock registrationFabio Estevam1-4/+2
SSI block has two types of clock: ipg: bus clock, the clock needed for accessing registers. per: peripheral clock, the clock needed for generating the bit rate. Currently SSI driver only supports slave mode and only need to handle the ipg clock, because the peripheral clock comes from the master codec. Only register the ipg clock and do not register the peripheral clock for ssi. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: stable@vger.kernel.org
2012-09-11ARM: clk-imx25: Fix SSI clock registrationFabio Estevam1-4/+2
SSI block has two types of clock: ipg: bus clock, the clock needed for accessing registers. per: peripheral clock, the clock needed for generating the bit rate. Currently SSI driver only supports slave mode and only need to handle the ipg clock, because the peripheral clock comes from the master codec. Only register the ipg clock and do not register the peripheral clock for ssi. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: stable@vger.kernel.org
2012-09-11ARM: imx6q-sabrelite: Rename 'pinctrl_gpio_hog'Fabio Estevam1-3/+3
'pinctrl_gpio_hog' is used to setup the pin functions, and it is not neccesarily used only for GPIO pins, so remove 'gpio' from its name to describe a more generic term. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: imx51: decouple device tree boot from board filesShawn Guo2-18/+0
Now, imx51 device tree kernel calls pinctrl to set up pins. The function used to hook up non-DT pin setup is not needed for DT boot any more. Remove it from DT image. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: imx51: build in pinctrl supportShawn Guo2-3/+2
With the imx51 DT board having pinctrl setup define in device tree, it's time to remove dummy pinctrl state and build in the real imx51 pinctrl support. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx51-babbage: add pinctrl settingsShawn Guo2-2/+150
Add pinctrl settings for the exsiting devices in imx51-babbage.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: imx53: remove unneeded files and functionsShawn Guo4-1315/+0
Now imx53 is a device tree only platform, so the files and functions used only by non-DT kernel can be removed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: imx53: support device tree boot onlyShawn Guo9-1017/+18
With device tree kernel provides the equal support as those imx53 board files, it's time to remove the board files and get imx53 support device tree only. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: imx53: decouple device tree boot from board filesShawn Guo2-24/+0
Now, imx53 device tree kernel calls pinctrl to set up pins. The functions used to hook up non-DT pin setup is not needed for DT boot any more. Remove them from DT image. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: imx53: build in pinctrl supportShawn Guo2-3/+2
As all imx53 boards booting from device tree have pinctrl set up in dts, it's time to remove the dummy pinctrl state and build in the real imx53 pinctrl support. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx53-smd: add pinctrl settingsShawn Guo2-2/+69
Add pinctrl settings for the exsiting devices in imx53-smd.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx53-evk: add pinctrl settingsShawn Guo2-2/+39
Add pinctrl settings for the exsiting devices in imx53-evk.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx53-ard: add pinctrl settingsShawn Guo2-2/+69
Add pinctrl settings for the exsiting devices in imx53-ard.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx53-qsb: add pinctrl settingsShawn Guo2-2/+122
Add pinctrl settings for existing devices in imx53-qsb.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: imx6q: remove dummy pinctrl stateShawn Guo1-7/+0
As all imx6q boards have pinctrl set up in device tree, it's time to remove the dummy pinctrl state. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx6q-sabresd: add pinctrl settingsShawn Guo2-1/+50
Add pinctrl settings for existing devices in imx6q-sabresd.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx6q-arm2: add pinctrl for uart and enetShawn Guo2-0/+50
Add missing pinctrl of uart and enet for imx6q-arm2 board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx6q-sabrelite: add pinctrl for usdhc and enetShawn Guo2-1/+56
Add missing pinctrl of usdhc and enet for imx6q-sabrelite board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx6q: sort iomuxc sub-nodes in nameShawn Guo1-10/+10
Sort iomuxc sub-nodes in name so that the node can be located a little bit easier. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx6q: name iomuxc sub-nodes following pin functionShawn Guo2-3/+3
Name iomuxc sub-nodes following pin function and hardware manual. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: dts: imx6q: improve indentation for fsl,pinsShawn Guo2-54/+68
Change the indentation for property fsl,pins a little bit, so that the first and the last line get the same indentation with all other lines. Then it will be easier to copy and past any of these lines. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11ARM: shmobile: emev2: enable PMU(Performance Monitoring Unit)Tetsuyuki Kobayashi2-0/+22
This patch enables PMU(Performance Monitoring Unit) for emev2. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-09-11ARM: shmobile: sh73a0: enable PMU(Performance Monitoring Unit)Tetsuyuki Kobayashi2-0/+22
This patch enables PMU(Performance Monitoring Unit) for sh73a0. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-09-11clk: mxs: replace imx23 clk_register_clkdev with clock DT lookupShawn Guo3-47/+100
It really becomes a maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock. Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx23 client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11clk: mxs: replace imx28 clk_register_clkdev with clock DT lookupShawn Guo3-105/+142
It really becomes a maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock. Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx28 client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-11Merge tag 'mxs-dt-3.7' into mxs/clk-dt-lookupShawn Guo47-4096/+485
mxs-dt-3.7 - Remove all board files and make mach-mxs a DT-only platform - Some dts file formatting and style fixing - DTS update for additional boards and devices
2012-09-11net: qmi_wwan: fix Gobi device probing for un2430Pierre Sauter1-1/+1
HP un2430 is a Gobi 3000 device. It was mistakenly treated as Gobi 1000 in patch b9f90eb2740203ff2592efe640409ad48335d1c2. I own this device and qmi_wwan works again with this fix. Signed-off-by: Pierre Sauter <pierre.sauter@gmail.com> Acked-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-09-11crypto: authenc - Fix crash with zero-length assoc dataHerbert Xu1-2/+2
The authenc code doesn't deal with zero-length associated data correctly and ends up constructing a zero-length sg entry which causes a crash when it's fed into the crypto system. This patch fixes this by avoiding the code-path that triggers the SG construction if we have no associated data. This isn't the most optimal fix as it means that we'll end up using the fallback code-path even when we could still execute the digest function. However, this isn't a big deal as nobody but the test path would supply zero-length associated data. Reported-by: Romain Francoise <romain@orebokech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Tested-by: Romain Francoise <romain@orebokech.com>
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