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2018-09-13arm64: dts: renesas: r8a77990: Add all MSIOF nodesGeert Uytterhoeven1-0/+52
Add the device nodes for all MSIOF SPI controllers, incl. clocks, power domains, and resets properties. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a7795: Move arm_cc630p nodeGeert Uytterhoeven1-9/+9
To preserve by-address-per-group sort order. Fixes: 0f6d237cafda2e06 ("arm64: dts: renesas: r8a7795: add ccree to device tree") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77990: Add BRG support to SCIF2Takeshi Kihara1-2/+12
Add the device node for the external SCIF_CLK, and describe the clock inputs for the Baud Rate Generator for External Clock (BRG) for SCIF2, which can increase serial clock accuracy. The presence of the SCIF_CLK crystal and its clock frequency depend on the actual board. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Enhance patch description] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77990: Use CPG/MSSR and SYSC binding definitionsGeert Uytterhoeven1-18/+18
Use the SoC-specific CPG/MSSR include file to allow future use of R8A77990_CLK_* symbols. Replace the hardcoded power domain indices by R8A77990_PD_* symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: salvator-xs: Improve SATA switch settings commentsGeert Uytterhoeven2-2/+2
The comments describing the non-default switch settings to use SATA are confusing: 'Off' refers to the switch position, not to the MD12 logic value, while the parentheses suggest otherwise. Rephrase to fix this. Fixes: bec000784d5bb571 ("arm64: dts: renesas: salvator-xs: enable SATA") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1Geert Uytterhoeven1-2/+2
usb2_phy1 accidentally uses the same clock/reset as usb2_phy0. Fixes: b5857630a829a8d5 ("arm64: dts: renesas: r8a77965: add usb2_phy nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77965: Fix HS-USB compatibleGeert Uytterhoeven1-1/+1
Should be "renesas,usbhs-r8a77965", not "renesas,usbhs-r8a7796". Fixes: a06e8af801760a98 ("arm64: dts: renesas: r8a77965: add HS-USB node") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77965: Move timer nodeGeert Uytterhoeven1-8/+8
To preserve alphabetical sort order. Fixes: 4c529600eef0a6b7 ("arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: v3hsk: Move lvds0 nodeGeert Uytterhoeven1-12/+12
To preserve alphabetical sort order. Fixes: 4edac426aff11a37 ("arm64: dts: renesas: condor/v3hsk: add DU/LVDS/HDMI support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: Fix whitespace around assignmentsGeert Uytterhoeven8-91/+91
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: updated for a few new cases] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77965: m3nulcb-kf: Initial device treeEugeniu Rosca2-0/+17
This is based on the existing KF device tree sources: $ ls -1 arch/arm64/boot/dts/renesas/*-kf.dts arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb-kf.dts arch/arm64/boot/dts/renesas/r8a7795-h3ulcb-kf.dts arch/arm64/boot/dts/renesas/r8a7796-m3ulcb-kf.dts Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: condor: add PCIe supportSergei Shtylyov1-0/+12
Enable PCIe PHY and PCIEC and specify the PCIe bus clock for the Condor board. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77980: add PCIe supportSergei Shtylyov1-0/+49
Describe the PCIe PHY, PCIEC, and PCIe bus clock in the R8A77980 device tree. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add USB3.0 device nodesBiju Das1-0/+35
Add usb3.0 phy, host and function device nodes on RZ/G2M SoC dtsi. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add USB-DMAC and HSUSB device nodesBiju Das1-0/+45
Add usb dmac and hsusb device nodes on RZ/G2M SoC dtsi. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add USB2.0 phy and host(EHCI/OHCI) device nodesBiju Das1-0/+73
Add USB2.0 phy and host (EHCI/OHCI) device nodes on RZ/G2M SoC dtsi. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add FCPF and FCPV instancesFabrizio Castro1-0/+52
Add FCPF and FCPV instances to the r8a774a1 dtsi, similarly to what was done for the r8a7796 with commit 41dbbf0c5b4e ("arm64: dts: r8a7796: Add FCPF and FCPV instances"), commit 69490bc9665d ("arm64: dts: renesas: r8a7796: Point FDP1 via FCPF to IPMMU-VI0"), and commit cef942d0bd89 ("arm64: dts: renesas: r8a7796: Point VSPI via FCPVI to IPMMU-VC0"). Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add audio supportBiju Das1-0/+275
Add sound support for the RZ/G2M SoC (a.k.a. R8A774A1). This work is based on similar work done on the R8A7796 SoC by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add PWM device nodesFabrizio Castro1-0/+70
This patch adds PWM[0123456] device nodes to the RZ/G2M (a.k.a R8A774A1) device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add Cortex-A53 CPU coresBiju Das1-5/+61
This patch adds definitions for L2 cache for the Cortex-A53 CPU cores (512 KiB in size, organized as 32 KiB x 16 ways), adds Cortex-A53 CPU cores (setting a total of 6 cores, 2 x Cortex-A57 + 4 x Cortex-A53), and finally enables the performance monitor unit for the Cortex-A53 cores on the R8A774A1 SoC. Based on work done for r8a7796 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add all MSIOF nodesBiju Das1-0/+62
Add the device nodes for all MSIOF SPI controllers on RZ/G2M SoC. Based on several similar patches of the R8A7796 device tree by Geert Uytterhoeven <geert+renesas@glider.be> and Simon Horman <horms+renesas@verge.net.au>. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add IPMMU device nodesFabrizio Castro1-0/+73
Add r8a774a1 IPMMU nodes. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add RZ/G2M thermal supportBiju Das1-0/+60
Add thermal support for R8A774A1 (RZ/G2M) SoC. Based on the work done for r8a7796 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add I2C and IIC-DVFS supportBiju Das1-0/+142
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS) devices nodes to the r8a774a1 device tree. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add SDHI nodesFabrizio Castro1-0/+48
Add SDHI nodes to the DT of the r8a774a1 SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add GPIO device nodesFabrizio Castro1-0/+120
Add GPIO device nodes to the DT of the r8a774a1 SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add pinctrl device nodeFabrizio Castro1-0/+5
This patch adds pinctrl device node for R8A774A1 SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add RWDT nodeBiju Das1-0/+10
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas RZ/G2M (r8a774a1) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add Ethernet AVB nodeFabrizio Castro1-0/+45
This patch adds the SoC specific part of the Ethernet AVB device tree node. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add INTC-EX device nodeBiju Das1-0/+16
Add support for the Interrupt Controller for External Devices (INTC-EX) on RZ/G2M. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add SCIF and HSCIF nodesFabrizio Castro1-0/+185
Add the device nodes for all RZ/G2M SCIF and HSCIF serial ports, incl. clocks, power domains and DMAs. According to the HW user manual, SCIF[015] and HSCIF[012] are connected to both SYS-DMAC1 and SYS-DMAC2, while SCIF[34] and HSCIF[34] are connected to SYS-DMAC0. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a774a1: Add SYS-DMAC controller nodesBiju Das1-0/+102
Add sys-dmac[0-2] device nodes for RZ/G2M (r8a774a1) SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: condor/v3hsk: add DU/LVDS/HDMI supportSergei Shtylyov2-0/+235
Define the Condor/V3HSK board dependent parts of the DU and LVDS device nodes. Also add the device nodes for Thine THC63LVD1024 LVDS decoder and Analog Devices ADV7511W HDMI transmitter... Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: v3msk: add eMMC supportSergei Shtylyov1-0/+26
Add the eMMC chip support for the V3M Started Kit board. Based on the original (and large) patches by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77970: add MMC supportSergei Shtylyov1-0/+12
Define the generic R8A77970 part of the MMC0 (SDHI2) device node. Based on the original (and large) patches by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77965: Add OPPs table for cpu devicesDien Pham1-0/+44
This patch adds OPPs table for CA57{0,1} cpu devices Signed-off-by: Dien Pham <dien.pham.ry@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Tested-by: Simon Horman <horms+renesas@verge.net.au> [simon: do not give nodes unit names as they have no bus addresses] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77965: m3nulcb: Initial device treeEugeniu Rosca2-0/+34
Allow the bare M3-N-based ULCB board to boot. Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77965: Add CAN{0,1} placeholder nodesEugeniu Rosca1-0/+10
According to R-Car Gen3 HW manual rev1.00, R-Car M3-N has two CAN interfaces, similar to H3, M3-W and other SoCs from the same family. Add CAN placeholder nodes to avoid below DTC errors: Error: arch/arm64/boot/dts/renesas/ulcb-kf.dtsi:19.1-6 Label or path can0 not found Error: arch/arm64/boot/dts/renesas/ulcb-kf.dtsi:25.1-6 Label or path can1 not found These errors occur *after* the addition of r8a77965-m3nulcb-kf.dts. Fix them beforehand. CAN support is inspired from below commits: - v4.7 commit 308b7e4ba62e ("arm64: dts: r8a7795: Add CAN support") - v4.11 commit 909c16252415 ("arm64: dts: r8a7796: Add CAN support") - v4.12 commit bec0948e810f ("arm64: dts: r8a7796: Add reset control properties") Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> [simon: make placeholder minimal by only including reg property] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77965: Attach the SYS-DMAC to the IPMMUMagnus Damm1-0/+24
For R-Car M3-N hook up SYS-DMAC0, SYS-DMAC1 and SYS-DMAC2 to IPMMU-DS0 and IPMMU-DS1 in same way as for R-Car M3-W. This follows the R-Car Gen3 Rev.1.00 (April 2018) datasheet. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: Initial r8a774a1 SoC device treeBiju Das1-0/+190
Basic support for the RZ/G2M SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: salvator-common: adv748x: Override secondary addressesKieran Bingham1-1/+4
Ensure that the ADV748x device addresses do not conflict, and group them together (visually in i2cdetect) Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77980: add CSI2/VIN supportSergei Shtylyov1-0/+374
Describe the CSI2 and VIN (and their interconnections) in the R8A77980 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: salvator-xs: enable SATAWolfram Sang2-0/+28
Add the nodes to enable SATA. Note that MD12 (SW12-7) must be switched off for that to work. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-13arm64: dts: renesas: r8a77965: Add SATA controller nodeTakeshi Kihara1-0/+11
This patch adds SATA controller node for the R8A77965 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [wsa: rebased to upstream base] Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11arm64: dts: renesas: r8a779{7|8}0: move CAN clock nodeSergei Shtylyov2-14/+14
The CAN clock node should precede the "cpus" node in the R8A779{7|8}0 device trees, according to the alphanumeric node sorting rule... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11arm64: dts: renesas: r8a77980: move IPMMU nodesSergei Shtylyov1-63/+63
The IPMMU nodes should follow the GEther node, not the CAN-FD node, according to the <unit-address> part of the startng IPMMU-DS1 node. While moving the nodes, also do sort them by label alphanumerically... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11arm64: dts: renesas: r8a77990: Enable PWM for Ebisu boardYoshihiro Shimoda2-0/+94
This patch adds PWM device nodes and enables PWM3 and PWM5 for R-Car E3 Ebisu board. These devices are used for backlight control. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-11arm64: dts: renesas: r8a77980: add Cortex-A53 PMU supportSergei Shtylyov1-0/+9
Describe the performance monitor unit (PMU) for the Cortex-A53 cores in the R8A77980 SoC's device tree. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-27arm64: dts: renesas: Convert to new LVDS DT bindingsLaurent Pinchart8-24/+66
The internal LVDS encoder now has DT bindings separate from the DU. Port the r8a7795 and r8a7796 device trees over to the new model. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-27arm64: dts: renesas: r8a77995: Attach the SYS-DMAC to the IPMMUMagnus Damm1-0/+12
Hook up SYS-DMAC0, SYS-DMAC1 and SYS-DMAC2 to IPMMU-DS0 and IPMMU-DS1 following the R-Car Gen3 Rev.1.00 (April 2018) datasheet. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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