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2013-03-15sh-pfc: Use pinmux identifiers in the pin muxing APILaurent Pinchart4-41/+21
The PFC core exposes a sh_pfc_config_gpio() function that configures pinmuxing for a given GPIO (either a real GPIO or a function GPIO). Handling of real and function GPIOs belong to the GPIO layer, move the GPIO number to mark translation to the caller and rename the function to sh_pfc_config_mux(). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Share the PORT_10_REV, PORT_32 and PORT_32_REV definitionsLaurent Pinchart3-50/+32
The macros are defined identically and used in two SoC-specific files, share them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Look up IRQ table entries by GPIO numberLaurent Pinchart7-119/+108
Instead of converting the GPIO number to an enum_id and looking up IRQ table entries by enum_id, replace the pinmux_irq enum_ids field with a gpios field and lookup entries using the GPIO number. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Rename struct pinmux_pin to struct sh_pfc_pinLaurent Pinchart19-23/+22
And drop the pinmux_flag_t typedef. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Split pins and functions into separate gpio_chip instancesLaurent Pinchart3-100/+132
Register two GPIO chips, one for the real GPIOs and one for the function GPIOs. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Split pins and functions definition tablesLaurent Pinchart20-106/+193
Split the GPIOs table into a pins table for real GPIOs and a functions table for function GPIOs. Only register pins with the pinctrl core. The function GPIOs remain accessible as GPIOs. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Don't needlessly check GPIO type in sh_gpio_free()Laurent Pinchart1-4/+1
The GPIO type is always PINMUX_TYPE_FUNCTION when freeing a function GPIO. Hardcode the type value. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Shrink the pinctrl GPIO range to include real GPIOs onlyLaurent Pinchart4-28/+59
As a step towards GPIO function removal, shorten the GPIO range registered with the pinctrl core. Function GPIOs are now handled in the GPIO handlers directly instead of going through the pinctrl API. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Make struct pinmux_gpio enum_id field constLaurent Pinchart1-1/+1
This ensures that the field is not modified, which is a prerequisite for the rest of the PFC refactoring work. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Initialize pinmux_gpio flags staticallyLaurent Pinchart2-20/+15
All function GPIO entries are initialized with the GPIO_FN macro that expands to the PINMUX_GPIO macro, used to initialize real GPIOs. Create a PINMUX_GPIO_FN macro that duplicates PINMUX_GPIO and sets flags to PINMUX_TYPE_FUNCTION and use it in GPIO_FN, and make PINMUX_GPIO set flags to PINMUX_TYPE_GPIO. This removes the need to initialize GPIO flags at runtime and thus simplifies the code, preparing for the GPIO and functions split. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Remove unused sh_pfc_soc_info reserved_id fieldLaurent Pinchart17-17/+0
The field is unused, remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Replace SoC info data and mark ranges with a number of pinsLaurent Pinchart18-44/+36
The data and mark ranges are only used to check whether a GPIO corresponds to a real pin or a function. As pins come first in the list of GPIOs and in the platform-specific GPIO enumerations, we can replace the data and mark ranges by a number of pins. Add an nr_pins field to struct sh_pfc_soc_info to store the number of pins implemented by the SoC, remove the data and mark range fields and introduce sh_pfc_gpio_is_pin() and sh_pfc_gpio_is_function() functions to replace range-based checks. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Replace first_gpio and last_gpio with nr_gpiosLaurent Pinchart20-68/+43
The SoC information first_gpio field is always equal to 0, and the last_gpio field is the index of the last entry in the pinmux_gpios array. Replace the first_gpio and last_gpio fields by a nr_gpios field, and initialize it to ARRAY_SIZE(pinmux_gpios). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Use GPIO_FN instead of PINMUX_GPIO where possibleLaurent Pinchart11-2410/+2409
The GPIO_FN macro expands to the PINMUX_GPIO macro. The regular expression to 'unexpand' PINMUX_GPIO to GPIO_FN is s/\tPINMUX_GPIO(GPIO_FN_\([A-Z0-9_]*\),[ \t]*\1_MARK)/\tGPIO_FN(\1)/ This consolidates SoC-specific PFC information to use the same macros for all SoCs. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Don't take the sh_pfc spinlock in sh_pfc_map_gpios()Laurent Pinchart1-5/+0
The sh_pfc_map_gpios() function is only called at initialization time when no other task can access the sh_pfc fields. Don't protect the operation with a spinlock. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Drop the sh_pfc_pinctrl spinlockLaurent Pinchart1-13/+0
The spinlock is used to protect data that is only accessed sequentially during initialization. Remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Fix a typo and simplify a definition on sh73a0Guennadi Liakhovetski1-6/+2
Fix definition of the SDHIWP0 function and simplify the CPU_ALL_PORT definition on sh73a0. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Don't define the per-device pinctrl struct instances as globalLaurent Pinchart1-22/+18
The pinctrl_desc and pinctrl_gpio_range structures registered with the pinctrl core are per-device instances. Move them to the dynamically allocated sh_pfc_pinctrl structure and initialize them at runtime. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15sh-pfc: Declare operation structures as constLaurent Pinchart1-3/+3
The pinconf, pinctrl and pinmux operation structures hold function pointers that are never modified. Declare them as const. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-15Merge branch 'fixes' of ↵Simon Horman4-6/+5
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into pinmux-base
2013-03-13pinctrl: generic: Fix compilation errorSachin Kamat1-1/+1
The function definition of pinconf_generic_dump_config is defined under CONFIG_DEBUG_FS macro. Define the declaration too under this macro. Without this patch we get the following build error: drivers/built-in.o: In function `pcs_pinconf_config_dbg_show': drivers/pinctrl/pinctrl-single.c:726: undefined reference to `pinconf_generic_dump_config' Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13pinctrl: Print the correct information in debugfs pinconf-state fileLaurent Pinchart1-1/+1
A bad copy&paste resulted in the debugfs pinconf-state file printing the pin name instead of the state name. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13pinctrl: abx500: Fix checking if pin use AlternateFunction registerAxel Lin1-1/+1
It's pointless to check "af.alt_bit1 == UNUSED" twice. This looks like a copy-paste bug, I think what we want is to check if *both* af.alt_bit1 and af.alt_bit2 are UNUSED. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-13Merge branch 'devel' of ↵Simon Horman34-367/+1548
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into pinmux
2013-03-12ARM: shmobile: R8A7779: use gic_iid() in SATA IRQ resourceSergei Shtylyov1-1/+1
Commit "ARM: shmobile: r8a7779: use gic_iid macro" switched R8A7779 platform devices to using gic_iid() macro instead of gic_spi() but commit "ARM: mach- shmobile: r8a7779: add SATA support" added another use of gic_spi(). Convert the SATA IRQ resource to using gic_iid(). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: mach-shmobile: r8a7779: add SATA supportVladimir Barinov2-0/+30
Add SATA clock for r8a7779 SoC (for both device tree and usual cases). Register SATA controller as a "late" platform device on r8a7779 SoC. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: mach-shmobile: r8a7779: SATA DT configurationVladimir Barinov1-0/+7
Allow configuration of the r8a7779 SoC SATA controller using a flattened device tree. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: r8a7779: add Thermal support on DTKuninori Morimoto1-0/+5
76cc1887496fe80138c6b07c37d7f81e4cf27cde (thermal: rcar: add Device Tree support) supported rcar_thermal DT probing. rcar thermal driver doesn't support IRQ on r8a7779 chip since it is using old design IRQ. R-Car/R-Mobile next generation chips are using new design IRQ, and rcar thermal driver is supporting these. This patch adds rcar_thermal DT support for r8a7779 without IRQ. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: tidyup chip series definition order for r8a7740/r8a7779Kuninori Morimoto1-2/+1
move r8a7740_meram_workaround() to r8a7740 area from r8a7779 area Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: r8a7779: use gic_iid macroKuninori Morimoto1-12/+12
"ARM: shmobile: add gic_iid macro for ICCIAR / interrupt ID" enabled to use gic_iid macro. This patch exchange current GIC interrupt setting from gic_spi() to gic_iid() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [ horms+renesas@verge.net.au: Updated git commit id in changelog ] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: r8a7779: fixup DT machine nameKuninori Morimoto1-1/+1
r8a7779 is not sh73a0 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: r8a7779: fixup dtsi typoKuninori Morimoto1-1/+1
r8a7779 is not r8a7740 chip Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: add gic_iid macro for ICCIAR / interrupt IDKuninori Morimoto1-0/+1
R-Car H1 datasheet GIC number is indicating GIC ICCIAR / interrupt ID number, not SPI number, but current marzen board code is using gic_spi() with un-understandable calculation. This patch adds new gic_iid() macro which means ICCIAR / interrupt ID, and used the number currently written on datasheet. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [ horms+renesas@verge.net.au: Split board-marzen.c portion into a separate patch ] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: mach-shmobile: r8a7740: Add DT names to clock listBastian Hecht1-0/+9
This adds temporarily the alternative device names to the clock list that are used when booting via Device Tree setup. Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: Remove unused hotplug.cMagnus Damm3-75/+0
Each CPU Hotplug implementation for mach-shmobile is now self-contained, so this change removes unused helper code in hotplug.c. The two CPU Hotplug capable SoCs sh73a0 and r8a7779 remain unchanged. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: Rearrange r8a7779 cpu hotplug codeMagnus Damm1-47/+49
Update the r8a7779 SMP code and CPU Hotplug in particular to follow the same style as sh73a0. This means dropping __maybe_unused for #ifdef CONFIG_HOTPLUG_CPU. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: Use sh73a0-specific cpu disable codeMagnus Damm1-1/+6
Convert the sh73a0 CPU Hotplug code to use a local implementation of ->cpu_disable(). With this change in place the sh73a0 SMP code does no longer depend on hotplug.c. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: Update r8a7779 to use scu_power_mode()Magnus Damm1-27/+5
Update the SMP code for R8A7779 to make use of the shared SCU function scu_power_mode() together with the early setup code in shmobile_secondary_vector_scu. With this patch in place the secondary CPUs modify the SCU setting during early boot instead of letting other CPUs deal with the coherency setting before boot. In other words, we used to setup coherency before boot in r8a7779_boot_secondary() but that bit is now instead handled by the code in shmobile_secondary_vector_scu. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: Update r8a7779 to check SCU for hotplugMagnus Damm1-6/+32
Update the r8a7779 CPU Hotplug code to use SCU PSR to wait for the target CPU core. Previously the shared code in hotplug.c was used to let cpu_kill() wait for cpu_die(). With this change in place the r8a7779 SMP code does not depend on hotplug.c anymore. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: Use R8A7779_SCU_BASE with TWDMagnus Damm1-4/+3
Rework the IOMEM() usage for the SCU base address in the case of r8a7779. Adjusts the TWD to use R8A7779_SCU_BASE. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: Rework SH73A0_SCU_BASE IOMEM() usageMagnus Damm1-2/+2
Rework the IOMEM() usage for the SCU base address in the case of sh73a0. Removes recently introduced build warnings: arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default] arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].start') [enabled by default] arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default] /arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].end') [enabled by default] Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: Fix base address readout in headsmp-scu.SMagnus Damm1-1/+2
Rework the early SCU setup code in headsmp-scu.S to read the base address in the same way as we use to fetch the address of the invalidation function. Reported-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: r8a7779: Remove lan from dtsiSimon Horman1-9/+0
The ethernet controller is not part of the r8a7779 SoC. Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: r8a7779: Do not initialise i2c as an early deviceSimon Horman1-5/+3
It is sufficient to initialise i2c as a late device. Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: r8a7779: Do not use early devices with DT referenceSimon Horman2-17/+10
Do not initialise any early devices when using the minimal DT reference code. Only the delay needs to be initialised. Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: sh73a0: Do not use early devices with DT referenceSimon Horman2-16/+10
Do not initialise any early devices when using the minimal DT reference code. Only the delay needs to be initialised. Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: sh73a0: Remove warning about SMPSimon Horman1-8/+0
Remove warning about SMP not working with the clock initialisation sheme used for reference DT. This is resolved by not selecting CONFIG_PREEMPT. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: sh73a0: Add smp ops to DT_MACHINE_STARTSimon Horman1-0/+1
This a board to be brought up with SMP enabled without a board file present. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: sh73a0: Remove sh73a0_init_irq_dt()Simon Horman2-9/+2
This is not needed as irq_set_wake is only used for suspend to ram which is not a requirement for bringing up boards using DT. Reported-by: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-03-12ARM: shmobile: sh73a0: fix Z and ZG clock hierarchyGuennadi Liakhovetski1-2/+2
Z and ZG clocks on sh73a0 have pll0 as their parent, not pll1. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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