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2017-04-19Merge tag 'tegra-for-4.12-arm64-dt' of ↵Olof Johansson5-3/+487
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64 arm64: tegra: Device tree changes for v4.12-rc1 This adds a bunch of features for Tegra186, such as PMC, ethernet, I2C, SDHCI and GPIO. It also enables various features on the P2771 devkit. A small fix is made to the compatible string list for the flow controller on Tegra132 and the IOMMU is enabled for host1x on Tegra210. * tag 'tegra-for-4.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Update the Tegra132 flowctrl compatible string arm64: tegra: Add GPU node for Tegra186 arm64: tegra: Enable IOMMU for host1x on Tegra210 arm64: tegra: Enable VIC on Tegra210 arm64: tegra: Add GPIO expanders on P2771 arm64: tegra: Add power monitors on P2771 arm64: tegra: Add GPIO keys on P2771 arm64: tegra: Enable current monitors on P3310 arm64: tegra: Enable SD/MMC slot on P2771 arm64: tegra: Enable SDHCI controllers on P3110 arm64: tegra: Add initial power tree for P3310 arm64: tegra: Enable ethernet on P3310 arm64: tegra: Enable I2C controllers on P3310 arm64: tegra: Invert the PMC interrupt on P3310 arm64: tegra: Add ethernet support for Tegra186 arm64: tegra: Add PMC controller on Tegra186 Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19Merge tag 'sunxi-dt-h5-for-4.12' of ↵Olof Johansson6-562/+955
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64 Allwinner H5 DT changes for 4.12 H5 patches for 4.12, which are mostly related to reworking the H3 DTSI to be usable on the arm64 H5 DTSI, that shares almost everything with the H3 but the CPU cores. We then have patches to support the H5 boards on top. * tag 'sunxi-dt-h5-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu arm64: allwinner: h5: enable USB OTG on Orange Pi PC 2 board arm64: allwinner: h5: add support for the Orange Pi PC 2 board arm64: allwinner: h5: add Allwinner H5 .dtsi ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5 arm: sun8i: h3: split Allwinner H3 .dtsi arm: sun8i: h3: correct the GIC compatible in H3 to gic-400 arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19Merge tag 'sunxi-dt64-for-4.12' of ↵Olof Johansson1-0/+29
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64 Allwinner arm64 DT changes for 4.12 Some patches to enable the PRCM block in the A64 * tag 'sunxi-dt64-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: allwinner: a64: add R_PIO pinctrl node arm64: allwinner: a64: add r_ccu node Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19Merge tag 'amlogic-dt64-redo' of ↵Olof Johansson32-66/+1375
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64 Amlogic 64-bit DT updates for v4.12 - pinctrl: new pins for audio - clocks: more clocks exposed for GFX, audio - new board: Khadas Vim (S905X) - new board: HwaCom AmazeTV (S905X) - ethernet phy: add GPIO resets * tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (41 commits) ARM64: dts: meson-gx: Add support for HDMI output ARM64: dts: meson-gx: Add shared CMA dma memory pool ARM64: dts: meson-gxbb-odroidc2: Enable SARADC node dt-bindings: clock: gxbb-clkc: Add GXL compatible variant clk: meson-gxbb: Expose GP0 dt-bindings clock id clk: meson-gxbb: Add MALI clock IDS dt-bindings: clk: gxbb: expose i2s output clock gates ARM64: dts: meson-gxl: add spdif output pins ARM64: dts: meson-gxl: add i2s output pins ARM64: dts: meson-gxbb: add spdif output pins ARM64: dts: meson-gxbb: add i2s output pins ARM64: dts: meson-gxbb: Add USB Hub GPIO hog ARM: dts: meson8b: Add gpio-ranges properties ARM: dts: meson8: Add gpio-ranges properties ARM64: dts: meson-gxl: Add gpio-ranges properties ARM64: dts: meson-gxbb: Add gpio-ranges properties ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXL ARM64: dts: meson-gxl: Add missing pinctrl pins groups ARM64: dts: meson-gx: Prepend GX generic compatible like other nodes ARM64: dts: meson-gx: empty line cleanup ... Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-05Merge tag 'amlogic-clk-headers' into v4.12/dt64Kevin Hilman3-8/+27
Amlogic clock headers and DT binding updates for v4.12 - add clocks for I2S and Mali # gpg: Signature made Tue Apr 4 16:07:50 2017 PDT using RSA key ID D3FBC665 # gpg: Good signature from "Kevin Hilman <khilman@kernel.org>" [ultimate] # gpg: aka "Kevin Hilman <khilman@deeprootsystems.com>" [ultimate] # gpg: aka "Kevin Hilman <khilman@gmail.com>" [ultimate] # gpg: aka "Kevin Hilman <khilman@baylibre.com>" [ultimate] * tag 'amlogic-clk-headers': dt-bindings: clock: gxbb-clkc: Add GXL compatible variant clk: meson-gxbb: Expose GP0 dt-bindings clock id clk: meson-gxbb: Add MALI clock IDS dt-bindings: clk: gxbb: expose i2s output clock gates
2017-04-04ARM64: dts: meson-gx: Add support for HDMI outputNeil Armstrong9-0/+191
Add HDMI output and connector nodes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-04-04ARM64: dts: meson-gx: Add shared CMA dma memory poolNeil Armstrong1-0/+8
The HDMI modes needs more CMA memory to be reserved at boot-time. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-04-04ARM64: dts: meson-gxbb-odroidc2: Enable SARADC nodeHeiner Kallweit1-0/+5
Now that 3adbf3427330 "iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs" has added support for the ADC, let's enable it on Odroid C2. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-04-04dt-bindings: clock: gxbb-clkc: Add GXL compatible variantNeil Armstrong1-1/+2
Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1490178747-14837-6-git-send-email-narmstrong@baylibre.com
2017-04-04clk: meson-gxbb: Expose GP0 dt-bindings clock idNeil Armstrong2-1/+2
This patch exposes the GP0 PLL clock id in the dt bindings. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1490178747-14837-5-git-send-email-narmstrong@baylibre.com
2017-04-04clk: meson-gxbb: Add MALI clock IDSNeil Armstrong2-1/+13
Add missing MALI clock IDs and expose the muxes and gates in the dt-bindings. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1490177935-9646-2-git-send-email-narmstrong@baylibre.com
2017-04-04dt-bindings: clk: gxbb: expose i2s output clock gatesJerome Brunet2-5/+10
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20170309104154.28295-10-jbrunet@baylibre.com
2017-04-04ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccuIcenowy Zheng1-31/+14
Now we have driver for the PRCM CCU, switch to use it instead of old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi . The mux 3 of R_CCU is still the internal oscillator, which is said to be 16MHz plus minus 30%, and get a measured value of 15MHz~16MHz on my two H3 boards and one H5 board. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-04arm64: allwinner: a64: add R_PIO pinctrl nodeIcenowy Zheng1-0/+12
Allwinner A64 have a dedicated pin controller to manage the PL pin bank. As the driver and the required clock support are added, add the device node for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-04arm64: allwinner: a64: add r_ccu nodeIcenowy Zheng1-0/+17
A64 SoC have a CCU (r_ccu) in PRCM block. Add the device node for it. The mux 3 of R_CCU is an internal oscillator, which is 16MHz according to the user manual, and has only 30% accuracy based on our experience on older SoCs. The real mesaured value of it on two Pine64 boards is around 11MHz, which is around 70% of 16MHz. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-04arm64: tegra: Update the Tegra132 flowctrl compatible stringJon Hunter1-1/+1
Update the Tegra132 flowctrl compatible string to include "nvidia,tegra132-flowctrl" so it is aligned with the flowctrl binding documentation. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-04-04arm64: tegra: Add GPU node for Tegra186Alexandre Courbot1-0/+19
Add the DT node for the GP10B GPU on Tegra186. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-31Merge tag 'v4.12-rockchip-dts64-symlinks-1' of ↵Arnd Bergmann6-0/+1629
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 Pull "Rockchip dts64 updates (using arm/arm64 symlinks) for 4.12 part1" from Heiko Stübner Rockchip dts changes based on the newly created arm/arm64 symlinks. The core addition is the support for the rk3399-based Gru family of ChromeOS devices, like the Kevin board which is the recently released Samsung Chromebook Plus. Additionally the usb3 controllers are added to rk3399 as they're used on Gru devices and even without full type-c support they can at least drive usb2 devices already. * tag 'v4.12-rockchip-dts64-symlinks-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: add regulator info for Kevin digitizer arm64: dts: rockchip: describe Gru/Kevin OPPs + CPU regulators arm64: dts: rockchip: add Gru/Kevin DTS dt-bindings: Document rk3399 Gru/Kevin arm64: dts: rockchip: support dwc3 USB for rk3399
2017-03-31Merge tag 'v4.12-rockchip-dts64-1' of ↵Arnd Bergmann2-64/+123
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 Pull "Rockchip dts64 updates for 4.12 part1" from Heiko Stübner: Contains various changes for the rk3368 (dma, i2s, disable mailbox per default, mmc-resets) and also removes the wrongly added idle states, that do not match the hardware's capabilities, as well as some general rk3399 pcie fixes as well as also the mmc resets. * tag 'v4.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: fix PCIe domain number for rk3399 arm64: dts: rockchip: add rk3399 dw-mmc resets arm64: dts: rockchip: add rk3368 dw-mmc resets arm64: dts: rockchip: disable mailbox of RK3368 SoCs per default arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs arm64: dts: rockchip: add dmac nodes for rk3368 SoCs arm64: dts: rockchip: remove wrongly added idle states on rk3368 arm64: dts: rockchip: sort rk3399-pcie by unit address
2017-03-31Merge tag 'arm-soc/for-4.12/devicetree-arm64' of ↵Arnd Bergmann3-29/+53
http://github.com/Broadcom/stblinux into next/dt64 Pull "Broadcom devicetree-arm64 changes for 4.12" from Florian Fainelli: This pull request contains Broadcom ARM64-based SoCs Device Tree updates for 4.12, please pull the following: - Rob enables the cryptographic block on Northstar 2 (SPU) by adding the proper Device Tree nodes - Jon replaces all occurences of: status = "ok" with status = "okay" to better conform to the Device Tree specification * tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux: arm64: dts: NS2: convert "ok" to "okay" arm64: dts: NS2: Add Broadcom SPU driver DT entry
2017-03-31Merge tag 'mvebu-dt64-4.12-1' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann8-1/+195
next/dt64 Pull "mvebu dt64 for 4.12 (part 1)" from Gregory CLEMENT: - Add RTC support on Armada 7k/8k - Improve i2c support on Armada 37xx - Add gpio expander and RTC on Armada 3720 board - Improve USB3 support on Armada 37xx - Add network support on Armada 7k/8k * tag 'mvebu-dt64-4.12-1' of git://git.infradead.org/linux-mvebu: arm64: marvell: dts: add PPv2.2 description to Armada 7K/8K ARM64: dts: marvell: armada-3720 add RTC support ARM64: dts: marvell: armada-3720-db: Add phy for USB3 ARM64: dts: marvell: armada-37xx: Add clock resource for USB3 ARM64: dts: marvell: armada-37xx: Fix interrupt mapping for USB3 ARM64: dts: marvell: armada-3720-db: add gpio expander ARM64: dts: marvell: armada37xx: add address and size property for i2c cells arm64: dts: marvell: add RTC description for Armada 7K/8K
2017-03-31Merge tag 'uniphier-dt64-v4.12' of ↵Arnd Bergmann4-15/+22
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt64 Pull "UniPhier ARM64 SoC DT updates for v4.12" from Masahiro Yamada: - Fix W=* build warnings - Add pinctrl properties to eMMC nodes - Fix resets properties of USB nodes * tag 'uniphier-dt64-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: re-order reset deassertion of USB of LD11 arm64: dts: uniphier: add pinctrl property to eMMC node for LD11/LD20 arm64: dts: uniphier: move memory node below aliases node arm64: dts: uniphier: fix no unit name warnings
2017-03-31arm64: dts: move from ARCH_VULCAN to ARCH_THUNDER2Jayachandran C4-12/+14
Move and update device tree files as part of transition from Broadcom Vulcan to Cavium ThunderX2. The changes are to: * rename dts/broadcom/vulcan.dtsi to cavium/thunder2-99xx.dtsi, update cpu cores to be "cavium,thunder2", and update SoC to be "cavium,thunderx2-cn9900" * move SoC dts/broadcom/vulcan-eval.dtsi to cavium/thunder2-99xx.dtsi and update board name string * Update dts/broadcom/Makefile not to build vulcan dtbs * Update dts/cavium/Makefile to build thunder2 dtbs No changes to the dts contents except the updated "compatible" and "model" properties. Signed-off-by: Jayachandran C <jnair@caviumnetworks.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-31dt-bindings: Add arm64 ARCH_THUNDER2 platform documentationJayachandran C2-0/+9
Add documentation for Cavium's ThunderX2 CN99XX ARM64 processor. This SoC will use "cavium,thunderx2-cn9900" as the compatible property. Also add a documentation entry for the "cavium,thunder2" cpu core present in these SoCs. Signed-off-by: Jayachandran C <jnair@caviumnetworks.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-28ARM64: dts: meson-gxl: add spdif output pinsjbrunet1-0/+21
Add EE and AO domains pins for the spdif output to the gxl device tree. Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28ARM64: dts: meson-gxl: add i2s output pinsjbrunet1-0/+62
Add EE and AO domains pins for the i2s output clocks and data the gxl device tree Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28ARM64: dts: meson-gxbb: add spdif output pinsjbrunet1-0/+21
Add EE and AO domains pins for the spdif output to the gxbb device tree. Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28ARM64: dts: meson-gxbb: add i2s output pinsjbrunet1-0/+63
Add EE and AO domains pins for the i2s output clocks and data to the gxbb device tree. Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28ARM64: dts: meson-gxbb: Add USB Hub GPIO hogNeil Armstrong1-0/+15
The ODroid-C2 on-board USB Hub needs to to have it's reset signal set to high level in order to be enumerated by the USB Host Controller. But this management must be part of the currently in-development Generic Power Sequence patch that will allow a USB Controller driver to start and stop a power sequence associated to the USB Bus. In the meantime, a simple USB Hog will work to enable the USB Hub. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28ARM: dts: meson8b: Add gpio-ranges propertiesNeil Armstrong1-0/+2
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28ARM: dts: meson8: Add gpio-ranges propertiesNeil Armstrong1-0/+2
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28ARM64: dts: meson-gxl: Add gpio-ranges propertiesNeil Armstrong1-0/+2
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28ARM64: dts: meson-gxbb: Add gpio-ranges propertiesNeil Armstrong1-0/+2
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-28ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXLNeil Armstrong4-0/+82
The same Mali-450 MP3 GPU is present in the GXBB and GXL SoCs. The node is simply added in the meson-gxbb.dtsi file. For GXL, since a lot is shared with the GXM that has a Mali-T820 IP, this patch adds a new meson-gxl-mali.dtsi and is included in the SoC specific dtsi files. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [khilman: s/MALI/Mali in changelog] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-27arm64: allwinner: h5: enable USB OTG on Orange Pi PC 2 boardIcenowy Zheng1-1/+26
Orange Pi PC 2 board features a OTG port like the one on older H3 Orange Pi's, with PG12 pin being the id det pin and PL2 being the vbus driver pin. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm64: allwinner: h5: add support for the Orange Pi PC 2 boardAndre Przywara2-0/+164
The Orange Pi PC 2 is a typical single board computer using the Allwinner H5 SoC. Apart from the usual suspects it features three separately driven USB ports and a Gigabit Ethernet port. Also it has a SPI NOR flash soldered, from which the board can boot from. This enables the SBC to behave like a "real computer" with built-in firmware. Add the board specific .dts file, which includes the H5 .dtsi and enables the peripherals that we support so far. Reviewed-by: Rask Ingemann Lambertsen <rask@formelder.dk> Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Icenowy: dropped all GPIO pinctrl nodes, change red LED gpio, change MMC cd to active-low, rename some node names to prevent underscores] Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm64: allwinner: h5: add Allwinner H5 .dtsiAndre Przywara2-0/+125
The Allwinner H5 SoC is pin-compatible to the H3 SoC, but uses Cortex-A53 cores instead. Based on the now shared base .dtsi describing the common peripherals describe the H5 specific nodes on top of that. That symlinks in the sunxi-h3-h5.dtsi from the arch/arm tree. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Icenowy: add H5 pinctrl compatible, and changes for my h3-h5 dtsi refactor, commit message changed to meet new arm64 naming scheme, drop H3 pinctrl compatible because of interrupt bank change, drop H3 ccu compatible because of clock change, drop ccu node as it come into h3-h5 dtsi] Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5Icenowy Zheng1-0/+32
Allwinner H3/H5 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI or MUSB controller. Add device nodes for these controllers. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm: sun8i: h3: split Allwinner H3 .dtsiAndre Przywara2-559/+626
The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller updated. So we should really share almost the whole .dtsi. In preparation for that move the peripheral parts of the existing sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi. The actual sun8i-h3.dtsi then includes that and defines the H3 specific parts on top of it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Icenowy: also split out mmc and gic, as well as pio and ccu's compatible, and make drop of skeleton into a seperated patch] Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm: sun8i: h3: correct the GIC compatible in H3 to gic-400Icenowy Zheng1-1/+1
According to the datasheets provided by Allwinner, both Allwinner H3 and H5 use GIC-400 as their interrupt controller. For better device tree reusing, correct the GIC compatible in H3 DTSI to "arm,gic-400", thus this node can be reused in H5. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSIIcenowy Zheng1-1/+0
After converting to generic pinconf binding, pinctrl-a10.h is now not used at all. Drop its inclusion for H3 DTSI. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSIIcenowy Zheng1-2/+0
The skeleton.dtsi file is now deprecated, and do not exist in ARM64 environment. Since we will soon reuse most part of H3 DTSI for H5, which is an ARM64 chip, drop skeleton.dtsi inclusion now. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-24ARM64: dts: meson-gxl: Add missing pinctrl pins groupsNeil Armstrong1-0/+32
Add pinctrl pins nodes following the additions of missing pins in the pinctrl driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-23ARM64: dts: meson-gx: Prepend GX generic compatible like other nodesNeil Armstrong1-8/+8
Prepend the compatible strings with a GX generic name in nodes compatible with the GXBB HW and keep the same scheme as other nodes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-23ARM64: dts: meson-gx: empty line cleanupNeil Armstrong1-1/+0
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-23ARM64: dts: meson-gx: Finally move common nodes to GX dtsiNeil Armstrong3-35/+40
Since we know the GXBB and GXL/GXM share more hardware, we can safely move the remaining peripheral nodes present in the GXBB dtsi to the common GX dtsi. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-23ARM64: dts: meson-gxl: add support for the Khadas VIM boardMartin Blumenstingl2-0/+115
The Khadas VIM series consists of two boards which are almost identical: They are both using the same GXL S905X SoC, 100Mbit/s ethernet (through the SoC-internal PHY), 2GB DDR3 memory, a micro-SD card slot, onboard eMMC, Broadcom based SDIO WIFI, 2x USB A and 1x USB Type-C (the latter with OTG support). The red LED is driven by PWM_AO_B (which allows dimming), while the blue LED is managed by the firmware. The differences are: - the VIM Pro has a 16GB eMMC module, while the VIM only has 8GB - the VIM Pro uses an AP6255 a/b/g/n/ac WIFI module, while the VIM comes with an AP6212 b/g/n SDIO WIFI module (the Vim uses an 8GB eMMC module, while The boards are based on Amlogic's GXL S905X P212 reference design, which is why most of the functionality (all MMC controllers and power sequences, IR remote input, the main UART, ADC and ethernet) is simply inherited from meson-gxl-s905x-p212.dtsi. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-23dt-bindings: amlogic: add the Khadas VIMMartin Blumenstingl1-0/+2
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-23devicetree: add vendor prefix for KhadasMartin Blumenstingl1-0/+1
Khadas is a new sub-brand of "Shenzhen Wesion Technology Co., Ltd.". They are developing Amlogic and Rockchip based "DIY boxes" (single board computers): http://khadas.com/ They are best know for their latest product: the Khadas VIM (an Amlogic GXL S905X based SBC). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-03-23ARM64: dts: amlogic: meson-gxl: add the missing PWM pinsMartin Blumenstingl1-0/+56
This adds the new DT nodes for the missing PWM pins in the EE and AO domain. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-25 05:59:24 +0300