summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2023-08-14arm64: dts: qcom: apq8016-sbc: Fix ov5640 data-lanes declarationBryan O'Donoghue1-1/+1
The yaml constraint for data-lanes is [1, 2] not [0, 2]. The driver itself doesn't do anything with the data-lanes declaration save count the number of specified data-lanes and calculate the link rate so, this change doesn't have any functional side-effects. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-4-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-14arm64: dts: qcom: apq8016-sbc: Fix ov5640 regulator supply namesBryan O'Donoghue1-3/+3
The ov5640 driver expects DOVDD, AVDD and DVDD as regulator supply names. The ov5640 has depended on these names since the driver was committed upstream in 2017. Similarly apq8016-sbc.dtsi has had completely different regulator names since its own initial commit in 2020. Perhaps the regulators were left on in previous 410c bootloaders. In any case today on 6.5 we won't switch on the ov5640 without correctly naming the regulators. Fixes: 39e0ce6cd1bf ("arm64: dts: qcom: apq8016-sbc: Add CCI/Sensor nodes") Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-3-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-14arm64: dts: qcom: msm8916: Define CAMSS ports in core dtsiBryan O'Donoghue1-0/+8
Each CSIPHY in CAMMS maps to a port here in the dtsi, since the number of CSIPHYs is fixed per SoC define the 8916 ports for both available PHYs. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-2-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: Add ipq5018 SoC and rdp432-c2 board supportSricharan Ramabadhran3-0/+323
Add initial device tree support for the Qualcomm IPQ5018 SoC and rdp432-c2 board. Few things like 'reboot' does not work because, couple of more 'SCM' APIS are needed to clear some TrustZone settings. Those will be posted separately. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Co-developed-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/1690533192-22220-6-git-send-email-quic_srichara@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11dt-bindings: qcom: Add ipq5018 bindingsSricharan Ramabadhran1-0/+7
Document the new ipq5018 SOC/board device tree bindings. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/1690533192-22220-4-git-send-email-quic_srichara@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11Merge branch '1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' ↵Bjorn Andersson3-0/+368
into arm64-for-6.6 Merge the IPQ5018 GCC Devicetree binding through a topic branch, in order to the the clock defines.
2023-08-11dt-bindings: clock: Add IPQ5018 clock and resetSricharan Ramabadhran3-0/+368
This patch adds support for the global clock controller found on the IPQ5018 based devices. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Link: https://lore.kernel.org/r/1690533192-22220-2-git-send-email-quic_srichara@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: qcom: sa8775p-ride: enable EMAC1Bartosz Golaszewski1-0/+71
Enable the second MAC on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-10-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: qcom: sa8775p-ride: add an alias for ethernet0Bartosz Golaszewski1-0/+1
Once we add a second ethernet node, the MDIO bus names will conflict unless we provide aliases. Add one for the existing ethernet node. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-9-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: qcom: sa8775p-ride: sort aliases alphabeticallyBartosz Golaszewski1-2/+2
For improved readability order the aliases alphabetically for sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-8-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: qcom: sa8775p-ride: add the second SGMII PHYBartosz Golaszewski1-0/+9
Add a second SGMII PHY that will be used by EMAC1 on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-7-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: qcom: sa8775p-ride: index the first SGMII PHYBartosz Golaszewski1-2/+2
We'll be adding a second SGMII PHY on the same MDIO bus, so let's index the first one for better readability. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-6-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: qcom: sa8775p-ride: move the reset-gpios property of the PHYBartosz Golaszewski1-4/+4
Device-tree bindings for MDIO define per-PHY reset-gpios as well as a global reset-gpios property at the MDIO node level which controls all devices on the bus. The latter is most likely a workaround for the chicken-and-egg problem where we cannot read the ID of the PHY before bringing it out of reset but we cannot bring it out of reset until we've read its ID. I have proposed a comprehensive solution for this problem in 2020 but it never got upstream. We do however have workaround in place which allows us to hard-code the PHY id in the compatible property, thus skipping the ID scanning. Let's make the device-tree for sa8775p-ride slightly more correct by moving the reset-gpios property to the PHY node with its ID put into the PHY node's compatible. Link: https://lore.kernel.org/all/20200622093744.13685-1-brgl@bgdev.pl/ Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-5-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: qcom: sa8775p-ride: enable the second SerDes PHYBartosz Golaszewski1-0/+5
Enable the second SerDes PHY on sa8775p-ride development board. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-4-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: qcom: sa8775p: add a node for EMAC1Bartosz Golaszewski1-0/+33
Add a node for the second MAC on sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-3-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-11arm64: dts: qcom: sa8775p: add a node for the second serdes PHYBartosz Golaszewski1-0/+9
Add a node for the SerDes PHY used by EMAC1 on sa8775p-ride. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Link: https://lore.kernel.org/r/20230810080909.6259-2-brgl@bgdev.pl Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-10arm64: dts: qcom: sdm845: Enable CAMSS on the bare rb3 boardBryan O'Donoghue1-0/+7
Enable CAMSS on the standard RB3 as it is possible to run the test pattern generator (TPG) without any populated ports/endpoints. media-ctl --reset yavta --no-query -w '0x009f0903 9' /dev/v4l-subdev4 yavta --list /dev/v4l-subdev4 media-ctl -d /dev/media0 -V '"msm_csid0":0[fmt:SGRBG10_1X10/3280x2464]' media-ctl -d /dev/media0 -V '"msm_vfe0_rdi0":0[fmt:SGRBG10_1X10/3280x2464]' media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]' media-ctl -d /dev/media0 -p yavta -B capture-mplane --capture=5 -n 5 -I -f SGRBG10P -s 3280x2464 --file=TPG-SGRBG10-3280x2464-000-#.bin /dev/video2 Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230809203534.1100030-2-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-10arm64: dts: qcom: sa8540p-ride: enable rtcEric Chanudet2-1/+25
SA8540P-ride is one of the Qualcomm platforms that does not have access to UEFI runtime services and on which the RTC registers are read-only, as described in: https://lore.kernel.org/all/20230202155448.6715-1-johan+linaro@kernel.org/ Reserve four bytes in one of the PMIC registers to hold the RTC offset the same way as it was done for sc8280xp-crd which has similar limitations: commit e67b45582c5e ("arm64: dts: qcom: sc8280xp-crd: enable rtc") On SA8540P-ride, the register bank SDAM6 of the first PMIC is not writable. Following recommendations provided during the review, use SDAM2 from the second PMIC at offset 0xa0 instead. Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Eric Chanudet <echanude@redhat.com> Link: https://lore.kernel.org/r/20230809203506.1833205-1-echanude@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-04arm64: dts: qcom: sdm670: add frequency profileRichard Acayan1-0/+16
Add the coefficients for the CPU frequencies to aid in frequency scaling. Profiling setup: - freqbench (https://github.com/kdrag0n/freqbench) - LineageOS kernel, android_kernel_google_msm-4.9 - recommended configuration options by freqbench - disabled options that require clang or 32-bit compilers - mmc governor switched from simple_ondemand to powersave Frequency domains: cpu1 cpu6 Offline CPUs: cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 Sampling power every 1000 ms Baseline power usage: 445 mW ===== CPU 1 ===== Frequencies: 300 576 748 998 1209 1324 1516 1612 1708 300: 1114 3.7 C/MHz 43 mW 11.6 J 25.8 I/mJ 269.4 s 576: 2138 3.7 C/MHz 51 mW 7.1 J 42.2 I/mJ 140.3 s 748: 2780 3.7 C/MHz 67 mW 7.3 J 41.3 I/mJ 107.9 s 998: 3706 3.7 C/MHz 73 mW 5.9 J 51.1 I/mJ 80.9 s 1209: 4490 3.7 C/MHz 86 mW 5.7 J 52.2 I/mJ 66.8 s 1324: 4918 3.7 C/MHz 90 mW 5.5 J 54.6 I/mJ 61.0 s 1516: 5631 3.7 C/MHz 103 mW 5.5 J 54.9 I/mJ 53.3 s 1612: 5987 3.7 C/MHz 109 mW 5.5 J 55.0 I/mJ 50.1 s 1708: 6344 3.7 C/MHz 126 mW 5.9 J 50.5 I/mJ 47.3 s ===== CPU 6 ===== Frequencies: 300 652 825 979 1132 1363 1536 1747 1843 1996 300: 1868 6.2 C/MHz 53 mW 8.5 J 35.2 I/mJ 160.6 s 652: 4073 6.2 C/MHz 96 mW 7.1 J 42.4 I/mJ 73.7 s 825: 5132 6.2 C/MHz 117 mW 6.9 J 43.7 I/mJ 58.5 s 979: 6099 6.2 C/MHz 151 mW 7.4 J 40.4 I/mJ 49.2 s 1132: 7071 6.2 C/MHz 207 mW 8.8 J 34.1 I/mJ 42.4 s 1363: 8482 6.2 C/MHz 235 mW 8.3 J 36.1 I/mJ 35.4 s 1536: 9578 6.2 C/MHz 287 mW 9.0 J 33.3 I/mJ 31.3 s 1747: 10892 6.2 C/MHz 340 mW 9.4 J 32.0 I/mJ 27.6 s 1843: 11471 6.2 C/MHz 368 mW 9.6 J 31.1 I/mJ 26.2 s 1996: 12425 6.2 C/MHz 438 mW 10.6 J 28.3 I/mJ 24.2 s Signed-off-by: Richard Acayan <mailingradian@gmail.com> Link: https://lore.kernel.org/r/20230802011548.387519-10-mailingradian@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-04arm64: dts: qcom: sdm670: add cpu frequency scalingRichard Acayan1-0/+149
Add CPU frequency scaling, and also add the corresponding memory and cache bandwidths for each frequency. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Link: https://lore.kernel.org/r/20230802011548.387519-9-mailingradian@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-04arm64: dts: qcom: sdm670: add osm l3Richard Acayan1-0/+10
Add the interconnect node for L3 cache on SDM670. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230802011548.387519-8-mailingradian@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-03arm64: dts: qcom: Use labels with generic node names for ADC channelsMarijn Suijten37-163/+231
As discussed in [1] it is more convenient to use a generic `channel` node name for ADC channels while storing a friendly - board-specific instead of PMIC-specific - name in the label, if/when desired to overwrite the channel description already contained (but previously unused) in the driver [2]. Follow up on the dt-bindings' `channel` node name requirement, and instead provide this (sometimes per-board) channel description through a label property. Also remove all the unused label references (not to be confused with label properties) from pm660, pmp8074 and pms405. [1]: https://lore.kernel.org/linux-arm-msm/20221106193018.270106-1-marijn.suijten@somainline.org/T/#u [2]: https://lore.kernel.org/linux-arm-msm/20230116220909.196926-4-marijn.suijten@somainline.org/ Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230730-generic-adc-channels-v5-2-e6c69bda8034@somainline.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-03arm64: dts: qcom: msm8953-daisy: use new speaker maxim,interleave-modeKrzysztof Kozlowski1-1/+1
MAX98927 speaker amplifier "interleave_mode" property was never documented. Corrected bindings expect "maxim,interleave-mode" instead, which is already supported by Linux driver. Change is not compatible with older Linux kernels. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230730202051.71099-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-03arm64: dts: qcom: sdm845-enchilada: use 0 as speaker DAI cellsKrzysztof Kozlowski1-2/+2
MAX98927 speaker amplifier has only one DAI, so DAI cells can be just 0 (as expected by bindings). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230730201913.70667-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-03arm64: dts: qcom: msm8953-tissot: use 0 as speaker DAI cellsKrzysztof Kozlowski1-1/+1
MAX98927 speaker amplifier has only one DAI, so DAI cells can be just 0 (as expected by bindings). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230730201913.70667-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-03arm64: dts: qcom: use defines for interruptsKrzysztof Kozlowski7-20/+20
Replace hard-coded interrupt parts (GIC, flags) with standard defines for readability. No changes in resulting DTBs. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230730180638.23539-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-03arm64: dts: qcom: sm8550-mtp: Add missing supply for L1B regulatorAbel Vesa1-0/+1
Even though currently there is no consumer for L1B, add the supply for it anyway. Fixes: 71342fb91eae ("arm64: dts: qcom: Add base SM8550 MTP dts") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230801095246.2884770-1-abel.vesa@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-01arm64: dts: qcom: Add base SM4450 QRD DTSTengfei Fan2-0/+19
Add DTS for Qualcomm QRD platform which uses SM4450 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20230731080043.38552-5-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-01arm64: dts: qcom: Adds base SM4450 DTSITengfei Fan1-0/+431
Add based DTSI for SM4450 SoC and includes base description of CPUs and interrupt-controller which helps to boot to shell with dcc console on boards with this SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20230731080043.38552-4-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-01dt-bindings: arm: qcom: Document SM4450 SoC and boardsTengfei Fan1-0/+6
Document the SM4450 SoC binding and also the boards using it. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20230731080043.38552-3-quic_tengfan@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-01arm64: dts: qcom: sm8550-qrd: add pmic glink port/endpointsNeil Armstrong1-2/+89
Add nodes to support Type-C USB/DP functionality. On this platform, a Type-C redriver is added to the SuperSpeed graph. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-type-c-v5-6-9221cd300903@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-01arm64: dts: qcom: sm8550-mtp: add pmic glink port/endpointsNeil Armstrong1-2/+57
Add nodes to support Type-C USB/DP functionality. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-type-c-v5-5-9221cd300903@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-01arm64: dts: qcom: sm8550: add ports subnodes in usb/dp qmpphy nodeNeil Armstrong1-0/+26
Add the USB3+DP Combo QMP PHY port subnodes in the SM8550 SoC DTSI to avoid duplication in the devices DTs. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-type-c-v5-4-9221cd300903@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-28arm64: dts: qcom: sm8150: Fix the I2C7 interruptZeyan Li1-1/+1
I2C6 and I2C7 use the same interrupts, which is incorrect. In the downstream kernel, I2C7 has interrupts of 608 instead of 607. Fixes: 81bee6953b58 ("arm64: dts: qcom: sm8150: add i2c nodes") Signed-off-by: Zeyan Li <qaz6750@outlook.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/SY7P282MB378712225CBCEA95FE71554DB201A@SY7P282MB3787.AUSP282.PROD.OUTLOOK.COM Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-28arm64: dts: qcom: msm8939-samsung-a7: Drop internal pull for SD CDStephan Gerhold1-1/+1
A7 seems to have external pull-up for the SD card chip detect (like most MSM8916/MSM8939 devices) so drop the internal pull-up. It's not necessary. Tested-by: "Lin, Meng-Bo" <linmengbo0689@protonmail.com> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20230723-a7sdc2cdnopull-v1-1-699fd730afcb@gerhold.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-28arm64: dts: qcom: Replace deprecated extcon-usb-gpio id-gpio/vbus-gpio ↵Alexander Stein19-21/+21
properties Use id-gpios and vbus-gpios instead. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> #rockchip Link: https://lore.kernel.org/r/20230724103914.1779027-7-alexander.stein@ew.tq-group.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sc8180x-pmics: align LPG node name with dtschemaKrzysztof Kozlowski1-1/+1
Bindings expect the LPG node name to be "pwm": sc8180x-lenovo-flex-5g.dtb: pmic@5: 'lpg' does not match any of the regexes: Fixes: d3302290f59e ("arm64: dts: qcom: sc8180x: Add pmics") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230720083500.73554-4-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sc8180x-pmics: align SPMI PMIC Power-on node name with ↵Krzysztof Kozlowski1-2/+2
dtschema Bindings expect the Power-on node name to be "pon": sc8180x-lenovo-flex-5g.dtb: pmic@0: 'power-on@800' does not match any of the regexes: Fixes: d3302290f59e ("arm64: dts: qcom: sc8180x: Add pmics") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230720083500.73554-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sc8180x-pmics: add missing gpio-rangesKrzysztof Kozlowski1-0/+2
The GPIO children of PMICs should use gpio-ranges: sc8180x-primus.dtb: pmic@0: gpio@c000: 'gpio-ranges' is a required property Fixes: d3302290f59e ("arm64: dts: qcom: sc8180x: Add pmics") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230720083500.73554-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sc8180x-pmics: add missing qcom,spmi-gpio fallbacksKrzysztof Kozlowski1-2/+2
The GPIO children of PMICs should use qcom,spmi-gpio fallback: sc8180x-primus.dtb: pmic@0: gpio@c000:compatible: ['qcom,pmc8180-gpio'] is too short Fixes: d3302290f59e ("arm64: dts: qcom: sc8180x: Add pmics") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230720083500.73554-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: msm8996-sagit: drop unsupported syna,codesKrzysztof Kozlowski1-1/+0
Synaptics RMI4 Touchscreen bindings never defined syna,codes property for function 1a. No usage in Linux drivers. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230720115335.137354-3-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: msm8996-gemini: fix touchscreen VIO supplyKrzysztof Kozlowski1-1/+1
According to bindings and Linux driver, there is no VDDA but VIO supply. Fixes: 4ac46b3682c5 ("arm64: dts: qcom: msm8996: xiaomi-gemini: Add support for Xiaomi Mi 5") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230720115335.137354-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: msm8953-vince: drop duplicated touschreen parent interruptKrzysztof Kozlowski1-1/+0
Interrupts extended already define a parent interrupt controller: msm8953-xiaomi-vince.dtb: touchscreen@20: Unevaluated properties are not allowed ('interrupts-parent' was unexpected) Fixes: aa17e707e04a ("arm64: dts: qcom: msm8953: Add device tree for Xiaomi Redmi 5 Plus") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230720115335.137354-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sa8775p-ride: enable pcie nodesMrinmay Sarkar1-0/+80
Enable pcie0, pcie1 nodes and their respective phy's. Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> Link: https://lore.kernel.org/r/1689960276-29266-5-git-send-email-quic_msarkar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sa8775p: Add pcie0 and pcie1 nodesMrinmay Sarkar1-2/+202
Add pcie dtsi nodes for two controllers found on sa8775p platform. Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> Link: https://lore.kernel.org/r/1689960276-29266-4-git-send-email-quic_msarkar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sc8180x: Fix LLCC reg propertyBjorn Andersson1-2/+5
The LLCC binding and driver was recently corrected to handle the stride varying between platforms. Switch to the new format to ensure accesses are done in the right place. Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Link: https://lore.kernel.org/r/20230612220632.1885175-1-quic_bjorande@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sc8180x-flex5g: Wire up USB Type-CBjorn Andersson1-0/+196
Following the SC8180X Primus reference design, add pmic_glink and USB Type-C wiring for battery manager, external display and orientation switching. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Link: https://lore.kernel.org/r/20230612221456.1887533-4-quic_bjorande@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sc8180x-primus: Wire up USB Type-CBjorn Andersson1-0/+196
Wire up pmic_glink and the various components of USB Type-C to get battery status, orientation switching of SuperSpeed USB, as well as support for external display on the SC8180X Primus reference device. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Link: https://lore.kernel.org/r/20230612221456.1887533-3-quic_bjorande@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: sc8180x: Add USB Type-C of_graph anchorsBjorn Andersson1-0/+48
Define anchors for wiring up the USB Type-C graph in the board files. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230612221456.1887533-2-quic_bjorande@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-22arm64: dts: qcom: ipq9574: Use assigned-clock-rates for QUP I2C core clksDevi Priya1-0/+8
Use assigned-clock-rates property for configuring the QUP I2C core clocks to operate at nominal frequency. Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> Link: https://lore.kernel.org/r/20230615084841.12375-1-quic_devipriy@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-24 14:41:09 +0300