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2021-10-20Merge tag 'arm-soc/for-5.16/devicetree' of ↵Arnd Bergmann56-182/+1816
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoCs Device Tree changes for 5.16, please pull the following: - Matthew provides a set of updates to the Northstar Plus Device Tree files to fix a number of warnings, and prepare the files to support the addition of the Cisco Meraki MX64/MX65 wireless controller devices and finally adds support for those boards. - Rafal continues to provide updates to the BCM5301X Device Tree files in order to fix warnings with the various node names, MDIO muxes and memory nodes. He also adds support for the external switches on the BCM53573 SoC and adds Tenda AC9 switch ports. - Christian provides the description of the Ethernet switch ports for the Cisco Meraki MR32 based on the 53016 SoC - Arinc adds support for the Asus RT-AC88U device based on the BCM4709 and featuring 8 Ethernet ports over the integrated and the external Realtek switch (not supported yet) - Stefan adds support for the Raspberry Pi Compute Module 4 IO board and does a number of preparatory changes to get there to the Device Tree files before doing the actual addition * tag 'arm-soc/for-5.16/devicetree' of https://github.com/Broadcom/stblinux: (31 commits) arm64: dts: broadcom: Add reference to RPi CM4 IO Board ARM: dts: Add Raspberry Pi Compute Module 4 IO Board ARM: dts: Add Raspberry Pi Compute Module 4 dt-bindings: arm: bcm2835: Add Raspberry Pi Compute Module 4 ARM: dts: bcm283x-rpi: Move Wifi/BT into separate dtsi dt-bindings: display: bcm2835: add optional property power-domains ARM: dts: BCM5301X: Add DT for Asus RT-AC88U ARM: BCM53016: MR32: get mac-address from nvmem ARM: BCM53016: Specify switch ports for Meraki MR32 ARM: dts: BCM53573: Add Tenda AC9 switch ports ARM: dts: BCM53573: Describe on-SoC BCM53125 rev 4 switch ARM: dts: BCM5301X: Specify switch ports for more devices ARM: dts: NSP: Fix MX65 MDIO mux warnings ARM: dts: NSP: Fix MX64/MX65 eeprom node name ARM: dts: NSP: Fix MDIO mux node names ARM: dts: NSP: Fix mpcore, mmc node names ARM: dts: NSP: Add bcm958623hr board name to dts ARM: dts: BCM5301X: Fix memory nodes names ARM: dts: BCM5301X: Fix MDIO mux binding ARM: dts: BCM5301X: Fix nodes names ... Link: https://lore.kernel.org/r/20211013174016.831348-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'samsung-dt64-5.16' of ↵Arnd Bergmann7-9/+1562
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.16 1. Match Exynos5433 DTS with dtschema. 2. Add an Exynos Auto v9 SoC and SADK board. The Exynos Auto v9 is a design for automotive for In-vehicle Infotainments (IVI) and Advanced Driver-Assistance Systems (ADAS). This pull request brings very basic support (pinctrl, UART and UFS storage) with a development SADK (Samsung Automotive Development Kit) board. * tag 'samsung-dt64-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: add minimal support for exynosautov9 sadk board arm64: dts: exynos: add initial support for exynosautov9 SoC arm64: dts: exynos: add proper comaptible FSYS syscon in Exynos5433 arm64: dts: exynos: align operating-points table name with dtschema in Exynos5433 Link: https://lore.kernel.org/r/20211013162418.43072-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'samsung-dt-5.16' of ↵Arnd Bergmann4-23/+19
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM changes for v5.16 Minor cleanups - from undocumented or unused properties, coding style. * tag 'samsung-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: use spaces instead of tabs around '=' ARM: dts: exynos: remove unneeded DVS voltages from PMIC on Arndale ARM: dts: exynos: drop undocumented samsung,sata-freq property in Exynos5250 Link: https://lore.kernel.org/r/20211013162418.43072-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'qcom-arm64-for-5.16' of ↵Arnd Bergmann47-372/+6769
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 dts updates for v5.16 MSM8916 gained some DT cleanup fixes. The Dragonboard 410c gains updated firmware paths to the device specific firmware for modem and WiFi, to allow these to be pushed to linux-next. The Longcheer L8150 gains extcon support and the interrupt configuration for the accelerometer and magnetometer are corrected. MSM8998 gained descriptions for the multimedia clock controller and iommu, as well as the GPU and its dedicated IOMMU. The QFPROM node is updated to access the CRC corrected value space, the white LED (for backlight) found in PMI8998 is described and GCC gains references to the missing XO and sleep_clk reference clocks. On top of this initial support for the Fxtec Pro1 QX1000 is added and then the Sony Xperia XZ1, Xperia XZ1 Compact and the Xperia XZ Premium, with USB, touchscreen, SDHCI, Bluetooth and vibrator supported. The Xiaomi Mi 5 and Xiaomi Mi Note 2, based on the MSM8996 platform was added, with support for frame buffer, GPU, audio, video encoder/decoder and touchscreen. The USB controller and PHY found in IPA6018 is described to provide USB support. IPQ8074 gains a description of the SPMI controller. The highlight on SC7180 is the introduction of the just released "Homestar" device. CPU power coefficients are corrected based on measurements, IMEM is described to ensure that remoteproc relocation information is carried to post mortem debug tools and a few smaller fixes are introduced. The SC7280 gains QSPI, low speed (i2c/spi/uart), GPU, thermal zones, modem, CPU topology and updated memory map. On SDM845 the "Limits hardware" is described and increases the throttling temperature of the hardware from ~70C to 95C, with up to 30% improvement in benchmarks as result. Relying on hardware throttling and thermal pressure, the CPU cooling devices are dropped. The power for the second WiFi channel is properly described for the Lenovo Yoga C630, to ensure they are both powered. reboot-modes are defined for the PM660 PMIC, found in SDM630 and SDM660. Initial support for the Snapdragon 690 (aka SM6350) is introduced, with support for clocks, regulators, pinctrl, storage, thermal sensors, USB, SMMU and CPUfreq. On top of this support for the Sony Xperia 10 III is introduced. * tag 'qcom-arm64-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (99 commits) arm64: dts: qcom: sdm630-nile: Correct regulator label name arm64: dts: qcom: sm6125: Improve indentation of multiline properties arm64: dts: qcom: msm8916-longcheer-l8150: Use &pm8916_usbin extcon arm64: dts: qcom: pm8916: Add pm8941-misc extcon for USB detection arm64: dts: qcom: pm8916: Remove wrong reg-names for rtc@6000 arm64: dts: qcom: sc7280: Update Q6V5 MSS node arm64: dts: qcom: sc7280: Add Q6V5 MSS node arm64: dts: qcom: sc7280: Add nodes to boot modem arm64: dts: qcom: sc7280: Add/Delete/Update reserved memory nodes arm64: dts: qcom: sc7280: Update reserved memory map arm64: dts: qcom: msm8998-fxtec-pro1: Add tlmm keyboard keys arm64: dts: qcom: msm8998-fxtec-pro1: Add Goodix GT9286 touchscreen arm64: dts: qcom: msm8998-fxtec-pro1: Add physical keyboard leds arm64: dts: qcom: Add support for MSM8998 F(x)tec Pro1 QX1000 arm64: dts: qcom: msm8916: Fix Secondary MI2S bit clock arm64: dts: qcom: msm8916-longcheer-l8150: Add missing sensor interrupts arm64: dts: qcom: sc7180: Add IMEM and pil info regions arm64: dts: qcom: pm6150l: Add missing include arm64: dts: qcom: sm6350: Add device tree for Sony Xperia 10 III arm64: dts: qcom: sm6350: Add apps_smmu and assign iommus prop to USB1 ... Link: https://lore.kernel.org/r/20211012231155.1036519-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'qcom-dts-for-5.16' of ↵Arnd Bergmann12-22/+554
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm DTS updates for v5.16 This extends the previous limited description of MSM8226 with SDHC, UART, I2C, SCM, SMEM, RPM and basic PMIC definitions. Based on this, initial support for the LG G Watch R smartwatch is introduced. APQ8064 gets a couple of DT updates, one which will allow the GPU driver to drop supporting legacy "opp tables" in the future. DT bindings and DTS files are updated with additional compatibles, for completeness. * tag 'qcom-dts-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: dt-bindings: arm: qcom, add missing devices ARM: dts: qcom: msm8974: Add xo_board reference clock to DSI0 PHY ARM: dts: qcom: fill secondary compatible for multiple boards ARM: dts: qcom: apq8064: adjust memory node according to specs ARM: dts: qcom: apq8064: Convert adreno from legacy gpu-pwrlevels to opp-v2 ARM: dts: qcom: Add support for LG G Watch R dt-bindings: arm: qcom: Document APQ8026 SoC binding ARM: dts: qcom: Add pm8226 PMIC ARM: dts: qcom: msm8226: Add more SoC bits dt-bindings: arm: qcom: Document SDX65 platform and boards Link: https://lore.kernel.org/r/20211012174310.1017857-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-19Merge tag 'v5.15-next-dts64' of ↵Arnd Bergmann35-123/+640
git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt Biggest change is, that we have now support for a reset controller inside the mmsys. This goes inhand with changes to the driver, that you will find in the soc pull request. Mediatek PCI device tree binding described the root port in a wrong. The IP actaully implements several root complex with everyone having a single root port. We need to fix the DT in an incompatible way to describe the HW as it is. This also fixes a problem that no IRQ bigger then 32 could be handled. The only public available HW that is affected by this is the BananaPi R64. I'm not aware that there is a big user base using the upstream kernel. In this boards PCI is only used for extension cards, so I don't expect any boot problems. - mt8173: add reset for dsi0 to mmsys - move dt-bindings reset controller includes to correct folder - split PCIe node to use new format for mt2712 and mt7622 - mt8183: add audio node to chromebook devices - mt8192: add clock controller node * tag 'v5.15-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0 arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0 dt-bindings: display: mediatek: add dsi reset optional property dt-bindings: mediatek: Add #reset-cells to mmsys system controller arm64: dts: mediatek: Move reset controller constants into common location arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622 arm64: dts: mt8183: add kukui platform audio node arm64: dts: mt8183: add audio node arm64: dts: mediatek: Add mt8192 clock controllers Link: https://lore.kernel.org/r/1a3d63a3-c020-3319-26f6-a2ec338cc42e@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-18arm64: dts: rockchip: fix resets in tsadc node for rk356xJohan Jonker1-2/+1
In the rockchip_thermal.c driver we now get the resets with a devm_reset_control_array_get() function, so remove the reset-names property as it is no longer needed. Although no longer required in rockchip-thermal.yaml sort tsadc-apb as first item. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210930110517.14323-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-17arm64: dts: rockchip: Add analog audio on Quartz64Nicolas Frattaroli1-3/+32
On the Quartz64 Model A, the I2S1 TDM controller is connected to the rk817 codec in I2S mode. Enabling it and adding the necessary simple-sound-card and codec nodes allows for analog audio output on the PINE64 Quartz64 Model A SBC. Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20211016105354.116513-5-frattaroli.nicolas@gmail.com [some property sorting] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-17arm64: dts: rockchip: Add i2s1 on rk356xNicolas Frattaroli1-0/+25
This adds the necessary device tree node on rk3566 and rk3568 to enable the I2S1 TDM audio controller. I2S0 has not been added, as it is connected to HDMI and there is no way to test that it's working without a functioning video clock (read: VOP2 driver). Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20211016105354.116513-4-frattaroli.nicolas@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-17arm64: dts: rockchip: change gpio nodenamesJohan Jonker5-22/+22
Currently all gpio nodenames are sort of identical to there label. Nodenames should be of a generic type, so change them all. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20211007144019.7461-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-17ARM: dts: rockchip: change gpio nodenamesJohan Jonker6-30/+30
Currently all gpio nodenames are sort of identical to there label. Nodenames should be of a generic type, so change them all. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20211007144019.7461-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-16arm64: dts: rockchip: add 'chassis-type' propertyArnaud Ferraris4-0/+5
A new 'chassis-type' root node property has recently been approved for the device-tree specification, in order to provide a simple way for userspace to detect the device form factor and adjust their behavior accordingly. This patch fills in this property for end-user devices (such as laptops, smartphones and tablets) based on Rockchip ARM64 processors. Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com> Link: https://lore.kernel.org/r/20211016102025.23346-5-arnaud.ferraris@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-16arm64: dts: rockchip: add powerdomains to rk3368Heiko Stuebner1-0/+178
Add the core io-domain node for rk3368. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20210925090405.2601792-3-heiko@sntech.de
2021-10-16dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yamlHeiko Stuebner1-0/+2
Add the compatible for the pmu mfd on rk3368. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210925090405.2601792-1-heiko@sntech.de
2021-10-16arm64: dts: rockchip: enable spdif on Quartz64 ANicolas Frattaroli1-0/+22
Add the necessary nodes to enable the spdif output on the RK3566-Quartz-A board. Co-developed-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20211015111303.1365328-2-frattaroli.nicolas@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-16arm64: dts: rockchip: add spdif node to rk356xPeter Geis1-0/+14
This adds the spdif node to the rk356x device tree. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20211015111303.1365328-1-frattaroli.nicolas@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-16arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD cardFrieder Schrempf2-1/+29
In order to use ultra high speed modes (UHS) on the SD card slot, we add matching pinctrls and fix the voltage switching for LDO5 of the PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-16arm64: dts: visconti: Add DTS for the VisROBO boardYuji Ishikawa3-0/+106
This board consists of two boards: the SoM board (VRC SoM) with the SoC on board, and the board for I/O (VRB). The functions of each board supported by this update are as follows: - VRC SoM - WDT - GPIO - SDCard (SPI-MMC mode) - I2C x1 - VRB board - VRC SoM - UART x2 - Ethernet phy Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> Link: https://lore.kernel.org/r/20211014092703.15251-4-yuji2.ishikawa@toshiba.co.jp Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
2021-10-16dt-bindings: arm: toshiba: Add the TMPV7708 VisROBO VRB boardYuji Ishikawa1-0/+1
Add an entry for the Toshiba Visconti TMPV7708 VisROBO VRB board (tmpv7708-visrobo-vrb) to the board/SoC bindings. Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> Link: https://lore.kernel.org/r/20211014092703.15251-3-yuji2.ishikawa@toshiba.co.jp Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
2021-10-16arm64: dts: visconti: Add 150MHz fixed clock to TMPV7708 SoCYuji Ishikawa1-0/+7
This clock source is referred by baudrate generators of SPI and I2C devices. Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> Link: https://lore.kernel.org/r/20211014092703.15251-2-yuji2.ishikawa@toshiba.co.jp Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
2021-10-16arm64: dts: visconti: Add PCIe host controller support for TMPV7708 SoCNobuhiro Iwamatsu2-0/+58
Add PCIe node and fixed clock for PCIe in TMPV7708's dtsi, and tmpv7708-rm-mbrc boards's dts. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Link: https://lore.kernel.org/r/20210907042500.1525771-1-nobuhiro1.iwamatsu@toshiba.co.jp
2021-10-15ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151Amelie Delaunay1-1/+1
Referring to the note under USBH reset and clocks chapter of RM0436, "In order to access USBH_OHCI registers it is necessary to activate the USB clocks by enabling the PLL controlled by USBPHYC" (ck_usbo_48m). The point is, when USBPHYC PLL is not enabled, OHCI register access freezes the resume from STANDBY. It is the case when dual USBH is enabled, instead of OTG + single USBH. When OTG is probed, as ck_usbo_48m is USBO clock parent, then USBPHYC PLL is enabled and OHCI register access is OK. This patch adds ck_usbo_48m (provided by USBPHYC PLL) as clock of USBH OHCI, thus USBPHYC PLL will be enabled and OHCI register access will be OK. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-10-15ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15Olivier Moysan1-4/+4
Fix SAI2A and SAI2B pin muxings for AV96 board on STM32MP15. Change sai2a-4 & sai2a-5 to sai2a-2 & sai2a-2. Change sai2a-4 & sai2a-sleep-5 to sai2b-2 & sai2b-sleep-2 Fixes: dcf185ca8175 ("ARM: dts: stm32: Add alternate pinmux for SAI2 pins on stm32mp15") Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-10-15ARM: dts: stm32: fix SAI sub nodes register rangeOlivier Moysan1-8/+8
The STM32 SAI subblocks registers offsets are in the range 0x0004 (SAIx_CR1) to 0x0020 (SAIx_DR). The corresponding range length is 0x20 instead of 0x1c. Change reg property accordingly. Fixes: 5afd65c3a060 ("ARM: dts: stm32: add sai support on stm32mp157c") Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-10-15ARM: dts: stm32: fix STUSB1600 Type-C irq level on stm32mp15xx-dkxFabrice Gasnier1-1/+1
STUSB1600 IRQ (Alert pin) is active low (open drain). Interrupts may get lost currently, so fix the IRQ type. Fixes: 83686162c0eb ("ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-10-15ARM: dts: stm32: set the DCMI pins on stm32mp157c-odysseyGrzegorz Szymaszek1-0/+6
The Seeed Odyssey-STM32MP157C board has a 20-pin DVP camera output. The DCMI pins used on this output are defined in the pin state definition &pinctrl/dcmi-1, AKA &dcmi_pins_b (added in mainline commit 02814a41529a55dbfb9fbb2a3728e78e70646ea6). Set these pins as the default pinctrl of the DCMI peripheral in the board device tree. The pins are not used for any other purpose, so it seems safe to assume most users will not need to override (delete) what this patch provides. status defaults to "disabled", so the peripheral will not be unnecessarily started. And the users who actually intend to make use of a camera on the DVP port will have this little part of the configuration ready. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-10-15ARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHzMarek Vasut1-1/+1
The SPI NOR is a bit further away from the SoC on DHCOR than on DHCOM, which causes additional signal delay. At 108 MHz, this delay triggers a sporadic issue where the first bit of RX data is not received by the QSPI controller. There are two options of addressing this problem, either by using the DLYB block to compensate the extra delay, or by reducing the QSPI bus clock frequency. The former requires calibration and that is overly complex, so opt for the second option. Fixes: 76045bc457104 ("ARM: dts: stm32: Add QSPI NOR on AV96") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-10-15ARM: dts: stm32: add initial support of stm32mp135f-dk boardAlexandre Torgue3-0/+121
Add support of stm32mp135f discovery board (part number: STM32MP135F-DK). It embeds a STM32MP135F SOC with 512 MB of DDR3. Several connections are available on this board: 4*USB2.0, 1*USB2.0 typeC DRD, SDcard, 2*RJ45, HDMI, Combo Wifi/BT, ... Only SD card, uart4 (console) and watchdog IPs are enabled in this commit. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2021-10-15dt-bindings: stm32: document stm32mp135f-dk boardAlexandre Torgue1-0/+4
Add new entry for stm32mp135f-dk board. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Rob Herring <robh@kernel.org>
2021-10-15ARM: dts: stm32: add STM32MP13 SoCs supportAlexandre Torgue5-0/+366
Add initial support of STM32MP13 family. The STM32MP13 SoC diversity is composed by: -STM32MP131: -core: 1*CA7, 17*TIMERS, 5*LPTIMERS, DMA/MDMA/DMAMUX -storage: 3*SDMCC, 1*QSPI, FMC -com: USB (OHCI/EHCI, OTG), 5*I2C, 5*SPI/I2S, 8*U(S)ART -audio: 2*SAI -network: 1*ETH(GMAC) -STM32MP133: STM32MP131 + 2*CAN, ETH2(GMAC), ADC1 -STM32MP135: STM32MP133 + DCMIPP, LTDC A second diversity layer exists for security features: -STM32MP13xY, "Y" gives information: -Y = A/D means no cryp IP and no secure boot. -Y = C/F means cryp IP + secure boot. This commit adds basic peripheral. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2021-10-15dt-bindings: interconnect: sunxi: Add R40 MBUS compatibleMaxime Ripard1-0/+1
The R40 MBUS compatible was introduced recently but it was never documented. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20210901091852.479202-26-maxime@cerno.tech
2021-10-15mailmap: Fix text encoding for Niklas SöderlundNiklas Söderlund1-0/+1
There are commits that mess up the encoding of 'ö' in Söderlund, add a correct entry to .mailmap. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20211014212906.2331293-1-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-15ARM: dts: ls1021a-tsn: use generic "jedec,spi-nor" compatible for flashLi Yang1-1/+1
We cannot list all the possible chips used in different board revisions, just use the generic "jedec,spi-nor" compatible instead. This also fixes dtbs_check error: ['jedec,spi-nor', 's25fl256s1', 's25fl512s'] is too long Signed-off-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: move thermal-zones node out of soc/Li Yang1-33/+33
This fixes dtbs-check error from simple-bus schema: soc: thermal-zones: {'type': 'object'} is not allowed for {'cpu-thermal': ..... } From schema: /home/leo/.local/lib/python3.8/site-packages/dtschema/schemas/simple-bus.yaml Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a-tsn: remove undocumented property "position" from mma8452 nodeLi Yang1-1/+0
Property "postion" is not documented in the mma8452 binding. Remove it to resolve the error in "make dtbs_check" Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a-qds: change fpga to simple-mfd deviceLi Yang1-1/+1
The FPGA is not really a bus but more like an MFD device. Change the compatible string from "simple-bus" to "simple-mfd". This also fix a node name issue with simple-bus schema. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: add #power-domain-cells for power-controller nodeLi Yang1-0/+1
Add the #power-domain-cells for power-controller node as required by the schema. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: add #dma-cells to qdma nodeLi Yang1-0/+1
Add the #dma-cells to align with the dma schema. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: fix memory node for schema checkLi Yang1-1/+1
Fix the following error from "make dtbs_check" memory: False schema does not allow ... Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: remove regulators simple-busLi Yang2-26/+12
There is no regulator bus in hardware. So move the regulator nodes out and remove the regulators simple-bus. This also make the dts align with the simple-bus schema. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: disable ifc node by defaultLi Yang2-3/+4
Disable the bus in the SoC dtsi file to be enabled only in board dts files. Also breakup long values in the ifc node to fix dtbs_check. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: breakup long values in thermal nodeLi Yang1-36/+36
Breakup long values to pass the schema check. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: fix board compatible to follow binding schemaLi Yang2-1/+1
Align the compatible strings with the board binding defined in schema file. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: update pcie nodes for dt-schema checkLi Yang1-8/+8
Break up long values to pass dt-schema checks. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a-qds: Add node for QSPI flashLi Yang1-0/+14
Add the missing node for qspi flash. Signed-off-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: change to use SPDX identifiersLi Yang3-129/+3
Replace the license text with SPDX identifiers. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: change dma channels order to match schemaLi Yang1-6/+6
Although the ordering of DMA channels was not relevant in the txt binding, it is defined as ordered in the converted yaml schema. Update the dts to match the order. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: ls1021a: remove clock-names property for i2c nodesLi Yang1-3/+0
The property is optional and not used in matching the clock in driver. Remove it to avoid dtbs_check issues. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15dt-bindings: arm: fsl: add ls1021a-tsn boardLi Yang1-0/+1
Add the missing board in the binding docuemnt. Signed-off-by: Li Yang <leoyang.li@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-15ARM: dts: imx6dl-prtrvt: drop undocumented TRF7970A NFC propertiesKrzysztof Kozlowski1-2/+0
Neither the bindings nor the device driver use/document "vin-voltage-override" and "t5t-rmb-extra-byte-quirk" properties. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-30 15:07:43 +0300