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2018-05-18drm/nouveau/gr/gf100-: virtualise init_fecs_exceptions + apply fixes from tracesBen Skeggs17-7/+47
The value for GF100 has changed here, but it matches RM now. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100: write 0x400124 during initBen Skeggs2-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_swdx_pes_maskBen Skeggs4-5/+7
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: implement another chunk of bios-provided initBen Skeggs3-0/+31
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_rop_active_fbpsBen Skeggs1-0/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_num_active_ltcsBen Skeggs17-33/+38
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_zcullBen Skeggs19-178/+85
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_vsc_stream_masterBen Skeggs17-6/+39
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_biosBen Skeggs4-4/+9
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: support clkgate_pack everywhereBen Skeggs1-0/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise r405a14Ben Skeggs3-0/+11
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: support firmware-provided sw_nonctx everywhereBen Skeggs1-1/+4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_gpc_mmu + apply fixes from tracesBen Skeggs2-7/+16
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gp100-: force individual channels into a channel groupBen Skeggs5-11/+57
RM does this for some reason, and is enforced in HW on Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gm107-: write instance address in channel runlist entryBen Skeggs6-5/+24
RM does this for some reason. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gk208-: write pbdma timeout regs during initialisationBen Skeggs9-0/+24
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gk110-: support writing channel group runlist entriesBen Skeggs12-11/+71
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gk104-: poll for runlist update completionBen Skeggs1-4/+4
Newer HW doesn't appear to send this event, which will cause long delays in runlist updates if they don't complete immediately. RM doesn't use these events anywhere, and an NVGPU commit message notes that polling is the preferred method even on HW that supports the event. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gk104-: add interfaces to support different runlist layoutsBen Skeggs10-14/+44
This will be required to support features on newer hardware. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gk104-: simplify definition of channel classesBen Skeggs18-171/+71
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gk104-: require explicit runlist selection for channel ↵Ben Skeggs5-105/+43
allocation We didn't used to be aware that runlist/engine IDs weren't the same thing, or that there was such variability in configuration between GPUs. By exposing this information to a client, and giving it explicit control of which runlist it's allocating a channel on, we're able to make better choices. The immediate effect of this is that on GPUs where CE0 is the "GRCE", we will now be allocating a copy engine running asynchronously to GR for BO migrations - as intended. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gk104-: support querying engines available on each runlistBen Skeggs9-0/+166
Will be used to improve channel runlist selection. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gk104-: allow fault recovery code to be called by other subdevsBen Skeggs14-101/+141
This will be required to support Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo/gk104-: accept engine contexts for CE3 and upBen Skeggs1-3/+2
These can exist on GP100 and newer. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fifo: support channel count queryBen Skeggs15-24/+64
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/device: support querying available engines of a specific typeBen Skeggs2-0/+44
Will be used for fifo runlist selection. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/device: implement a generic method to query device-specific ↵Ben Skeggs6-1/+88
properties We have a need to fetch data from GPU-specific sub-devices that is not tied to any particular engine object. This commit provides the framework to support such queries. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: pass nvkm_memory objects for channel push buffersBen Skeggs8-44/+55
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: add channel interfaces to control error interruptsBen Skeggs11-39/+35
This will be required to support Volta, but also allows us to remove code that's duplicated for each channel type already. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: add channel interfaces to determine the user areaBen Skeggs10-11/+26
This will be required to support Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: merge handling of pio and dma channelsBen Skeggs38-284/+183
Unnecessarily complicated, and a barrier to cleanly supporting Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: simplify definiton of core channelsBen Skeggs29-428/+91
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: simplify definition of cursor channelsBen Skeggs21-249/+51
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: simplify definition of base channelsBen Skeggs24-248/+67
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: simplify definition of overlay immediate channelsBen Skeggs21-183/+52
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: simplify definition of overlay channelsBen Skeggs23-158/+154
Introduces a new method of defining channels available from the display, common to all channel types, allowing for more flexibility in available channel types/counts, and reducing the amount of boiler-plate required. This will be required to support Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: replace user object with engine pointer in channelsBen Skeggs15-41/+39
More simplification. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: initialise from the engine, rather than the user objectBen Skeggs33-243/+247
Engines are initialised on an as-needed basis, so this results in the same behaviour, whilst allowing us to simplify things a bit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: fetch mask of available piors during oneinitBen Skeggs11-21/+29
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: fetch mask of available sors during oneinitBen Skeggs28-53/+65
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: fetch mask of available dacs during oneinitBen Skeggs18-31/+44
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: fetch mask of available heads during oneinitBen Skeggs18-45/+56
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: delay subunit construction until oneinitBen Skeggs4-26/+51
We should be reading registers to determine which subunits are really present on a given board, and this needs to be done after DEVINIT. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fb/gm200-: fix overwriting of big page settingBen Skeggs1-2/+0
Likely a rebase bug. Should have no impact in default configuration due to using per-instance setting by default. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fb/gf100-: bump size of mmu debug buffers to match big page sizeBen Skeggs2-3/+3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fault/gp100: implement replayable fault buffer initialisationBen Skeggs4-0/+79
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/fault: add infrastructure to support fault buffersBen Skeggs4-0/+220
GPU-specific support will be added separately. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/mc/gp100-: route fault buffer interrupts to FAULTBen Skeggs3-2/+22
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/core: define FAULT subdevBen Skeggs7-0/+16
This will be responsible for the handling of MMU fault buffers on GPUs that support them. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/secboot: remove VLA usageGustavo A. R. Silva1-4/+3
In preparation to enabling -Wvla, remove VLA. In this particular case directly use macro NVKM_MSGQUEUE_CMDLINE_SIZE instead of local variable cmdline_size. Also, remove cmdline_size as it is not actually useful anymore. The use of stack Variable Length Arrays needs to be avoided, as they can be a vector for stack exhaustion, which can be both a runtime bug or a security flaw. Also, in general, as code evolves it is easy to lose track of how big a VLA can get. Thus, we can end up having runtime failures that are hard to debug. Also, fixed as part of the directive to remove all VLAs from the kernel: https://lkml.org/lkml/2018/3/7/621 Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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