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2013-11-01drm/radeon/si: fix define for MC_SEQ_TRAIN_WAKEUP_CNTLAlex Deucher1-1/+1
Typo in the register offset. Noticed-by: Sylvain BERTRAND <sylware@legeek.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-11-01drm/radeon: fix endian handling in rlc buffer setupAlex Deucher3-54/+56
The buffers needs to be in little endian format. Noticed-by: Sylvain BERTRAND <sylware@legeek.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/dpm: retain user selected performance level across state changesAlex Deucher1-4/+8
If the user has forced the state high or low, retain that preference even when we switch power states. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=70654 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: disable force performance state when thermal state is activeAlex Deucher1-2/+6
If the thermal state is active, we are in the lowest performance level to cool down the chip. Don't let the user force it higher. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: enable DPM by default on r7xx asicsAlex Deucher1-4/+4
Seems to be stable on them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: enable DPM by default on evergreen asicsAlex Deucher1-5/+5
Seems to be stable on them. There are still some issues with the performance states staying in the highest levels on certain cards when multiple monitors are attached, but being that the the cards are always in their highest power state at boot up anyway, this doesn't really change anything and improves things in all other cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: enable DPM by default on BTC asicsAlex Deucher1-3/+3
Seems to be stable on them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: enable DPM by default on SI asicsAlex Deucher1-5/+5
Seems to be stable on them and improves peformance as most SI asics have very low boot clocks. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: enable DPM by default on SUMO/PALM APUsAlex Deucher1-3/+15
DPM seems to be stable on these asics and it drastically improves performance depending on the boot clocks. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/dpm: only print dpm debugging messages when radeon_dpm=1Alex Deucher1-6/+8
Avoids spamming the system log for chips where dpm is enabled by default, but prints then messages when users force it on for other asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: Implement radeon_pci_shutdownMarkus Trippelsdorf1-0/+10
Currently radeon devices are not properly shutdown during kexec. This causes a varity of issues, e.g. dpm initialization failures. Fix this by implementing a radeon_pci_shutdown function, that unloads the driver cleanly. Signed-off-by: Markus Trippelsdorf <markus@trippelsdorf.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/audio: write audio/video latency info for DCE6/8Alex Deucher3-0/+91
Needed by the hda driver to properly set up synchronization on the audio side. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2013-11-01drm/radeon/audio: write audio/video latency info for DCE4/5Alex Deucher2-0/+75
Needed by the hda driver to properly set up synchronization on the audio side. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2013-11-01drm/radeon/audio: break out of loops once we match connectorAlex Deucher2-4/+12
No need to continue with the loops once we've matched the appropriate connector. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE4.xAlex Deucher1-6/+1
The plain [EN|DIS]ABLE functions do the same thing and more and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE3.xAlex Deucher1-8/+0
The plain [EN|DIS]ABLE functions do the same thing and more and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/si: tell dpm there is a display connectedAlex Deucher1-1/+6
On SI asics, the SMC will automatically force the performance level to the lowest level if there are no displays active. This prevents automatic performance scaling on PowerXpress systems or for offscreen rendering or compute when displays are disabled. Going forward, it would be best to dynamically change this, but for now leave scaling enabled. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=69395 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: implement blit copy callback for CIKAlex Deucher3-0/+145
Uses the CP ring rather than the DMA ring. Useful for debugging and benchmarking. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/dpm: cleanup a type issue with rv6xx_clocks_per_unit()Dan Carpenter1-3/+3
The rv6xx_clocks_per_unit() function pretends it can set flags in a u64 bitfield but really because "1" is an int it doesn't work for more than 32 bits. The only caller truncates the high bits away anyway. I've just changed it to be a u32. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: plug in blit copy routine for SIAlex Deucher1-1/+1
Uses CP DMA packet just like previous asics. Useful for debugging and benchmarking. Uses same packet format as prior asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: enable hdmi audio by defaultAlex Deucher1-4/+4
Seems to be stable enough for the majority of users. It can be disabled on the fly via connector attributes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: add runtime PM support (v2)Dave Airlie10-36/+299
This hooks radeon up to the runtime PM system to enable dynamic power management for secondary GPUs in switchable and powerxpress laptops. v2: agd5f: clean up, add module parameter Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: convert to pmopsDave Airlie3-30/+49
This is a pre-requisite for runtime pm on powerxpress systems. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: add a connector property for ditherAlex Deucher7-17/+82
Allows you to enable dither in the display hardware when the monitor supports lower a lower bpc than the current framebuffer format. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: Add support for programming the FMT blocksAlex Deucher9-0/+333
The FMT blocks control how data is sent from the backend of the display pipe to to monitor. Proper set up of the FMT blocks are required for 30bpp formats. Additionally, dithering can be enabled on for better display with 18 and 24bpp displays. The exception is LVDS/eDP which atom takes care of in the SelectCRTC_Source table. For now just enable truncation until we test dithering more. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-10-31drm/tegra: Reserve syncpoint base for gr3dThierry Reding1-1/+2
Request a syncpoint base to be associated with the gr3d syncpoint. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Reserve base for gr2dArto Merilainen1-1/+2
This patch modifies the gr2d to reserve a base for syncpoint. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Deliver syncpoint base to user spaceArto Merilainen2-9/+46
This patch adds a separate ioctl for delivering syncpoint base number to user space. If the syncpoint does not have an associated base, the function returns -ENXIO. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Add syncpoint base supportArto Merilainen6-2/+92
This patch adds support for hardware syncpoint bases. This creates a simple mechanism to stall the command FIFO until an operation is completed. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Add 'flags' field to syncpt requestArto Merilainen3-9/+15
Functions host1x_syncpt_request() and _host1x_syncpt_alloc() have been taking a separate boolean flag ('client_managed') for indicating if the syncpoint value should be tracked by the host1x driver. This patch converts the field into generic 'flags' field so that we can easily add more information while requesting a syncpoint. Clients are adapted to use the new interface accordingly. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Disable clock on probe failureWei Yongjun1-0/+1
Add a missing clk_disable_unprepare() before returning from the driver's .probe() function on error. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Disable clock on probe failureWei Yongjun1-1/+3
Add a missing clk_disable_unprepare() before returning from the driver's .probe() function on error. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Support bottom-up buffer objectsThierry Reding7-2/+44
The gr3d engine renders images bottom-up. Allow buffers that are used for 3D content to be marked as such and implement support in the display controller to present them properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Add support for tiled buffer objectsThierry Reding8-9/+60
The gr2d and gr3d engines work more efficiently on buffers with a tiled memory layout. Allow created buffers to be marked as tiled so that the display controller can scan them out properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Add 3D supportThierry Reding6-1/+378
Initialize and power the 3D unit on Tegra20, Tegra30 and Tegra114 and register a channel with the Tegra DRM driver so that the unit can be used from userspace. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Introduce tegra_drm_submit()Thierry Reding3-130/+136
Command stream submissions are the same across all devices that expose a channel to userspace, so move the code into a generic function. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Use symbolic names for gr2d registersThierry Reding2-4/+42
Instead of using magic numbers for the registers which contain memory addresses in the firewall table, using symbolic names. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Start connectors with correct DPMS modeThierry Reding1-0/+1
A connector's DPMS mode isn't initialized by default, therefore using a default of 0 (DRM_MODE_DPMS_ON). This can cause problems in that the DRM core won't explicitly turn on a connector because it thinks that it is already on. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Enable VDD earlier for hotplug/DDCMikko Perttunen1-7/+9
The VDD regulator used to be enabled only at tegra_output_hdmi_enable, which is called after a sink is detected. However, the HDMI hotplug pin works by returning the voltage supplied by the VDD pin, so this meant that the hotplug pin was never asserted and the sink was not detected unless the VDD regulator was set to be always on. This patch moves the enable to the tegra_hdmi_init() function to make sure the regulator will get enabled and therefore ensure proper hotplug detection. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Fix build warningsThierry Reding1-2/+2
These seem to show up when building for architectures other than ARM, which I guess will never happen. The reason why the kbuild test bot ran into these was a missing dependency which has hence been fixed. Still it doesn't hurt to fix them anyway. Reported-by: kbuild test bot <fengguang.wu@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Detect DVI-only displaysMikko Perttunen1-0/+14
Use EDID data to determine whether the display supports HDMI or DVI only. The HDMI output used to assume to be connected to HDMI displays, but that broke support for DVI displays that don't understand the interspersed audio/other data. To be on the safe side, default to DVI if no EDID data is available. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> [treding@nvidia.com: move detection to separate function] Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Add Tegra114 HDMI supportMikko Perttunen3-0/+250
Tegra114 TMDS configuration requires a new peak_current field and the driver current override bit has changed position. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Parameterize based on compatible propertyThierry Reding2-30/+53
Use a structure to parameterize the code to handle differences between the HDMI hardware on various SoC generations. This removes the need to clutter the code with checks for individual compatible values. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30}Thierry Reding1-6/+6
Everything related to Tegra uses Tegra20 and Tegra30 instead of Tegra2 and Tegra3, respectively. Rename the TMDS arrays in the HDMI driver for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Add support for Tegra114Thierry Reding7-1/+620
Tegra114 uses a slightly updated version of host1x with an additional syncpoint. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Allocate resources at probe timeThierry Reding5-27/+56
Since the .init() and .exit() functions are executed whenever the DRM driver is loaded or unloaded, care must be taken not to use them for resource allocation. Otherwise deferred probing cannot be used, since the .init() and .exit() are not run at probe time. Similarly the code that frees resources must be run at .remove() time. If it is run from the .exit() function, it can release resources multiple times. To handle this more consistently, rename the tegra_output_parse_dt() function to tegra_output_probe() and introduce tegra_output_remove() which can be used to free output-related resources. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Properly cleanup and zero out resourcesThierry Reding3-5/+36
When the DRM driver is unloaded, all the associated resources must be cleaned up and zeroed out. This is necessary because of the architecture of the Tegra DRM driver, where not all subdrivers are unloaded along with the DRM driver. Therefore device-managed managed won't be freed and memory cannot be assumed to have been cleared (because it hasn't been reallocated using kzalloc()) by the time the DRM driver is reloaded. It is therefore necessary to zero out the structures to prevent strange errors (such as slab corruptions) from occurring. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Move driver to DRM treeThierry Reding21-17/+27
In order to make subsystem-wide changes easier, move the Tegra DRM driver back into the DRM tree. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Use relative include pathsThierry Reding7-26/+24
This is slightly safer than adding -Idrivers/gpu/host1x to cflags-y. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Move subdevice infrastructure to host1xThierry Reding13-365/+898
The Tegra DRM driver currently uses some infrastructure to defer the DRM core initialization until all required devices have registered. The same infrastructure can potentially be used by any other driver that requires more than a single sub-device of the host1x module. Make the infrastructure more generic and keep only the DRM specific code in the DRM part of the driver. Eventually this will make it easy to move the DRM driver part back to the DRM subsystem. Signed-off-by: Thierry Reding <treding@nvidia.com>
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