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2014-07-18ARM: i.MX27 clk: Separate DT and non-DT init procedureAlexander Shiyan1-15/+24
This patch separates DT and non-DT clock initialization procedure, so we can avoid a lot of unneeded clk_register_clkdev() for DT case. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Remove excess variableAlexander Shiyan1-8/+7
Base address for driver is global, there are no need to use intermediate variable for it. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Use of_clk_get_by_name() for timer clocks for DT case.Alexander Shiyan7-28/+25
Use of_clk_get_by_name() for timer clocks for DT case. This patch eliminates a lot of unneeded clk_register_clkdev() calls for GPT. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: defconfig: Select CONFIG_FHANDLEFabio Estevam3-0/+3
CONFIG_FHANDLE=y is needed when running systemd with version >=210, so that it can spawn a serial tty via getty. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: remove mx51.h and mx53.hShawn Guo5-654/+0
Now all the macros in mx51.h and mx53.h are used nowhere, so remove them. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: clean function declarations in mx51.hShawn Guo2-5/+1
The mx51_display_revision() is a dead declaration. Remove it. Also, move mx51_revision() into common.h. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: remove file mm-imx5.cShawn Guo6-67/+1
The only code left in mm-imx5.c is to create static mapping. While all IMX platform code are moved to use dynamic mapping, the file can just be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: move init hooks into mach-imx5x.cShawn Guo4-48/+50
These imx5 init_early[late] hooks are called only from mach-imx5x.c. Let's move them into mach-imx5x.c. While at it, replace the static mapping in imx51_ipu_mipi_setup() with dynamic mapping. Also this function and imx_src_init() do not necessarily to be called at .init_early hook, so move them into .init_machine. The mxc_iomux_v3_init() is dropped from imx51_init_early() in the moving, since it's only needed by non-DT boot. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: use dynamic mapping for Cortex and GPC blockShawn Guo3-34/+60
The imx5 pm code uses static mapping to access Cortex and GPC registers. The patch create struct imx5_pm_data to encode physical address of Cortex and GPC block, and create dynamic mapping for them at run-time. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: reuse clock CCM mapping in pm codeShawn Guo3-4/+17
The imx5 pm code needs to access CCM registers. Let's remove the use of CCM static mapping in pm code by reusing the dynamic mapping created in clock code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: use dynamic mapping for DPLL blockShawn Guo1-17/+48
Replace the static mapping of DPLL block with dynamic mapping by calling ioremap(). Ideally, this should be done by calling of_iomap(), so that the physical address of DPLL can also be retrieved from device tree. But unfortunately, DPLL blocks are not defined in DT in the first place. So to maintain the compatibility of existing DTB, we use ioremap() with physical address defines in the code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: use dynamic mapping for CCM blockShawn Guo1-39/+51
Replace the static mapping of CCM block with dynamic mapping and retrieve CCM base address from device tree. Though it's not nice to encode the variable ccm_base in macros, it helps to avoid a massive churn on the code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: remove header crm-regs-imx5.hShawn Guo3-602/+70
Most of the macros in crm-regs-imx5.h are used nowhere. Let's move the needed ones into the C files, and remove the header. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: retrieve iim base from device treeShawn Guo1-4/+21
Instead of using static define and mapping, the patch changes imx5 code that reads chip revision from IIM to retrieve base address from device tree and use dynamic mapping. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: call mxc_timer_init_dt() on imx51Shawn Guo1-1/+1
Since i.MX51 supports DT only, it's more appropriate to call mxc_timer_init_dt() than mxc_timer_init() to initialize timer. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: remove function imx51_soc_init()Shawn Guo2-34/+0
The function imx51_soc_init() was used by non-DT boot only. Since i.MX51 supports DT only, the function can be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: tzic_init_irq() can directly be .init_irq hookShawn Guo6-26/+10
After i.MX51 supports DT only, tzic_init_irq() can figure out the tzic_base on its own. Thus, it can directly be .init_irq hook, and mx51[53]_init_irq() can be saved. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: drop arguments from mx5_clocks_common_init()Shawn Guo1-10/+8
The function mx5_clocks_common_init() was created with a number of arguments to pass oscillator clock rate in non-DT boot. Since i.MX5 is DT only platform, the arguments can be dropped, and the clock rate can just be retrieved from device tree. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: make mx51_clocks_init() a DT callShawn Guo2-15/+3
Since i.MX51 becomes a DT only platform, we can make mx51_clocks_init() a DT call and save function mx51_clocks_init_dt() now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: remove i.MX5 non-DT device registration helpersShawn Guo13-190/+1
i.MX5 is DT only platforms, so these non-DT device registration helpers is used nowhere. Remove them. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: remove imx51 non-DT support filesShawn Guo5-1073/+1
Since i.MX51 becomes a DT only platform, those non-DT support files can be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: drop option MACH_IMX51_DTShawn Guo5-10/+6
Since i.MX51 becomes DT only now, we can drop option MACH_IMX51_DT and just use SOC_IMX51 instead. While at it, rename imx51-dt.c to mach-imx51.c to align with the name schema of other IMX DT only platforms. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx5: move SOC_IMX5 and SOC_IMX51 into 'Device tree only'Shawn Guo1-12/+11
After moving SOC_IMX51 support over to device tree, all i.MX5 support becomes device tree only now. So options SOC_IMX5 and SOC_IMX51 can just be under 'Device tree only'. While at it, 'select ARCH_MXC_IOMUX_V3' is dropped, since it's only needed by non-DT build before. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: move EHCI platform defines out of platform_data headerShawn Guo27-46/+75
The platform_data header usb-ehci-mxc.h has a lot of stuff used by only IMX platform code. They shouldn't be really in this header but a IMX platform local header. Create ehci.h and move these stuff into it. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Remove registration helper for i.MX1 USB UDCAlexander Shiyan5-118/+0
imx_udc driver was removed from the kernel of about 10 months ago. This patch removes a registration helper for this driver and orphaned driver header. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX1 clk: Add devicetree supportAlexander Shiyan3-71/+148
This patch adds devicetree support CCM module for i.MX1 (MC9328MX1) CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: imx: remove unused definesPaul Bolle1-33/+0
None of the defines "for modules using static and dynamic DMA channels" are used. Remove these. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18ARM: i.MX: Select HAVE_IMX_SRC for i.MX5 globallyAlexander Shiyan1-3/+1
No reason to choose a symbol HAVE_IMX_SRC separately for each supported i.MX5 CPU, this patch selects this symbol globally for i.MX5. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-18Merge tag 'imx-fixes-3.16-2' into imx/socShawn Guo1-2/+2
The i.MX fixes for 3.16, 2nd take: It fixes a hard machine hang regression for boards where only pcie is active but no sata, as the latest imx6-pcie driver is no longer enabling the upstream clock directly but only lvds clk out.
2014-07-18ARM: clk-imx6q: parent lvds_sel input from upstream clock gatesLucas Stach1-2/+2
The i.MX6 reference manual doesn't make a clear distinction between the fixed clock divider and the enable gate for the pcie and sata reference clocks. This lead to the lvds mux inputs in the imx6q clk driver to be parented from the ref clock (which is the divider) instead of the actual gate, which in turn prevents the upstream clock to actually be enabled when lvds clk out is active. This fixes a hard machine hang regression in kernel 3.16 for boards where only pcie is active but no sata, as with this kernel version the imx6-pcie driver is no longer enabling the upstream clock directly but only lvds clk out. Reported-by: Arne Ruhnau <arne.ruhnau@target-sg.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Arne Ruhnau <arne.ruhnau@target-sg.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-07-17ARM: dts: keystone-evm: add 1g ethernet phys nodesGrygorii Strashko1-0/+12
Keystone EVMK2HX has two 1G Marvell 88E1111 Ethernet PHYs installed, so add corresponding child nodes for 1G MDIO bus and enable it. For more information see schematics: http://wfcache.advantech.com/www/support/TI-EVM/download/Schematics/PDF/K2H_K2EVM-HK_SCH_A102_Rev1_0.pdf Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2014-07-17ARM: dts: keystone: add mdio devices entriesGrygorii Strashko1-0/+11
The Keystone 2 has MDIO HW block which are compatible to Davinci SoCs: See "Gigabit Ethernet (GbE) Switch Subsystem" See http://www.ti.com/lit/ug/sprugv9d/sprugv9d.pdf Hence, add corresponding DT entry for Keystone 2. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2014-07-17ARM: tegra: roth: add display DT nodeAlexandre Courbot1-3/+19
Tegra DSI support has been fixed to support continuous clock behavior that the panel used on SHIELD requires, so finally add its device tree node since it is functional. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-17ARM: tegra: Fix typoed ams,ext-control propertiesTuomas Tynkkynen2-6/+6
The property for enabling external rail control on the AS3722 is ams,ext-control, not ams,external-control. Since the external rail control property was previously being ignored, LP1 suspend on these boards wasn't actually turning the CPU rail off at all. Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-17ARM: tegra: jetson-tk1: Add XUSB pad controllerThierry Reding1-0/+26
Assign lanes to the XUSB pads as used on the Jetson TK1. Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-17ARM: tegra: tegra124: Add XUSB pad controllerThierry Reding1-0/+10
The device tree node in the SoC file contains only the resources (such as registers, resets, ...) but none of the lane assignment information since that's board specific and belongs in the board file. Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-17ARM: tegra: add GK20A GPU to Tegra124 DTThierry Reding1-0/+15
Add the GK20A device node to Tegra124's device tree. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: of: add GK20A device tree bindingAlexandre Courbot1-0/+43
Add the device tree binding documentation for the GK20A GPU used in Tegra K1 SoCs. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: roth: enable input on mmc clock pinsAlexandre Courbot1-3/+3
Input had been disabled by mistake on these pins, leading to issues with SDIO devices like the Wifi module not being probed or random errors occuring on the SD card. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: roth: fix unsupported pinmux propertiesAlexandre Courbot1-4/+0
The pinmux subsystem complained that the nvidia,low-power-mode property is not supported by the sdio1, sdio3 and gma drive groups. In addition gma also does not support nvidia,drive-type. Remove these properties so the pinmux configuration can properly be applied. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: Migrate Apalis T30 PCIe power supply schemeMarcel Ziswiler1-3/+8
This migration is required for continued PCIe operation after commit d3c7e24b84fc "PCI: tegra: Implement accurate power supply scheme". Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [swarren: added commit subject and shortened hash] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: tamonten: add the display to the Medcom WideAlban Bedel1-1/+19
Enable the RGB output and add the panel definition to the Medcom Wide DTS. Also add a label to the backlight defintion to reference it in the panel definition. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: tamonten: add the base board regulatorsAlban Bedel4-9/+124
Currently the Tamonten DTS define a fixed regulator for the 5V supply. However this regulator is in fact on the base board. Fix this by properly defining the regulators found on the base boards. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: initial support for apalis t30Marcel Ziswiler4-0/+936
This patch adds the device tree to support Toradex Apalis T30, a computer on module which can be used on different carrier boards. The module consists of a Tegra 3 SoC, two PMICs, 1 or 2 GB of DDR3L RAM, eMMC, an LM95245 temperature sensor chip, an i210 resp. i211 gigabit Ethernet controller, an STMPE811 ADC/touch controller as well as two MCP2515 CAN controllers. Furthermore, there is an SGTL5000 audio codec which is not yet supported. Anything that is not self contained on the module is disabled by default. The device tree for the Evaluation Board includes the modules device tree and enables the supported peripherals of the carrier board (the Evaluation Board supports almost all of them). While at it also add the device tree binding documentation for Apalis T30. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [swarren: fixed some node sort orders] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: jetson-tk1: mark eMMC as non-removableLucas Stach1-0/+1
The eMMC is soldered to the board, reflect this in the DT. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: venice2 - Enable HDADylan Reid1-0/+4
Turn on the HDA controller in Venice2, it is used for HDMI audio. Signed-off-by: Dylan Reid <dgreid@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: Add Tegra124 HDA supportDylan Reid1-0/+15
Add a device node for the HDA controller found on Tegra124. Signed-off-by: Dylan Reid <dgreid@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17ARM: tegra: Add the EC i2c tunnel to tegra124-venice2Doug Anderson1-0/+26
This adds the EC i2c tunnel (and devices under it) to the tegra124-venice2 device tree. Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Andrew Bresticker <abrestic@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-17Merge branch 'for-3.17/xusb-padctl' into for-3.17/dtThierry Reding5-0/+1114
2014-07-17Merge branch 'for-3.17/dt-cros-ec-kbd' into for-3.17/dtThierry Reding3-183/+111