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2022-05-06Merge tag 'tegra-for-5.19-arm64-dt' of ↵Arnd Bergmann13-13/+1038
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.19-rc1 This adds some improvements on Tegra234 (QSPI, CCPLEX), improves the SDMMC clock speed on Tegra194 and adds the ASRC audio block on various chip generations. Memory controller channels are also added on Tegra186 and later and the missing DFLL reset is added for Tegra210. * tag 'tegra-for-5.19-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Add missing DFLL reset on Tegra210 arm64: tegra: Add memory controller channels arm64: tegra: Enable ASRC on various platforms arm64: tegra: Add ASRC device on Tegra186 and later arm64: tegra: Update PWM fan node name arm64: tegra: Add node for Tegra234 CCPLEX cluster arm64: tegra: Add QSPI controllers on Tegra234 arm64: tegra: Update SDMMC1/3 clock source for Tegra194 Link: https://lore.kernel.org/r/20220506143005.3916655-5-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06Merge tag 'tegra-for-5.19-dt-bindings' of ↵Arnd Bergmann1-6/+74
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.19-rc1 Updates the memory controller bindings to properly validate the number of entries in the reg and reg-names properties. * tag 'tegra-for-5.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: memory: tegra: Update validation for reg and reg-names Link: https://lore.kernel.org/r/20220506143005.3916655-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06Merge tag 'renesas-dt-bindings-for-v5.19-tag2' of ↵Arnd Bergmann5-1/+22
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT binding updates for v5.19 (take two) - Document support for the R-Car V4H SoC and the White Hawk development board stack, - Document support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit Board, - Document SPI Multi I/O Bus Controller (RPC-IF) support for RZ/G2UL, - Miscellaneous fixes and improvements. * tag 'renesas-dt-bindings-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: soc: renesas: Move renesas,rzg2l-sysc from arm to soc dt-bindings: memory: renesas,rpc-if: Document RZ/G2UL SoC dt-bindings: arm: renesas: Document Renesas RZ/V2M SoC and EVK board dt-bindings: power: renesas,rcar-sysc: Document r8a779g0 SYSC bindings dt-bindings: reset: renesas,rst: Document r8a779g0 reset module dt-bindings: arm: renesas: Document R-Car V4H White Hawk DT bindings Link: https://lore.kernel.org/r/cover.1651828616.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06Merge tag 'renesas-arm-dt-for-v5.19-tag2' of ↵Arnd Bergmann39-204/+1570
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.19 (take two) - I2C, sound, USB, CANFD, timer, watchdog, (Q)SPI, cpufreq, and thermal support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK development board, - Initial support for the R-Car V4H SoC and the Renesas White Hawk development board stack, - DMA, RTC, and USB support for the RZ/N1D SoC, - Initial support for the RZ/V2M SoC an the RZ/V2M Evaluation Kit Board, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (40 commits) arm64: dts: renesas: Add initial device tree for RZ/V2M EVK arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY ARM: dts: r9a06g032: Add USB PHY DT support ARM: dts: r9a06g032: Add internal PCI bridge node ARM: dts: r9a06g032: Describe the RTC arm64: dts: renesas: Add interrupt-names to CANFD nodes arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node arm64: dts: renesas: r9a07g043: Create thermal zone to support IPA arm64: dts: renesas: r9a07g043: Add TSU node arm64: dts: renesas: r9a07g043: Add OPP table arm64: dts: renesas: r9a07g043: Add RSPI{0,1,2} nodes arm64: dts: renesas: r9a07g054: Fix external clk node names arm64: dts: renesas: r9a07g044: Fix external clk node names ARM: dts: r9a06g032: Fix the NAND controller node ARM: dts: r9a06g032: Fill the UART DMA properties ARM: dts: r9a06g032: Describe the DMA router ARM: dts: r9a06g032: Add the two DMA nodes arm64: dts: renesas: Remove empty rgb output endpoints ... Link: https://lore.kernel.org/r/cover.1651828603.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06Merge tag 'samsung-dt64-5.19-2' of ↵Arnd Bergmann7-44/+612
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.19, part two 1. Cleanups: unused and undocumented dma-channels and dma-requests. 2. Add clock controllers to ExynosAutov9. * tag 'samsung-dt64-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: switch UFS clock node in ExynosAutov9 arm64: dts: exynos: switch USI clocks in ExynosAutov9 arm64: dts: exynos: add initial CMU clock nodes in ExynosAutov9 dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings dt-bindings: clock: add clock binding definitions for Exynos Auto v9 arm64: dts: fsd: drop useless 'dma-channels/requests' properties arm64: dts: exynos: drop useless 'dma-channels/requests' properties arm64: dts: exynos: move XTCXO clock frequency to board in Exynos Auto v9 Link: https://lore.kernel.org/r/20220506081438.149192-5-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06Merge tag 'samsung-dt-5.19-2' of ↵Arnd Bergmann8-42/+2
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM changes for v5.19, part two 1. Cleanups: unused and undocumented dma-channels and dma-requests. 2. Correct compatible of Samsung EEPROM on S5PV210. * tag 'samsung-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: drop useless 'dma-channels/requests' properties ARM: dts: s5pv210: drop useless 'dma-channels/requests' properties ARM: dts: exynos: add atmel,24c128 fallback to Samsung EEPROM Link: https://lore.kernel.org/r/20220506081438.149192-4-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06Merge tag 'dt-cleanup-5.19-2' of ↵Arnd Bergmann59-71/+65
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Minor cleanup of ARM DTS for v5.19, part two Align SPI NOR node names to DT schema and drop unused/undocumented dma-channels/dma-requests. * tag 'dt-cleanup-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: socfpga: drop useless 'dma-channels/requests' properties ARM: dts: zynq-7000: drop useless 'dma-channels/requests' properties ARM: dts: marvell: align SPI NOR node name with dtschema ARM: dts: omap: align SPI NOR node name with dtschema ARM: dts: nuvoton: align SPI NOR node name with dtschema Link: https://lore.kernel.org/r/20220506081438.149192-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06Merge tag 'dt64-cleanup-5.19' of ↵Arnd Bergmann22-33/+25
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Minor cleanup of ARM64 DTS for v5.19 Align SPI NOR node names and freq-table-hz to DT schema. Drop unused/undocumented dma-channels/dma-requests. * tag 'dt64-cleanup-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: broadcom: drop useless 'dma-channels/requests' properties arm64: dts: stratix10/agilex: drop useless 'dma-channels/requests' properties arm64: dts: marvell: align SPI NOR node name with dtschema arm64: dts: microchip: align SPI NOR node name with dtschema arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS Link: https://lore.kernel.org/r/20220506081438.149192-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-06arm64: dts: renesas: Add initial device tree for RZ/V2M EVKPhil Edworthy2-0/+46
Add basic support for RZ/V2M EVK (based on R9A09G011): - memory - External input clock - UART Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220503115557.53370-13-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add initial DTSI for RZ/V2M SoCPhil Edworthy1-0/+93
Details of the SoC can be found here: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-cortex-a-mpus/rzv2m-dual-cortex-a53-lpddr4x32bit-ai-accelerator-isp-4k-video-codec-4k-camera-input-fhd-display-output Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220504094456.24386-3-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06Merge tag 'renesas-r9a09g011-dt-binding-defs-tag' into renesas-arm-dt-for-v5.19Geert Uytterhoeven1-0/+352
Renesas RZ/V2M DT Binding Definitions Clock definitions for the Renesas RZ/V2M (R9A09G011) SoC, shared by driver and DT source files.
2022-05-06arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible valuesGeert Uytterhoeven1-30/+44
Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. Hence update the compatible properties in various device nodes to include family-specific compatible values for R-Car Gen4 instead of R-Car Gen3: - DMAC, - (H)SCIF, - I2C, - IPMMU, - WDT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/73cea9d5e1a6639422c67e4df4285042e31c9fd5.1651497071.git.geert+renesas@glider.be
2022-05-06ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHYHerve Codina1-0/+12
Describe the PCI USB devices that are behind the PCI bridge, adding necessary links to the USB PHY device. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20220429134143.628428-8-herve.codina@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06ARM: dts: r9a06g032: Add USB PHY DT supportHerve Codina1-0/+6
Define the r9a06g032 generic part of the USB PHY device node. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20220429134143.628428-7-herve.codina@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06ARM: dts: r9a06g032: Add internal PCI bridge nodeHerve Codina1-0/+29
Add the device node for the r9a06g032 internal PCI bridge device. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20220429134143.628428-6-herve.codina@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06ARM: dts: r9a06g032: Describe the RTCMiquel Raynal1-0/+13
Describe the SoC RTC which counts time and provides alarm support. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20220429104602.368055-7-miquel.raynal@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add interrupt-names to CANFD nodesGeert Uytterhoeven12-0/+12
The Renesas R-Car CAN-FD Controller on R-Car Gen3 and RZ/G2 SoCs has two interrupts. Add interrupt-names properties to all CAN-FD device nodes to identify the individual interrupts, so we can make this property a required property in the DT bindings. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/10eef1e20372af4a156b06df8e5124666ec7c6b6.1651512451.git.geert+renesas@glider.be
2022-05-06arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller nodeBiju Das1-1/+8
Add SPI Multi I/O Bus controller node to R9A07G043 (RZ/G2UL) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220502190155.84496-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g043: Create thermal zone to support IPABiju Das1-0/+16
Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. Based on the work done by Dien Pham <dien.pham.ry@renesas.com> and others for r8a77990 SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220501112926.47024-6-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g043: Add TSU nodeBiju Das1-0/+26
Add TSU node to RZ/G2UL SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220501112926.47024-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g043: Add OPP tableBiju Das1-0/+28
Add OPP table for RZ/G2UL SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220501112926.47024-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g043: Add RSPI{0,1,2} nodesBiju Das1-1/+42
Add RSPI{0,1,2} nodes to R9A07G043 (RZ/G2UL) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220501112926.47024-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g054: Fix external clk node namesBiju Das1-4/+4
Add suffix '-clk' for can and extal clk node names and replace the clk node names audio_clk{1,2} with audio{1,2}-clk as per the device tree specification. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220428133156.18080-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: r9a07g044: Fix external clk node namesBiju Das1-4/+4
Add suffix '-clk' for can and extal clk node names and replace the clk node names audio_clk{1,2} with audio{1,2}-clk as per the device tree specification. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220428133156.18080-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06ARM: dts: r9a06g032: Fix the NAND controller nodeMiquel Raynal1-0/+1
Add the missing power-domains property which is mandatory. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20220429105229.368728-3-miquel.raynal@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06ARM: dts: r9a06g032: Fill the UART DMA propertiesMiquel Raynal1-0/+10
UART 0 to 2 do not have DMA support, while UART 3 to 7 do. Fill the "dmas" and "dma-names" properties for each of these nodes. Please mind that these nodes go through the dmamux node which will redirect the requests to the right DMA controller. The first 4 cells of the "dmas" properties will be transferred as-is to the DMA controllers. The last 2 cells are consumed by the dmamux. Which means cell 0 and 4 are almost redundant, one giving the controller request ID and the other the dmamux channel which is a 1:1 translation of the request IDs, shifted by 16 when pointing to the second DMA controller. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20220421095323.101811-11-miquel.raynal@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06ARM: dts: r9a06g032: Describe the DMA routerMiquel Raynal1-0/+10
There is a dmamux on this SoC which allows picking two different sources for a single DMA request. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220427095653.91804-10-miquel.raynal@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06ARM: dts: r9a06g032: Add the two DMA nodesMiquel Raynal1-0/+28
Describe the two DMA controllers available on this SoC. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220427095653.91804-9-miquel.raynal@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Remove empty rgb output endpointsLaurent Pinchart18-32/+20
Endpoints node must have a remote-endpoint property, as endpoints only exist to model a link between ports. Drop the empty rgb output endpoints from SoC dtsi files, and declare them in the board dts instead. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220424161228.8147-2-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Remove empty lvds endpointsLaurent Pinchart12-30/+0
Endpoints node must have a remote-endpoint property, as endpoints only exist to model a link between ports. Drop the empty lvds endpoints from SoC dtsi files, they should be instead declared in the board dts or in overlays. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220424161228.8147-1-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: rzg2ul-smarc: Enable USB2.0 supportBiju Das2-46/+11
Enable USB2.0 Host/Device support on RZ/G2UL SMARC EVK by adding usb{0,1} pincontrol entries to the soc-pinctrl dtsi and deleting the nodes which disabled it. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220429072400.23729-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: rzg2ul-smarc: Enable AudioBiju Das2-0/+30
Enable Audio on RZ/G2UL SMARC EVK by adding ssi1 pincontrol entries to the soc-pinctrl dtsi and ssi1 and cpu sound_dai nodes to the board dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220429072400.23729-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: rzg2l-smarc: Move ssi0 and cpu sound_dai nodes from ↵Biju Das4-14/+22
common dtsi On RZ/G2{L,LC} SoM module, the wm8978 audio codec is connected to ssi0, whereas on RZ/G2UL it is connected to ssi1. So move ssi0 and cpu sound_dai nodes from common dtsi to board specific dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220429072400.23729-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add Renesas White Hawk boards supportYoshihiro Shimoda3-0/+69
Initial support for the Renesas White Hawk CPU and BreakOut boards. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220428135058.597586-4-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add Renesas R8A779G0 SoC supportYoshihiro Shimoda1-0/+122
Add initial support for the Renesas R8A779G0 (R-Car V4H) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220428135058.597586-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-05Merge tag 'omap-for-v5.19/dt-part2-signed' of ↵Arnd Bergmann18-1257/+1596
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt More devicetree changes for omaps Devicetree updates for few boards and more clean-up for make dtbs warnings: - Updates for am335x-myirtech oscillator and mtd - Firmware configuration for i2c voltage scaling and IO isolation for am3/4 that are wired for these features - A series of omap3 clock node clean-up for make dtbs warnings for unique_unit_address and node_name_chars_strict - Updates for dma-channel usage to add the generic dma-common properties * tag 'omap-for-v5.19/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (26 commits) ARM: dts: dm81xx: use new 'dma-channels/requests' properties ARM: dts: am33xx: use new 'dma-channels/requests' properties ARM: dts: Group omap3 CM_CLKSEL1_EMU clocks ARM: dts: Group omap3 CM_CLKSEL_PER clocks ARM: dts: Group omap3 CM_ICLKEN_PER clocks ARM: dts: Group omap3 CM_FCLKEN_PER clocks ARM: dts: Group omap3 CM_FCLKEN_CAM clocks ARM: dts: Group omap3 CM_CLKSEL_DSS clocks ARM: dts: Group omap3 CM_FCLKEN_DSS clocks ARM: dts: Group omap3 CM_CLKOUT_CTRL clocks ARM: dts: Group omap3 CM_CLKSEL1_PLL clocks ARM: dts: Group omap3 CM_CLKSEL_WKUP clocks ARM: dts: Group omap3 CM_ICLKEN_WKUP clocks ARM: dts: Group omap3 CM_FCLKEN_WKUP clocks ARM: dts: Group omap3 CM_CLKSEL_CORE clocks ARM: dts: Group omap3 CM_ICLKEN3_CORE clocks ARM: dts: Group omap3 CM_ICLKEN1_CORE clocks ARM: dts: Group omap3 crypto accelerator clocks ARM: dts: Group omap3 CM_FCLKEN1_CORE clocks ARM: dts: Group omap3 CONTROL_DEVCONF1 clocks ... Link: https://lore.kernel.org/r/pull-1651726643-535261@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05Merge tag 'arm-soc/for-5.19/devicetree-arm64' of ↵Arnd Bergmann3-4/+4
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SoCs changes for 5.19, please pull the following: - Krzysztof fixes the SPI NOR Device Tree node name to comply with the dtschema * tag 'arm-soc/for-5.19/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: align SPI NOR node name with dtschema Link: https://lore.kernel.org/r/20220504210942.1838248-3-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05Merge tag 'arm-soc/for-5.19/devicetree' of ↵Arnd Bergmann41-158/+596
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoCs Device Tree changes for 5.19, please pull the following: - Oleksij fixes the ethernet node name for the USB Ethernet adapter on BCM283x (Raspberry Pi 1/2/3) platforms - Kuldeep fixes the PL022 SPI controller clock names to conform to the binding - Rafal updates the various BCM5301X (Northstar) Device Tree include files to be dtsschema conforming for pinctrl, NAND - Arinc adds the Asus RT-AC88U binding, removes some unnecessary properties of the Ethernet switch DT node, populates the correct PHY interface for port 5 of the switch, adds support for fetching the MAC address from the NVMEM provider and finally disables gmac0 on that device which is unused - Phil updates the Raspberry Pi 1/2/3 DTS files to have the latest gpio line names conforming to the printed circuit board layout - Krzysztof updates various Broadcom DTS files to have a conforming SPI nor Device Tree node - Takayoshi adds support for the Buffalo WZR-1166DHP/WZR-1166DHP2 wireless routers based on the BCM4708 SoC - William adds support for the BCM47622 ARMv7 Broadband SoC and provides a basic DTS to boot upstream Linux on such a system * tag 'arm-soc/for-5.19/devicetree' of https://github.com/Broadcom/stblinux: (22 commits) ARM: dts: BCM5301X: Add DT for WZR-1166DHP,DHP2 ARM: dts: add dts files for bcmbca soc 47622 dt-bindings: arm: add bcmbca device tree binding document ARM: dts: bcm283x: Align ETH_CLK GPIO line name ARM: dts: bcm283x: Remove gpio line name NC ARM: dts: bcm2835-rpi-b: Fix GPIO line names ARM: dts: bcm2837-rpi-3-b-plus: Fix GPIO line name of power LED ARM: dts: bcm2837-rpi-cm3-io3: Fix GPIO line names for SMPS I2C ARM: dts: bcm2835-rpi-zero-w: Fix GPIO line name for Wifi/BT ARM: dts: BCM5301X: Disable gmac0 and enable port@8 on Asus RT-AC88U ARM: dts: broadcom: align SPI NOR node name with dtschema dt-bindings: arm: bcm: add bindings for Asus RT-AC88U ARM: dts: BCM5301X: Fix compatible strings for BCM53012 and BCM53016 SoC dt-bindings: arm: bcm: create new description for BCM53016 dt-bindings: arm: bcm: fix BCM53012 and BCM53016 SoC strings ARM: dts: BCM5301X: Retrieve gmac1 MAC address from NVRAM on Asus RT-AC88U ARM: dts: BCM5301X: Add rgmii to port@5 of Broadcom switch on Asus RT-AC88U ARM: dts: BCM5301X: Remove cell properties from srab ports on Asus RT-AC88U ARM: dts: BCM5301X: Fix DTC warning for NAND node ARM: dts: BCM5301X: Update pin controller node name ... Link: https://lore.kernel.org/r/20220504210942.1838248-2-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05Merge tag 'juno-updates-5.19' of ↵Arnd Bergmann17-17/+613
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt Arm FVP/Juno device tree updates for v5.19 The main and bulk of the change is the addition of new platform Arm corstone1000(both FVP and FPGA versions). Also, there are addition of Coresight Cross Trigger Interface(CTI) support on Juno, fix for incorrect SCMI power domain IDs, addition of virtio-rng on FVP which is default disabled as it works only on latest versions of the FVP model. Other miscellanous changes include dropping of useless 'dma-channels/requests' properties and updating virtio device node names as per dtschema. * tag 'juno-updates-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Drop useless 'dma-channels/requests' properties arm64: dts: fvp: Align virtio device node names with dtschema arm64: dts: fvp: Add virtio-rng support arm64: dts: Add Arm corstone1000 platform support dt-bindings: Add Arm corstone1000 platform arm64: dts: juno: add CTI entries to device tree arm64: dts: juno: Fix SCMI power domain IDs for ETF and CS funnel Link: https://lore.kernel.org/r/20220504112917.3492009-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05Merge tag 'stm32-dt-for-v5.19-1' of ↵Arnd Bergmann23-62/+1319
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT for v5.19, round 1 Highlights: ---------- -MCU: -Fix pinctrl node names to match with pinctrl yaml. - MPU: -General: - Fix pinctrl node names to match with pinctrl yaml. - Add Protonics boards support based on STM32MP151A SoC: - PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with TI and Micrel 10BaseT Phys and wifi support. - PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity and CO2 sensors. - PRTT1A - 10BaseT1L multi functional controller. - ST boards: - Add RTC support on stm32mp13. - Add button and heartbit support on stm32mp13 DK board. - Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based on OP-TEE OS and SCMI protocol. - DH boards: - Use MCO2 to generate PHY clock and ETHRX clock in order to release internal PLL for a better SD card usage. - Add 1ms PHY post-reset on Avenger96 board to match with PHY requirements. * tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits) ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15 dt-bindings: reset: stm32mp15: rename RST_SCMI define dt-bindings: clock: stm32mp15: rename CK_SCMI define dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure" dt-bindings: rcc: Add optional external ethernet RX clock properties ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131 ARM: dts: stm32: add support for Protonic PRTT1x boards ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards dt-bindings: arm: stm32: correct blank lines dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards ARM: dts: stm32: enable RTC support on stm32mp135f-dk ARM: dts: stm32: add RTC node on stm32mp131 ARM: dts: stm32: Fix PHY post-reset delay on Avenger96 ARM: dts: stm32: fix pinctrl node name warnings (MPU soc) ... Link: https://lore.kernel.org/r/5818c943-882d-7e50-430d-ae3299a108ee@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05dt-bindings: clock: Add r9a09g011 CPG Clock DefinitionsPhil Edworthy1-0/+352
Define RZ/V2M (R9A09G011) Clock Pulse Generator module clock outputs (CPG_CLK_ON* registers), and reset definitions (CPG_RST_* registers) in Section 48.5 ("Register Description") of the RZ/V2M Hardware User's Manual (Rev. 1.10, Sep. 2021). Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220503115557.53370-3-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-05dt-bindings: soc: renesas: Move renesas,rzg2l-sysc from arm to socGeert Uytterhoeven1-1/+1
The Renesas RZ/{G2L,V2L} System Controller (SYSC) DT binding is not really a power-related DT binding, hence it does not belong under Documentation/devicetree/bindings/power/. Move it to Documentation/devicetree/bindings/soc/renesas/. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/a47015888f99476a5206a556dce93503494d9a73.1651495078.git.geert+renesas@glider.be
2022-05-05dt-bindings: memory: renesas,rpc-if: Document RZ/G2UL SoCBiju Das1-0/+1
Document RZ/G2UL RPC-IF bindings. RZ/G2UL RPC-IF is identical to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-rpc-if" will be used as a fallback. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220501082508.25511-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-05arm64: dts: exynos: switch UFS clock node in ExynosAutov9Chanho Park1-12/+2
Use cmu_fsys's clock node instead of dummy UFS clock node. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-13-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05arm64: dts: exynos: switch USI clocks in ExynosAutov9Chanho Park1-13/+4
Use CMU clock nodes instead of dummy fixed-rate-clock. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-12-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05arm64: dts: exynos: add initial CMU clock nodes in ExynosAutov9Chanho Park1-0/+84
Add cmu_top, cmu_busmc, cmu_core, cmu_fsys and peric0/c1/s clock nodes. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-11-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05Merge tag 'samsung-dt-bindings-clk-exynosautov9-5.19' into next/dt64Krzysztof Kozlowski2-0/+518
dt-bindings for Samsung ExynosAutov9 clock controllers for v5.19 The Devicetree bindings for Samsung ExynosAutov9 clock controllers.
2022-05-05dt-bindings: clock: add Exynos Auto v9 SoC CMU bindingsChanho Park1-0/+219
Add dt-schema for Exynos Auto v9 SoC clock controller. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504075154.58819-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-05dt-bindings: clock: add clock binding definitions for Exynos Auto v9Chanho Park1-0/+299
Add device tree clock binding definitions for below CMU blocks. - CMU_TOP - CMU_BUSMC - CMU_CORE - CMU_FYS2 - CMU_PERIC0 / C1 - CMU_PERIS Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-2-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-05-04arm64: tegra: Add missing DFLL reset on Tegra210Diogo Ivo1-2/+3
Commit 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling clocks") removed deassertion of reset lines when enabling peripheral clocks. This breaks the initialization of the DFLL driver which relied on this behaviour. In order to be able to fix this, add the corresponding reset to the DT. Tested on Google Pixel C. Cc: stable@vger.kernel.org Fixes: 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling clocks") Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-25 23:33:48 +0300