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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc
i.MX SoC update for 5.5:
- Add arm64 Kconfig option for the NXP S32 platform.
- Drop imx_anatop_usb_chrg_detect_disable() function which becomes
unneeded, since all the necessary charger setup is done by the USB
PHY driver now.
- Add serial number support for i.MX6/7 SoCs by reading 64-bit SoC
unique ID from OCOTP block.
- Replace i.MX machine specific coherency exit implementation using
the generic v7_exit_coherency_flush() function.
* tag 'imx-soc-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: use generic function to exit coherency
ARM: imx: Add serial number support for i.MX6/7 SoCs
ARM: imx: Drop imx_anatop_usb_chrg_detect_disable()
arm64: Introduce config for S32
Link: https://lore.kernel.org/r/20191105150315.15477-2-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc
Samsung mach/soc changes for v5.5
1. Minor cleanups in S3C platforms,
2. Enable newly added EXYNOS_ASV (Adaptive Supply Voltage) driver.
* tag 'samsung-soc-5.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: exynos: Enable exynos-asv driver for ARCH_EXYNOS
ARM: s3c: Rename s5p_usb_phy functions
ARM: s3c: Rename s3c64xx_spi_setname() function
Link: https://lore.kernel.org/r/20191104175902.12224-2-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc
ARM: tegra: Core changes for v5.5-rc1
Contains two fixes for CPU idle and suspend/resume on early Tegra SoCs.
* tag 'tegra-for-5.5-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Use WFE for power-gating on Tegra30
ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()
Link: https://lore.kernel.org/r/20191102144521.3863321-5-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc
Renesas ARM SoC updates for v5.5
- Drop legacy DT clock support on R-Car Gen2.
* tag 'renesas-arm-soc-for-v5.5-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: shmobile: rcar-gen2: Drop legacy DT clock support
Link: https://lore.kernel.org/r/20191101155842.31467-3-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
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Increase the max number of GPIOs from default 512 to 1024 for ASPEED
platforms, because Facebook Yamp (AST2500) BMC platform has total 594
GPIO pins (232 provided by ASPEED SoC, and 362 by I/O Expanders).
Link: https://lore.kernel.org/r/20191031014040.12898-1-rentao.bupt@gmail.com
Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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into arm/soc
ARM: mach-hisi: Hisilicon SoC updates for 5.5
- drop the ARCH_MULTI_V7 dependency in the sub-menu of ARCH_HISI
since ARCH_HISI depends on ARCH_MULTI_V7
* tag 'hisi-armv7-soc-for-5.5' of git://github.com/hisilicon/linux-hisi:
ARM: hisi: drop useless depend on ARCH_MULTI_V7
Link: https://lore.kernel.org/r/5DB9593D.9050904@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek into arm/soc
Realtek ARM64 based SoC for v5.5
Enable reset controllers and add a mailing list to MAINTAINERS.
* tag 'realtek-arm64-soc-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek:
arm64: realtek: Select reset controller
MAINTAINERS: Add mailing list for Realtek SoCs
Link: https://lore.kernel.org/r/20191030041000.31848-1-afaerber@suse.de
Signed-off-by: Olof Johansson <olof@lixom.net>
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The common ARM architecture code provides a generic function to exit
coherency called v7_exit_coherency_flush(). Replace the machine
specific implementation using the generic function.
Tested on a i.MX 6Dual by hotplugging the secondary CPU under load
through sysfs several 1000 times.
Tested-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Turned out that WFI doesn't work reliably on Tegra30 as a trigger for
the power-gating, it causes CPU hang under some circumstances like having
memory controller running of PLLP. The TRM doc states that WFI should be
used for the Big-Little "Cluster Switch", while WFE for the power-gating.
Hence let's use the WFE for CPU0 power-gating, like it is done for the
power-gating of a secondary cores. This fixes CPU hang after entering LP2
with memory running off PLLP.
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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There is an unfortunate typo in the code that results in writing to
FLOW_CTLR_HALT instead of FLOW_CTLR_CSR.
Cc: <stable@vger.kernel.org>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Enable exynos-asv driver for Exynos 32-bit SoCs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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The name s5p_usb_phy_init() suggests it is shared with S5Pv210 platform,
but it is not. It is specific to S3C64xx, so make it clear in the
name.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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The name s3c64xx_spi_setname() suggests it is shared with S3C64xx
platform, but except of contents it is not. It is called only by
S3C24xx code, so make it clear in the name.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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i.MX6/7 SoCs have a 64-bit SoC unique ID stored in OCOTP,
it can be used as SoC serial number, add this support for
i.MX6Q/6DL/6SL/6SX/6SLL/6UL/6ULL/6ULZ/7D, see below example
on i.MX6Q:
root@imx6qpdlsolox:~# cat /sys/devices/soc0/serial_number
240F31D4E1FDFCA7
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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With commit b5bbe2235361 ("usb: phy: mxs: Disable external charger
detect in mxs_phy_hw_init()") in tree all of the necessary charger
setup is done by the USB PHY driver which covers all of the affected
i.MX6 SoCs.
NOTE: imx_anatop_usb_chrg_detect_disable() was also called for i.MX7D,
but looking at its datasheet it appears to have a different USB PHY IP
block, so executing i.MX6 charger disable configuration seems
unnecessary.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peter Chen <peter.chen@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add configuration option for the NXP S32 platform family in
Kconfig.platforms. For starters, the only SoC supported will be Treerunner
(S32V234), with a single execution target: the S32V234-EVB (rev 29288)
board.
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The ARCH_HISI depends on ARCH_MULTI_V7, no need to add this depend
to each sub-menu config, and use tabs where possible.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Select RESET_CONTROLLER for ARCH_REALTEK.
Signed-off-by: Andreas Färber <afaerber@suse.de>
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As of commit 362b334b17943d84 ("ARM: dts: r8a7791: Convert to new
CPG/MSSR bindings"), all upstream R-Car Gen2 device tree source files
use the unified "Renesas Clock Pulse Generator / Module Standby and
Software Reset" DT bindings.
Hence remove backward compatibility with old R-Car Gen2 device trees
describing a hierarchical representation of the various CPG and MSTP
clocks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191016150939.30620-1-geert+renesas@glider.be
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
SoC changes for omaps for v5.5
This series of changes contains SoC related clean-up, and some PM
improvments:
- SoC clean-up to drop unused enable_wakeup and disable_wakeup,
simplify clkdm_clock_enable and disable, and few sparse fixes
- Drop pdata-quirks for TI bluetooth, this is now handled by a serdev
driver
- A series of PM changes to re-enable core oswr (open switch retention)
for omap4 that got disabled earlier because of various gpio-omap issues
that have been fixed earlier this year. We want to do this in small
steps for the pwrdm_set_logic_retst() changes so we can identify the
domain in case of unexpected issues
- A series of PM changes to configure voltage controller for droid4.
Eventually the voltage controller configuration should use device tree,
but we want to get things working first. These changes bring down
down the idle power consumption for droid4 with LCD blanked, WLAN
connected, USB disabled, and modem disabled to about 32 to 35mW from
about 39 to 45 mW
* tag 'omap-for-v5.5/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (24 commits)
ARM: OMAP2+: Remove duplicated include from pmic-cpcap.c
ARM: OMAP2+: pdata-quirks: drop TI_ST/KIM support
ARM: OMAP2+: make omap44xx_sha0_hwmod and omap44xx_l3_main_2__des static
ARM: OMAP2+: prm44xx: make prm_{save,restore}_context static
ARM: OMAP2+: make dra7xx_sha0_hwmod static
ARM: OMAP2+: do not export am43xx_control functions
ARM: OMAP2+: Configure voltage controller for cpcap to low-speed
ARM: OMAP2+: Configure voltage controller for retention
ARM: OMAP2+: Make some functions static
ARM: OMAP2+: Simplify code for clkdm_clock_enable and disable
ARM: OMAP2+: Drop unused enable_wakeup and disable_wakeup
ARM: OMAP2+: Initialize voltage controller for omap4
ARM: OMAP2+: Allow core oswr for omap4
ARM: OMAP2+: Allow per oswr for omap4
ARM: OMAP2+: Configure voltage controller for cpcap
ARM: OMAP2+: Update 4430 voltage controller operating points
ARM: OMAP2+: Remove bogus warnings for machines without twl PMIC
ARM: OMAP2+: Drop bogus wkup domain oswr setting
ARM: OMAP2+: Remove unused wakeup_cpu
ARM: dts: Use level interrupt for omap4 & 5 wlcore
...
Link: https://lore.kernel.org/r/pull-1571934890-285615@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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arm/soc
This pull request contains Broadcom ARM-based SoCs machine/Kconfig
updates for 5.5, please pull the following:
- Stefan adds a machine descriptor for BCM2711 (Raspberry Pi 4) which
sets up the appropriate DMA aperture for the Pi peripherals to work
(1GB window at 3GB offset)
- Ben fixes a number of sparse warnings for the Kona SMC code and the
BCM2836 SMP code
* tag 'arm-soc/for-5.5/soc' of https://github.com/Broadcom/stblinux:
ARM: bcm: fix missing __iomem in bcm_kona_smc.c
ARM: bcm: include local platsmp.h for bcm2836_smp_ops
ARM: bcm: Add support for BCM2711 SoC
Link: https://lore.kernel.org/r/20191023212814.30622-4-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
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Remove duplicated include.
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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All TI_ST users have been migrated to the new serdev based HCILL
bluetooth driver. That driver is initialized from DT and does not
need any platform quirks.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp into arm/soc
ARM: Marvell MMP SoC patches for v5.5
This tag includes initial support for the Marvell MMP3 processor.
MMP3 is used in OLPC XO-4 laptops, Panasonic Toughpad FZ-A1 tablet
and Dell Wyse 3020/Tx0D thin clients.
* tag 'mmp-soc-for-v5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp:
MAINTAINERS: mmp: add Git repository
ARM: mmp: remove MMP3 USB PHY registers from regs-usb.h
ARM: mmp: move cputype.h to include/linux/soc/
ARM: mmp: add SMP support
ARM: mmp: add support for MMP3 SoC
ARM: mmp: define MMP_CHIPID by the means of CIU_REG()
ARM: mmp: DT: convert timer driver to use TIMER_OF_DECLARE
ARM: mmp: map the PGU as well
ARM: mmp: don't select CACHE_TAUROS2 on all ARCH_MMP
ARM: l2c: add definition for FWA in PL310 aux register
Link: https://lore.kernel.org/r/3a035bed90f9d8acc49b2d11d20089b546062aea.camel@v3.sk
Signed-off-by: Olof Johansson <olof@lixom.net>
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The omap44xx_sha0_hwmod and omap44xx_l3_main_2__des objects are
not exported so make them static to avoid the following warnings:
arch/arm/mach-omap2/omap_hwmod_44xx_data.c:793:19: warning: symbol 'omap44xx_sha0_hwmod' was not declared. Should it be static?
arch/arm/mach-omap2/omap_hwmod_44xx_data.c:977:26: warning: symbol 'omap44xx_l3_main_2__des' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The prm_{save,restore}_context functions are not exported
so make them static to avoid the following warnings:
arch/arm/mach-omap2/prm44xx.c:748:6: warning: symbol 'prm_save_context' was not declared. Should it be static?
arch/arm/mach-omap2/prm44xx.c:759:6: warning: symbol 'prm_restore_context' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The dra7xx_sha0_hwmod object is not exported outside of
omap_hwmod_7xx_data. so make it static to avoid the
following warning:
arch/arm/mach-omap2/omap_hwmod_7xx_data.c:686:19: warning: symbol 'dra7xx_sha0_hwmod' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Do not export am43xx_control_{save,restore}_context to avoid
the foloowing warnings:
arch/arm/mach-omap2/control.c:687:6: warning: symbol 'am43xx_control_save_context' was not declared. Should it be static?
arch/arm/mach-omap2/control.c:701:6: warning: symbol 'am43xx_control_restore_context' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Document linux-realtek-soc mailing list to be CC'ed on patches.
Signed-off-by: Andreas Färber <afaerber@suse.de>
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Looks like the i2c timings in high-speed mode do not work properly to
allow us to clear I2C_DISABLE bits for PRM_VOLTCTRL register and the
device reboots if I2C_DISABLE bits are cleared.
Let's configure the voltage controller i2c for low-speed mode as done in
the Motorola Mapphone Android Linux kernel. This saves us about 7mW of
power during retention compared to the high-speed values.
Let's also change the low-speed warning to pr_info about relying on the
bootloader configured low-speed values like we currently do.
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Similar to existing omap3_vc_set_pmic_signaling(), let's add omap4
specific omap4_vc_set_pmic_signaling(). This allows the configured
devices to enable voltage controller for retention later on during
init.
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Fix sparse warnings:
arch/arm/mach-omap2/pmic-cpcap.c:29:15: warning: symbol 'omap_cpcap_vsel_to_uv' was not declared. Should it be static?
arch/arm/mach-omap2/pmic-cpcap.c:43:15: warning: symbol 'omap_cpcap_uv_to_vsel' was not declared. Should it be static?
arch/arm/mach-omap2/pmic-cpcap.c:93:15: warning: symbol 'omap_max8952_vsel_to_uv' was not declared. Should it be static?
arch/arm/mach-omap2/pmic-cpcap.c:107:15: warning: symbol 'omap_max8952_uv_to_vsel' was not declared. Should it be static?
arch/arm/mach-omap2/pmic-cpcap.c:140:15: warning: symbol 'omap_fan535503_vsel_to_uv' was not declared. Should it be static?
arch/arm/mach-omap2/pmic-cpcap.c:155:15: warning: symbol 'omap_fan535508_vsel_to_uv' was not declared. Should it be static?
arch/arm/mach-omap2/pmic-cpcap.c:173:15: warning: symbol 'omap_fan535503_uv_to_vsel' was not declared. Should it be static?
arch/arm/mach-omap2/pmic-cpcap.c:192:15: warning: symbol 'omap_fan535508_uv_to_vsel' was not declared. Should it be static?
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add a tree that was set up for to stage the patches for Marvell MMP SoC
support.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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Nothing in mach-mmp/ uses them and they belong to the PHY driver.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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Let's move cputype.h away from mach-mmp/ so that the drivers outside that
directory are able to tell the precise silicon revision. The MMP3 USB OTG
PHY driver needs this.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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Used to bring up the second core on MMP3.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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Similar to MMP2, which this patch is based on. Known differencies from MMP2
are:
* Two PJ4B cores instead of one PJ4
* Tauros 3 L2 cache controller instead of Tauros 2
* A GIC interrupt controller optionally used instead of the MMP one
* A TWD local timer
* Different USB2 PHY
* A USB3 SS controller
* More interrupt muxes
Hard to tell what else is different, because documentation is not
available.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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A rather trivial cosmetic improvement.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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This makes things just a tiny bit simpler.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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The MMP2 and later includes a system control unit in this area. We'll need
that to initialize the secondary core on MMP3.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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MMP3 has a PJ4B with a Tauros 3 cache controller that uses CACHE_L2X0
instead, while CACHE_TAUROS2 is present on PJ4 and PJ1 (Mohawk) based
platforms only.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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The PL310 also has a "Force write allocate" bits in the Auxiliary
Control Register.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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This pull request introduces the machine board code for the BCM2711,
which is placed on the Raspberry Pi 4.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Fix the following sparse warnings from a missing __iomem
in __bcm_kona_smc() function by adding __iomem attriubte.
arch/arm/mach-bcm/bcm_kona_smc.c:143:21: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-bcm/bcm_kona_smc.c:143:21: expected unsigned int [usertype] *args
arch/arm/mach-bcm/bcm_kona_smc.c:143:21: got void [noderef] <asn:2> *static [toplevel] [assigned] bcm_smc
_buffer
arch/arm/mach-bcm/bcm_kona_smc.c:149:9: warning: incorrect type in argument 2 (different address spaces)
arch/arm/mach-bcm/bcm_kona_smc.c:149:9: expected void volatile [noderef] <asn:2> *addr
arch/arm/mach-bcm/bcm_kona_smc.c:149:9: got unsigned int [usertype] *
arch/arm/mach-bcm/bcm_kona_smc.c:150:9: warning: incorrect type in argument 2 (different address spaces)
arch/arm/mach-bcm/bcm_kona_smc.c:150:9: expected void volatile [noderef] <asn:2> *addr
arch/arm/mach-bcm/bcm_kona_smc.c:150:9: got unsigned int [usertype] *
arch/arm/mach-bcm/bcm_kona_smc.c:151:9: warning: incorrect type in argument 2 (different address spaces)
arch/arm/mach-bcm/bcm_kona_smc.c:151:9: expected void volatile [noderef] <asn:2> *addr
arch/arm/mach-bcm/bcm_kona_smc.c:151:9: got unsigned int [usertype] *
arch/arm/mach-bcm/bcm_kona_smc.c:152:9: warning: incorrect type in argument 2 (different address spaces)
arch/arm/mach-bcm/bcm_kona_smc.c:152:9: expected void volatile [noderef] <asn:2> *addr
arch/arm/mach-bcm/bcm_kona_smc.c:152:9: got unsigned int [usertype] *[assigned] args
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Include platsmp.h for the definition of bcm2836_smp_ops to fix
the following warning:
arch/arm/mach-bcm/platsmp.c:334:29: warning: symbol 'bcm2836_smp_ops' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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We can make clkdm_clk_enable() usable for clkdm_hwmod_enable() by
dropping the unused clock check, and drop _clkdm_clk_hwmod_enable().
And we can make clkdm_hwmod_disable() call clkdm_hwmod_disable() and drop
the duplicate code in clkdm_hwmod_disable().
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We're only using static _enable_wakeup(), the others have no callers.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We're missing initializing the PRM_VOLTCTRL register for voltage
controller. Let's add omap4_vc_init_pmic_signaling() similar to what we
have for omap3 and enable voltage control for retention.
This brings down droid4 power consumption with mainline kernel to somewhere
between 40 and 50mW from about 70 to 80 mW for the whole device when
running idle with LCD and backlight off, WLAN connected, and USB and modem
modules unloaded.
Mostly just rmmod of omap2430, ohci-platform and phy-mapphone-mdm6600 are
needed to idle USB and shut down the modem. And after that measuring idle
power consumption can be done with reading sysfs entry periodically
for /sys/class/power_supply/battery/power_avg. Then rmmod of phy-cpcap-usb
will save few more mW, but will disable the debug UART.
Note that sometimes CM_L4PER_UART1_CLKCTRL at 0x4a009540 does not idle
properly after unloading of phy-mapphone-mdm6600.
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Commit f74297dd9354 ("ARM: OMAP2+: Make sure LOGICRETSTATE bits are not
cleared") disabled oswr (open switch retention) for per and core domains
as various GPIO related issues were noticed if the bootloader had
configured the bits for LOGICRETSTATE for per and core domains.
With the recent gpio-omap fixes, mostly related to commit e6818d29ea15
("gpio: gpio-omap: configure edge detection for level IRQs for idle
wakeup"), things now behave for enabling core oswr for omap4.
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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