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2012-09-22Merge branch 'samsung/pinctrl' into next/driversOlof Johansson3-12/+32
A few fixups for the samsung pinctrl series * samsung/pinctrl: pinctrl: exynos: Fix wakeup IRQ domain registration check pinctrl: samsung: Uninline samsung_pinctrl_get_soc_data pinctrl: exynos: Correct the detection of wakeup-eint node pinctrl: exynos: Mark exynos_irq_demux_eint as inline pinctrl: exynos: Handle only unmasked wakeup interrupts pinctrl: exynos: Fix typos in gpio/wkup _irq_mask pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa
2012-09-21Merge branch 'next/dt-gscaler' of ↵Olof Johansson5-0/+157
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim: Here is G-Scaler DT for supporting EXYNOS5 SoCs. * 'next/dt-gscaler' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Adds G-Scaler device from Device Tree ARM: EXYNOS: Add clock support for G-Scaler
2012-09-21Merge branch 'next/pinctrl-samsung' of ↵Olof Johansson12-0/+2654
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers From Kukjin Kim: This branch is for supporting pinctrl for Samsung EXYNOS. Now this can support EXYNOS4210 and other EXYNOS SoCs such as EXYNOS4X12 will be supported next time. * 'next/pinctrl-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled platform ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is used gpio: exynos4: skip gpiolib registration if pinctrl driver is used pinctrl: add exynos4210 specific extensions for samsung pinctrl driver pinctrl: add samsung pinctrl and gpiolib driver
2012-09-21Merge branch 'drivers/ocp2scp' into next/driversOlof Johansson1-2/+2
Pick up one more bugfix * drivers/ocp2scp: drivers: bus: omap_l3: use resources instead of hardcoded irqs Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-21drivers: bus: omap_l3: use resources instead of hardcoded irqsOlof Johansson1-2/+2
This fixes up a merge conflict due to the move of the driver and cleanups of platform data around the same time. Moving to the resource is what we want anyway, so do it in this branch. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [olof: rewrote with this branch as base, same end result] Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-21pinctrl: exynos: Fix wakeup IRQ domain registration checkTomasz Figa1-1/+1
Because of a typo, incorrect field of a structure was being checked. This patch fixes the check to use correct field. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: samsung: Uninline samsung_pinctrl_get_soc_dataTomasz Figa1-1/+1
Although the function is used only a single time, it is not performance critical and it is pretty heavy, so let the compiler decide whether to inline it instead. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: exynos: Correct the detection of wakeup-eint nodeTomasz Figa1-5/+9
Current way of finding the wakeup-eint node scans the whole device tree not only children of the pinctrl node, so it might detect a wakeup-eint node of another pinctrl device. This patch limits the scope of looking for nodes only to subnodes of the pinctrl node. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: exynos: Mark exynos_irq_demux_eint as inlineTomasz Figa1-1/+1
The exynos_irq_demux_eint utility function is used in chained IRQ handler for EINT16-31 to handle multiplexed interrupts. Inlining it should improve the performance a bit. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: exynos: Handle only unmasked wakeup interruptsTomasz Figa1-2/+5
A bit in EINTxx_PEND register is set regardless of interrupt mask, which causes spurious interrupts. To avoid them, the read value of pending register must be masked with current interrupt mask manually. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: exynos: Fix typos in gpio/wkup _irq_maskTomasz Figa1-2/+2
To mask GPIO/wakeup IRQ, the corresponding bit in mask register has to be set. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-21pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTaTomasz Figa2-0/+13
Pins used as GPIO interrupts need to be configured as EINTs. This patch adds the required configuration code to exynos_gpio_irq_set_type, to set the pin as EINT when its interrupt trigger is configured. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-19Merge branch 'drivers/ocp2scp' into next/driversArnd Bergmann8-5/+11
Merge patch from Santosh Shilimkar <santosh.shilimkar@ti.com>: * drivers/ocp2scp: drivers: bus: Move the OMAP interconnect driver to drivers/bus/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19drivers: bus: Move the OMAP interconnect driver to drivers/bus/Santosh Shilimkar8-5/+11
OMAP interconnect drivers are used for the interconnect error handling. Since they are bus driver, lets move it to newly created drivers/bus. Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-17Merge tag 'tegra-for-3.7-drivers-i2c' of ↵Olof Johansson1076-12725/+17271
git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/drivers From Stephen Warren: ARM: tegra: i2c driver enhancements mostly related to clocking This branch contains a number of fixes and cleanups to the Tegra I2C driver related to clocks. These are based on the common clock conversion in order to avoid duplicating the clock driver changes before and after the conversion. Finally, a bug-fix related to I2C_M_NOSTART is included. This branch is based on previous pull request tegra-for-3.7-common-clk. * tag 'tegra-for-3.7-drivers-i2c' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: i2c: tegra: dynamically control fast clk i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20 ARM: tegra: clock: remove unused clock entry for i2c ARM: tegra: clock: add connection name in i2c clock entry i2c: tegra: pass proper name for getting clock ARM: tegra: clock: add i2c fast clock entry in clock table ARM: Tegra: Add smp_twd clock for Tegra20 ARM: tegra: cpu-tegra: explicitly manage re-parenting ARM: tegra: fix overflow in tegra20_pll_clk_round_rate() ARM: tegra: Fix data type for io address ARM: tegra: remove tegra_timer from tegra_list_clks ARM: tegra30: clocks: fix the wrong tegra_audio_sync_clk_ops name ARM: tegra: clocks: separate tegra_clk_32k_ops from Tegra20 and Tegra30 ARM: tegra: Remove duplicate code ARM: tegra: Port tegra to generic clock framework ARM: tegra: Add clk_tegra structure and helper functions ARM: tegra: Rename tegra20 clock file ARM: tegra20: Separate out clk ops and clk data ARM: tegra30: Separate out clk ops and clk data ARM: tegra: fix U16 divider range check ... + sync to v3.6-rc4 Resolved remove/modify conflict in arch/arm/mach-sa1100/leds-hackkit.c caused by the sync with v3.6-rc4. Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-13i2c: tegra: dynamically control fast clkLaxman Dewangan1-7/+28
Tegra I2C driver enables the fast clock during initialization and does not disable till driver removed. Enable this clock before transfer and disable after transfer done. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20Laxman Dewangan1-14/+47
Tegra20 i2c controller does not support the continue transfer which implements the I2C_M_NOSTART functionality of i2c protocol mangling. Removing the I2C_M_NOSTART functionality support for Tegra20. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13ARM: tegra: clock: remove unused clock entry for i2cLaxman Dewangan1-8/+0
Tegra20 clock table have the entry for clock (tegra_i2c.x, "i2c") which is no more require as driver acquire clock with name of "div-clk" and "fast-clk". Remove these entries from table. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13ARM: tegra: clock: add connection name in i2c clock entryLaxman Dewangan2-9/+9
Add connection name "div-clk" for the i2c clock entry. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13i2c: tegra: pass proper name for getting clockLaxman Dewangan1-23/+23
Tegra's i2c controller require two clock sources named as div_clk and fast_clk. This change make sure that driver pass the correct clock's name when it acquires clock handle. Also change the variable name to reflect the correct clock handles. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13ARM: tegra: clock: add i2c fast clock entry in clock tableLaxman Dewangan2-0/+9
Tegra's i2c controller require two clock sources named as div-clk and fast-clk for proper operation. Currently, the entry of fast-clk is missing in tegra30 clock table and it is incorrectly named in the tegra20 clock table. Adds aliases to enable lookups for "fast-clk" to succeed. A later patch will remove the incorrectly named clock, once the driver is modified to use the new name. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-13ARM: Tegra: Add smp_twd clock for Tegra20Prashant Gaikwad3-0/+50
Clockevent's frequency is changed upon cpufreq change notification. It fetches local timer's rate to update the clockevent frequency. This patch adds local timer clock for Tegra20. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-11ARM: tegra: cpu-tegra: explicitly manage re-parentingStephen Warren1-1/+47
When changing a PLL's rate, it must have no active children. The CPU clock cannot be stopped, and CPU clock's divider is not used. The old clock driver used to handle this by internally reparenting the CPU clock onto a different PLL when changing the CPU clock rate. However, the new common-clock based clock driver does not do this, and probably cannot do this due to the locking issues it would cause. To solve this, have the Tegra cpufreq driver explicitly perform the reparenting operations itself. This is probably reasonable anyway, since such reparenting is somewhat a matter of policy (e.g. which alternate clock source to use, whether to leave the CPU clock a child of the alternate clock source if it's running at the desired rate), and hence is something more appropriate for the cpufreq driver than the core clock driver anyway. Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-11ARM: tegra: fix overflow in tegra20_pll_clk_round_rate()Stephen Warren1-1/+1
32-bit math isn't enough when e.g. *prate=12000000, and sel->n=1000. Use 64-bit math to prevent this. Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-07ARM: tegra: Fix data type for io addressPrashant Gaikwad1-6/+6
Warnings were generated because following commit changed data type for address pointer 195bbca ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors arch/arm/mach-tegra/tegra30_clocks.c: In function 'clk_measure_input_freq': arch/arm/mach-tegra/tegra30_clocks.c:418:2: warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast .../arch/arm/include/asm/io.h:88:20: note: expected 'volatile void *' but argument is of type 'unsigned int Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-07ARM: EXYNOS: Adds G-Scaler device from Device TreeShaik Ameer Basha4-0/+71
This patch adds, - 4 G-Scaler devices to the DT device list - G-Scaler specific entries to the machine file - binding documentation for G-Scaler entries Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07ARM: EXYNOS: Add clock support for G-ScalerShaik Ameer Basha1-0/+86
Add required clock support for G-Scaler for exynos5 Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Prathyush K <prathyush.k@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07ARM: EXYNOS: Enable pinctrl driver support for EXYNOS4 device tree enabled ↵Thomas Abraham1-0/+2
platform This enables support for Samsung and EXYNOS4 pinctrl driver for device tree enabled EXYNOS4 platforms. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoCThomas Abraham2-0/+494
Add pinctrl driver nodes for the three instances of pin controllers in SAMSUNG EXYNOS4210 SoC and add the pin group nodes available in the each of those three instances. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07ARM: EXYNOS: skip wakeup interrupt setup if pinctrl driver is usedThomas Abraham1-0/+26
Pinctrl driver includes support for configuring the external wakeup interrupts. On exynos platforms that use pinctrl driver, the setup of wakeup interrupts in the exynos platform code can be skipped. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07gpio: exynos4: skip gpiolib registration if pinctrl driver is usedThomas Abraham1-0/+21
Pinctrl driver, when enabled, registers all the gpio pins and hence the registration of gpio pins by this driver can be skipped. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07pinctrl: add exynos4210 specific extensions for samsung pinctrl driverThomas Abraham4-0/+782
Add information about the Exynos4210 pin banks and driver data which is used by the Samsung pinctrl driver. In addition to this, the support for external gpio and wakeup interrupt support is included and hooked up with the Samsung pinctrl driver. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-07pinctrl: add samsung pinctrl and gpiolib driverThomas Abraham5-0/+1329
Add a new device tree enabled pinctrl and gpiolib driver for Samsung SoC's. This driver provides a common and extensible framework for all Samsung SoC's to interface with the pinctrl and gpiolib subsystems. This driver supports only device tree based instantiation and hence can be used only on those Samsung platforms that have device tree enabled. This driver is split into two parts: the pinctrl interface and the gpiolib interface. The pinctrl interface registers pinctrl devices with the pinctrl subsystem and gpiolib interface registers gpio chips with the gpiolib subsystem. The information about the pins, pin groups, pin functions and gpio chips, which are SoC specific, are parsed from device tree node. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-09-06ARM: tegra: remove tegra_timer from tegra_list_clksStephen Warren2-2/+0
tegra_time is a struct sys_timer, not a struct clk, so can't be included in an array of struct clk *. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra30: clocks: fix the wrong tegra_audio_sync_clk_ops nameJoseph Lo2-2/+2
It should use tegra30_audio_sync_clk_ops for tegra30. It will cause the tegra30 use the wrong audio_sync_clk_ops when build a kernel with a tegra20 and tegra30 both supported kernel. And building error when a tegra30-only kernel. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra: clocks: separate tegra_clk_32k_ops from Tegra20 and Tegra30Joseph Lo4-3/+13
Currently the tegra20 and tegra30 share the same symbol for tegra_clk_32k_ops. This will cause a compile error when building a tegra20-only kernel image. Add tegra_clk_32k_ops for tegra20 and modify tegra30_clk_32k_ops for tegra30. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra: Remove duplicate codePrashant Gaikwad3-724/+0
Remove Tegra legacy clock framework code. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra: Port tegra to generic clock frameworkPrashant Gaikwad8-2345/+3057
This patch converts tegra clock code to generic clock framework in following way: - Implement clk_ops as required by generic clk framework. (tegraXX_clocks.c) - Use platform specific struct clk_tegra in clk_ops implementation instead of struct clk. - Initialize all clock data statically. (tegraXX_clocks_data.c) Legacy framework did not have recalc_rate and is_enabled functions. Implemented these functions. Removed init function. It's functionality is splitted into recalc_rate and is_enabled. Static initialization is used since slab is not up in .init_early and clock is needed to be initialized before clockevent/clocksource initialization. Macros redefined for clk_tegra. Also, single struct clk_tegra is used for all type of clocks (PLL, peripheral etc.). This is to move quickly to generic common clock framework so that other dependent features will not be blocked (such as DT binding). Enabling COMMON_CLOCK config moved to ARCH_TEGRA since it is enabled for both Tegra20 and Tegra30. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra: Add clk_tegra structure and helper functionsPrashant Gaikwad4-11/+210
Add Tegra platform specific clock structure clk_tegra and some helper functions for generic clock framework. struct clk_tegra is the single strcture used for all types of clocks. reset and cfg_ex ops moved to clk_tegra from clk_ops. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra: Rename tegra20 clock filePrashant Gaikwad2-1/+1
Make the name consistent with other files. s/tegra2/tegra20 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra20: Separate out clk ops and clk dataPrashant Gaikwad4-1042/+995
Move clock initialization data to separate file. This is required for migrating to generic clock framework if static initialization is used. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra30: Separate out clk ops and clk dataPrashant Gaikwad4-1133/+1210
Move clock initialization data to separate file. This is required for migrating to generic clock framework if static initialization is used. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra: fix U16 divider range checkStephen Warren1-1/+1
A U16 divider can divide a clock by 1..64K. However, the range-check in clk_div16_get_divider() limited the range to 1..256. Fix this. NVIDIA's downstream kernels already have the fixed range-check. In practice this is a problem on Whistler's I2C bus, which uses a bus clock rate of 100KHz (rather than the more common 400KHz on Tegra boards), which requires a HW module clock of 8*100KHz. The parent clock is 216MHz, leading to a desired divider of 270. Prior to conversion to the common clock framework, this range error was somehow ignored/irrelevant and caused no problems. However, the common clock framework evidently has more rigorous error-checking, so this failure causes the I2C bus to fail to operate correctly. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06ARM: tegra: turn on UART A clock at bootStephen Warren1-0/+1
Some boards use UART D for the main serial console, and some use UART A. UART D's clock is listed in board-dt-tegra20.c's clock table, whereas UART A's clock is not. This causes the clock code to think UART A's clock is unsed. The common clock framework turns off unused clocks at boot time. This makes the kernel appear to hang. Add UART A's clock into the clock table to prevent this. Eventually, this requirement should be handled by the UART driver, and/or properties in a board-specific device tree file. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-05Merge branch 'drivers/ocp2scp' into next/driversOlof Johansson1-1/+1
* drivers/ocp2scp: drivers: bus: omap-ocp2scp: Fix compile error
2012-09-05drivers: bus: omap-ocp2scp: Fix compile errorKishon Vijay Abraham I1-1/+1
Fixes: CC [M] drivers/bus/omap-ocp2scp.o drivers/bus/omap-ocp2scp.c:70:1: error: '__mod_of_device_table' aliased to undefined symbol 'omap_usb2_id_table' Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-01Linux 3.6-rc4Linus Torvalds1-1/+1
2012-09-01time: Move ktime_t overflow checking into timespec_valid_strictJohn Stultz2-5/+12
Andreas Bombe reported that the added ktime_t overflow checking added to timespec_valid in commit 4e8b14526ca7 ("time: Improve sanity checking of timekeeping inputs") was causing problems with X.org because it caused timeouts larger then KTIME_T to be invalid. Previously, these large timeouts would be clamped to KTIME_MAX and would never expire, which is valid. This patch splits the ktime_t overflow checking into a new timespec_valid_strict function, and converts the timekeeping codes internal checking to use this more strict function. Reported-and-tested-by: Andreas Bombe <aeb@debian.org> Cc: Zhouping Liu <zliu@redhat.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Prarit Bhargava <prarit@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: stable@vger.kernel.org Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-09-01Merge git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2-3/+7
Pull KVM bugfixes from Marcelo Tosatti. * git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: x86: fix KVM_GET_MSR for PV EOI kvm: Fix nonsense handling of compat ioctl
2012-09-01Merge tag 'parisc-fixes' of ↵Linus Torvalds3-7/+7
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6 Pull PARISC fixes from James Bottomley: "This is a set of two bug fixes. One is the ATOMIC problem which is now causing a compile failure in certain situations. The other is mishandling of PER_LINUX32 which may also cause user visible effects. Signed-off-by: James Bottomley <JBottomley@Parallels.com>" * tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6: [PARISC] fix personality flag check in copy_thread() [PARISC] Redefine ATOMIC_INIT and ATOMIC64_INIT to drop the casts
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