summaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2015-06-22ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et alVineet Gupta7-8/+230
2015-06-22ARC: make plat_smp_ops weak to allow over-ridesVineet Gupta1-1/+1
2015-06-22ARCv2: clocksource: Introduce 64bit local RTC counterVineet Gupta3-2/+62
2015-06-22ARCv2: extable: Enable sorting at build timeVineet Gupta1-0/+5
2015-06-22ARCv2: Adhere to Zero Delay loop restrictionVineet Gupta3-15/+41
2015-06-22ARCv2: optimised string/mem lib routinesClaudiu Zissulescu4-2/+411
2015-06-22ARCv2: MMUv4: support aliasing icache configVineet Gupta2-4/+14
2015-06-22ARCv2: MMUv4: cache programming model changesVineet Gupta4-18/+104
2015-06-22ARCv2: MMUv4: TLB programming Model changesVineet Gupta6-5/+114
2015-06-22ARCv2: STAR 9000814690: Really Re-enable interrupts to avoid deadlocksVineet Gupta1-0/+5
2015-06-22ARCv2: STAR 9000808988: signals involving Delay SlotVineet Gupta2-7/+12
2015-06-22ARCv2: STAR 9000793984: Handle return from intr to Delay SlotVineet Gupta3-0/+53
2015-06-22ARCv2: Support for ARCv2 ISA and HS38x coresVineet Gupta22-33/+737
2015-06-22ARCv2: [intc] HS38 core interrupt controllerVineet Gupta4-0/+282
2015-06-22ARC: uncached base is hard constant for ARC, don't save itVineet Gupta2-3/+2
2015-06-19ARC: intc: split into ARCompact ISA specific, common bitsVineet Gupta7-379/+412
2015-06-19ARC: Make way for pt_regs != user_regs_structVineet Gupta2-9/+137
2015-06-19ARC: entry.S: [arcompact] simplify SWITCH_TO_KERNEL_STKVineet Gupta1-36/+35
2015-06-19ARC: entry.S: use single EXCEPTION_PROLOGUEVineet Gupta1-8/+6
2015-06-19ARC: entry.S: micro-optimize Trap handlerVineet Gupta2-4/+5
2015-06-19ARC: entry.S: move some code around for cache locality in return pathVineet Gupta2-48/+52
2015-06-19ARC: entry.S: split into ARCompact ISA specific, common bitsVineet Gupta5-681/+711
2015-06-19ARC: entry.S: Ensure that restore_regs is local to compilation unitVineet Gupta1-4/+4
2015-06-19ARC: entry.S: comments cleanupVineet Gupta1-26/+20
2015-06-19ARC: entry.S: Trap handler to use r10 for syscall vs. brkpt decisionVineet Gupta1-2/+2
2015-06-19ARC: entry.S: FAKE_RET_FROM_EXCPN can always use r9Vineet Gupta2-21/+19
2015-06-19ARC: entry.S: confine EXCEPTION_* macros to one fileVineet Gupta2-15/+17
2015-06-19ARC: entry.S: canonical'ize EXCEPTION_{PROLOGUE,EPILOGUE}Vineet Gupta2-18/+3
2015-06-19ARC: entry.S: Introduce INTERRUPT_{PROLOGUE,EPILOGUE}Vineet Gupta3-79/+23
2015-06-19ARC: entry.S: common'ize scrtach reg freeup in intr + exceptionsVineet Gupta2-27/+18
2015-06-19ARC: untangle cache flush loopVineet Gupta1-25/+55
2015-06-19ARC: cacheflush: No need to retain DC_CTRL from __before_dc_op()Vineet Gupta1-20/+19
2015-06-19ARC: cacheflush: move some code around, delete old commentsVineet Gupta1-165/+102
2015-06-19ARC: mm/cache_arc700.c -> mm/cache.cVineet Gupta2-1/+1
2015-06-19ARC: [axs101] Add missing __init annotationsVineet Gupta1-6/+6
2015-06-19ARC: [axs101] STAR 9000799830: Fix SD cards supportAlexey Brodkin1-1/+19
2015-06-19ARC: [axs101] Tweak DDR port aperture mappings for performanceVineet Gupta1-4/+4
2015-06-19ARC: [axs101] support early 8250 uartVineet Gupta3-3/+5
2015-06-19ARC: [axs101] Add support for AXS101 SDP (software development platform)Alexey Brodkin11-0/+792
2015-06-19ARC: mm: document system mem map clearlyVineet Gupta2-20/+17
2015-06-19ARC: stack unwinder to bail if PC is not kernel modeVineet Gupta1-10/+8
2015-06-19ARC: perf: Remove unnecessary local variableTobias Klauser1-4/+2
2015-06-19arc: fix use of uninitialized arc_pmuMax Filippov1-1/+0
2015-06-19ARC: fix section mismatch with allyesconfigVineet Gupta1-1/+1
2015-06-19ARC: explicit'ify uboot supportVineet Gupta3-1/+18
2015-06-19ARC: [plat_arcfpga]->[plat_sim]Vineet Gupta9-25/+13
2015-06-19ARC: [arcfpga] RIP legacy ISS based SMP extensionVineet Gupta5-329/+0
2015-06-19ARC: compress cpuinfo_arc_mmu (mainly save page size in KB)Vineet Gupta2-5/+6
2015-06-19ARC: clocksource cleanupsVineet Gupta1-10/+2
2015-06-19ARC: RIP broken 64bit RTSCVineet Gupta7-63/+4
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-06 16:30:26 +0300