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2022-04-20dt-bingings:sd:update jh7110 sd dt-bingingsClivia.Cai1-1/+4
Add clock and reset for sdio1 nodes in device tree Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2022-04-19Merge branch 'CR_847_watchdog_xingyu.wu' into 'jh7110_fpga_dev_5.15'andy.hu9-568/+607
Cr 847 watchdog xingyu.wu See merge request sdk/sft-riscvpi-linux-5.10!9
2022-04-19driver:watchdog:Add config definition to different uses of board levelxingyu.wu2-20/+22
1. The watchdog driver can get different rate from clock by different board. 2. arch:riscv:Kconfig: Adjust the format. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-04-19driver:watchdog: Add clock & resetxingyu.wu2-19/+56
Add clock and reset in watchdog's driver and device tree. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-04-19clk:starfive: Adjust the formatxingyu.wu7-528/+528
Adjust and modify the clock driver's format Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-04-19Merge branch 'CR_786_CAN_clivia.cai' into 'jh7110_fpga_dev_5.15'andy.hu5-992/+816
Cr 786 can clivia.cai See merge request sdk/sft-riscvpi-linux-5.10!8
2022-04-19dt-bingings:can:update jh7110 can dt-bingings.Clivia.Cai1-7/+35
Update jh7110 can/canfd dt-bindings configuration Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2022-04-19riscv:defconfig: enable CAN,IPMS_CANClivia.Cai1-1/+2
Enable can/canfd config in defconfig. Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2022-04-19dt-bindings:net:can:ipms-can: add ipms-can.yaml referencesClivia.Cai1-0/+107
Add CAN/CANFD binding documentation for jh7110 SoC. Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2022-04-19can:ipms_can: fix code styleClivia.Cai1-984/+670
Optimize the can driver code to conform to the upstream specification Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2022-04-19dt-bindings: Add vendor prefixClivia.Cai1-0/+2
Add vendor prefix for can device Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2022-04-19Merge branch 'CR_864_update_pinctrl_jianlong' into 'jh7110_fpga_dev_5.15'andy.hu1-730/+1202
update pinctrl marco to more lines See merge request sdk/sft-riscvpi-linux-5.10!12
2022-04-19update pinctrl marco to more linesjianlong.huang1-730/+1202
Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2022-04-19Merge branch 'CR_870_Reset_samin.guo' into 'jh7110_fpga_dev_5.15'andy.hu3-55/+66
Cr 870 reset samin.guo See merge request sdk/sft-riscvpi-linux-5.10!11
2022-04-19Merge branch 'CR_833_VDEC_samin.guo' into 'jh7110_fpga_dev_5.15'andy.hu4-10/+11
CR 833 vdec samin.guo See merge request sdk/sft-riscvpi-linux-5.10!10
2022-04-19reset:starfive:jh7110: Fix wrong macro definition.samin2-6/+6
Fix wrong macro definition. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-04-19reset:starfive:jh7110: Macro definitions are rearranged in order.samin1-12/+9
Macro definitions are rearranged in order, for better coding style. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-04-19reset:starfive:jh7110: change how to obtain an assert addresssamin1-45/+59
Get assert addresses dynamically to reduce static array memory usage Signed-off-by: samin <samin.guo@starfivetech.com>
2022-04-18dt-bingings:clk: remove dec_rootclk fixed clk define.samin1-6/+0
The clktree is ready. The VDEC uses the clock signal defined by the clock tree, fixed-clk is not required. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-04-18dt-bingings:vdec:jh7110: Add CLK signals to Vdecsamin1-4/+9
Vdec uses the Clock framework API. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-04-15drivers:soc:starfive: support driver for starfive soc.samin2-0/+2
Add Kconfig/Makefile support for starfive soc. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-04-14Merge branch 'CR_783_dts_hal.feng' into 'jh7110_fpga_dev_5.15'andy.hu10-892/+1068
riscv: dts: starfive: Improve the structure of device tree See merge request sdk/sft-riscvpi-linux-5.10!5
2022-04-14riscv: dts: starfive: Improve the structure of device treeHal Feng10-892/+1068
Divide the old device tree into several files according to different layers. Make the device tree clearer and more readable. Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2022-04-14Merge branch 'CR_792_PINCTRL_jianlong' into 'jh7110_fpga_dev_5.15'andy.hu4-2/+128
modify pinctrl about vin_dvp function sel See merge request sdk/sft-riscvpi-linux-5.10!7
2022-04-14modify vin pinctrl dtsjianlong.huang1-1/+1
Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2022-04-13add dvp pinctrl dtsjianlong.huang1-0/+107
Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2022-04-13modify pinctrl about vin_dvp function seljianlong.huang3-2/+21
Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2022-04-13Merge branch 'CR_737_CLOCK_TREE_Xingyu.Wu' into 'jh7110_fpga_dev_5.15'andy.hu15-13/+2585
Cr 737 clock tree xingyu.wu See merge request sdk/sft-riscvpi-linux-5.10!6
2022-04-13arch:riscv:Kconfig: Add choice with SOC board typexingyu.wu6-24/+49
Add config about user can choose the board type about FPGA, EVB or Visionfive Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-04-13clk:starfive: Add vout clock tree driverxingyu.wu6-0/+348
Clock references refer to include/dt-bindings/clock/starfive-jh7110-vout.h Change the value about 'status' of clkvout node in dts file when want to use vout clock. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-04-13clk:starfive: Add JH7110 clock tree driver for kernel 5.15xingyu.wu12-13/+2212
Add clock driver about sys, stg and aon clock for JH7110. Clock references refer to include/dt-bindings/clock/starfive-jh7110-clkgen.h Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-04-13Merge branch 'CR_792_PINCTRL_jianlong' into 'jh7110_fpga_dev_5.15'andy.hu11-2/+3586
add jh7110 pinctrl dts and driver See merge request sdk/sft-riscvpi-linux-5.10!4
2022-04-12enable sdio pinctrcljianlong.huang1-0/+12
Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2022-04-07enable pinctrl and modify gpio irq initjianlonghuang4-6/+60
Signed-off-by: jianlonghuang <jianlong.huang@starfivetech.com>
2022-04-07[pinctrl]Synchronize vic7100&jh7110 pinctrl subsystem“jenny.zhang”6-101/+56
2022-04-07[pinctrl] Update parse gpio dts node“jenny.zhang”1-8/+1
2022-04-07[pinctrl]Update gpio control code“jenny.zhang”3-192/+162
2022-04-07[pinctrl] disable jh7110 pinctrl“jenny.zhang”1-1/+1
2022-04-07[pinctrl] 1.Update jh7110 pinctrl dts; 2.Adjust pinctrl coding style;“jenny.zhang”4-701/+748
2022-04-07[pinctrl] add jh7110 pinctrl dts and driver“jenny.zhang”9-0/+3553
2022-03-23Merge branch 'CR_730_RTC_samin.guo' into 'jh7110_dev_5.15'andy.hu1-30/+45
rtc: starfive: Get the interrupt status using Completion. See merge request sdk/sft-riscvpi-linux-5.10!3
2022-03-16rtc: starfive: Get the interrupt status using Completion.samin1-30/+45
starfiv rtc needs to get interrupt status when setting rtc clock and configuring hardware calibration. Use completion to identify states in interrupt handlers. In addition, when clearing the interrupt, you need to pull to determine whether to clear the state, otherwise the clearing will be unsuccessful. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-03-15Merge branch 'CR_722_DRM_keith.zhao' into 'jh7110_dev_5.15'andy.hu1-1/+1
riscv:driver:drm:DC8200 See merge request sdk/sft-riscvpi-linux-5.10!2
2022-03-14riscv:driver:drm:DC8200keith.zhao1-1/+1
fix build error caused by vs-drm.h modify SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note Signed-off-by:keith.zhao <keith.zhao@statfivetech.com>
2022-01-14riscv::starfive:driver:dc8200keith.zhao1-0/+50
add head file vs-drm.h Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
2022-01-14riscv:uboot:starfive:dc8200keith.zhao50-2/+16420
update drdc8200iver kenerl version from 5.10 to 5.13 Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
2022-01-14soc:starfive: add jh7110 pmu driver.samin4-0/+442
The JH7110 PMU can dynamically switch on or off power domians and set the power-on and power-off sequence. API Instructions refer to include/soc/starfive/jh7110_pmu.h Signed-off-by: samin <samin.guo@starfivetech.com>
2022-01-14dt-bingings:pmu:add jh7110 pmu dt-bingings.samin1-0/+8
Add jh7110 pmu support. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-01-131.add mailbox driver; 2.add mailbox test driver.shanlong.li6-1/+786
2022-01-13add patches for libkcapi toolHuan.Feng15-51/+1319
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