summaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2016-09-17clk: sunxi-ng: sun6i-a31: set CLK_SET_RATE_UNGATE for all PLLsChen-Yu Tsai1-10/+10
2016-09-17clk: sunxi-ng: sun6i-a31: Set CLK_SET_RATE_PARENT for display output clocksChen-Yu Tsai1-9/+13
2016-09-17drivers: clk: st: Handle clk synchronous mode for video clocksGabriel Fernandez2-2/+37
2016-09-17drivers: clk: st: Add clock propagation for audio clocksGabriel Fernandez2-1/+27
2016-09-17drivers: clk: st: Add fs660c32 synthesizer algorithmGabriel Fernandez1-69/+111
2016-09-17drivers: clk: st: Simplify clock binding of STiH4xx platformsGabriel Fernandez7-88/+65
2016-09-17drivers: clk: st: Remove stih415-416 clock supportGabriel Fernandez10-1639/+37
2016-09-15clk: at91: Migrate to clk_hw based registration and OF APIsStephen Boyd13-199/+277
2016-09-15clk: bcm2835: Migrate to clk_hw based registration and OF APIsStephen Boyd2-55/+58
2016-09-15clk: iproc: Make clocks visible optionsJon Mason3-6/+32
2016-09-14clk: xgene: Add PMD clockHoan Tran1-0/+221
2016-09-14Documentation: dt: xgene: Add PMD clock bindingHoan Tran1-0/+18
2016-09-14Merge branch 'clk-zte' into clk-nextStephen Boyd0-0/+0
2016-09-14clk: zx: register ZX296718 clocksJun Nie5-0/+1248
2016-09-14clk: zx: reform pll config info to ease code extensionJun Nie2-9/+16
2016-09-14clk: zx: register ZX296718 clocksJun Nie5-0/+1248
2016-09-14clk: zx: reform pll config info to ease code extensionJun Nie2-9/+16
2016-09-14clk-kona-setup: Use kmalloc_array() in parent_process()Markus Elfring1-2/+2
2016-09-14ARM: clk-imx35: annotate clk enum with number valuesUwe Kleine-König1-14/+16
2016-09-14ARM: clk-imx35: fix name for ckil clkUwe Kleine-König1-1/+1
2016-09-14clk: meson: fix CLKID_GCLK_VENCI_INT typoArnd Bergmann1-1/+1
2016-09-14clk: mmp: add missing header dependenciesBaoyou Xie1-0/+1
2016-09-14Merge tag 'clk-renesas-for-v4.9-tag3' of git://git.kernel.org/pub/scm/linux/k...Stephen Boyd3-2/+32
2016-09-14meson: clk: Use builtin_platform_driver to simplify the codeWei Yongjun1-5/+1
2016-09-14Merge tag 'sunxi-clk-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd24-79/+3860
2016-09-14Merge tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung into clk-...Stephen Boyd13-288/+453
2016-09-12clk: renesas: r8a7796: Add CMT clocksBui Duc Phuc1-0/+4
2016-09-12clk: renesas: r8a7795: Add CMT clocksBui Duc Phuc1-0/+4
2016-09-12clk: renesas: r8a7796: Add RAVB clockLaurent Pinchart1-0/+1
2016-09-10clk: sunxi-ng: Add hardware dependencyJean Delvare1-0/+1
2016-09-10clk: sunxi-ng: Add A23 CCUMaxime Ripard4-0/+751
2016-09-10clk: sunxi-ng: Add A33 CCU supportMaxime Ripard7-0/+1071
2016-09-10clk: sunxi-ng: Add N-class clocks supportMaxime Ripard4-0/+173
2016-09-10clk: sunxi-ng: mux: Add mux table macroMaxime Ripard1-13/+13
2016-09-10clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard5-33/+55
2016-09-10clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structureMaxime Ripard1-0/+14
2016-09-10clk: sunxi-ng: div: Add mux table macrosMaxime Ripard1-7/+21
2016-09-09clk: rk808: Pass the right pointer as the get_hw contextTomeu Vizoso1-1/+1
2016-09-09clk: samsung: Add support for EPLL on exynos5410Sylwester Nawrocki4-10/+144
2016-09-09clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanupSylwester Nawrocki1-7/+4
2016-09-09clk: samsung: clk-exynos-audss: Add exynos5410 compatibleSylwester Nawrocki2-1/+12
2016-09-09clk: samsung: clk-exynos-audss: controller variant handling reworkSylwester Nawrocki1-27/+37
2016-09-09clk: samsung: Use common registration function for pll2550xSylwester Nawrocki4-49/+15
2016-09-09clk: samsung: exynos5410: Expose the peripheral DMA gate clocksSylwester Nawrocki1-0/+2
2016-09-09clk: samsung: exynos5420: Add clocks for CMU_CDREX domainChanwoo Choi1-0/+37
2016-09-09clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify codeChanwoo Choi1-20/+13
2016-09-09clk: samsung: exynos5260: Move struct samsung_cmu_info to init sectionChanwoo Choi1-175/+175
2016-09-09MAINTAINERS: Add myself as Samsung SoC clock drivers co-maintainerChanwoo Choi1-0/+3
2016-09-09clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocksSylwester Nawrocki1-0/+3
2016-09-09clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller)Chanwoo Choi1-1/+10