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2016-09-14Merge tag 'renesas-arm64-dt-for-v4.9' of ↵Arnd Bergmann15-58/+6532
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Pull "Renesas ARM64 Based SoC DT Updates for v4.9" from Simon Horman: Clean up: * Remove unnecessary cap-mmc-highspeed property from SDHI nodes on r8a7795 SoC * Add SoC-specific compatible property to audio-dmac nodes on r8a7795 SoC New Board: * Add r8a7794/h3ulcb board Enablement: * Add PFC and GPIO to r8a7796 SoC * Enable DU and USB 2.0 on r8a7795/salvator-x board * Add VTP, FCPV, FCPF and FDP1 to r8a7795 SoC * Set maximum frequency for SDHI clocks on r8a7795 SoC * tag 'renesas-arm64-dt-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits) arm64: dts: r8a7796: Add GPIO device nodes arm64: dts: r8a7796: salvator-x: add serial console pins arm64: dts: r8a7796: Add pinctrl device node arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB output arm64: dts: h3ulcb: enable GPIO leds arm64: dts: h3ulcb: Sound SSI support arm64: dts: h3ulcb: enable SDHI0 arm64: dts: h3ulcb: enable GPIO keys arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed property arm64: dts: h3ulcb: enable USB2.0 Host channel 1 arm64: dts: h3ulcb: enable USB2 PHY of channel 1 arm64: dts: h3ulcb: enable WDT arm64: dts: h3ulcb: enable EXTALR clk arm64: dts: h3ulcb: enable I2C2 arm64: dts: h3ulcb: enable EthernetAVB arm64: dts: h3ulcb: enable SCIF clk and pins arm64: dts: h3ulcb: initial device tree arm64: dts: h3ulcb: add H3ULCB board DT bindings arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodes arm64: dts: r8a7795: renesas: salvator-x: Enable DU ...
2016-09-14Merge tag 'amlogic-dt64' of ↵Arnd Bergmann12-3/+575
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late Pull "Amlogic 64-bit DT changes for v4.9" from Kevin Hilman: - add watchdog, reset, IR remote, PWM - add secure monitor and eFuse - add always-on (AO) domain clock and reset * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: amlogic: gxbb: Enable NVMEM documentation: Add nvmem bindings documentation ARM64: dts: amlogic: gxbb: Enable secure monitor documentation: Add secure monitor bindings documentation ARM64: dts: meson-gxbb: Add PWM pinctrl nodes ARM64: dts: meson-gxbb: Enable the the IR decoder on supported boards ARM64: dts: meson-gxbb: Add Infrared Remote Controller decoder dt-bindings: media: meson-ir: Add Meson8b and GXBB compatible strings ARM64: dts: amlogic: add the input pin for the IR remote ARM64: dts: meson-gxbb: Add GXBB AO Clock and Reset node clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe() clk: meson: Add GXBB AO Clock and Reset controller driver dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings ARM64: DTS: meson-gxbb: switch ethernet to real clock ARM64: dts: amlogic: meson-gxbb: Add watchdog node
2016-09-13Merge tag 'sunxi-dt-for-4.9-2' of ↵Arnd Bergmann58-1247/+7052
https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/late Merge "Allwinner DT changes for 4.9, take 2" from Maxime Ripard: A second set of device tree changes, this time switching a few SoCs to the new sunxi-ng clock framework. We also added the support for a new SoC (NextThing GR8 and its evaluation board), and the support for the DRM driver in the A33. To maintain bisectability, while avoiding some un-trivial merge conflicts, I had to merge the clk branch that I've sent a PR to Mike and Stephen. This branch will of course be stable. * tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (53 commits) ARM: dts: gr8: Add support for the GR8 evaluation board ARM: dts: Add NextThing GR8 dtsi ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi ARM: sun8i: a23/a33: Add RGB666 pins ARM: sun8i: a33: Add display pipeline ARM: sun8i: Convert the A23 and A33 to the CCU ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings clk: sunxi-ng: Add hardware dependency clk: sunxi-ng: Add A23 CCU clk: sunxi-ng: Add A33 CCU support clk: sunxi-ng: Add N-class clocks support clk: sunxi-ng: mux: Add mux table macro clk: sunxi-ng: div: Allow to set a maximum clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure clk: sunxi-ng: div: Add mux table macros devicetree: Add vendor prefix for FriendlyARM ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2 ...
2016-09-11ARM: dts: gr8: Add support for the GR8 evaluation boardMylène Josserand2-0/+343
The GR8-EVB is a small board with an NextThing GR8, an Hynix MLC NAND, an AXP209 PMIC, USB host and OTG, an SPDIF output and a connectors for CSI, I2S and LCD. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-11ARM: dts: Add NextThing GR8 dtsiMylène Josserand1-0/+1087
The GR8 is an SoC made by Nextthing loosely based on the sun5i family. Since it's not clear yet what we can factor out and merge with the A10s and A13 support, let's keep it out of the sun5i.dtsi include tree. We will figure out what can be shared when things settle down. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsiChen-Yu Tsai3-64/+50
The usbphy and usb_otg nodes in the A23 and A33 dts files only differ by compatible, and for the usbphy, the size of one of its register regions. Move all the common bits to the A23/A33 common dtsi file. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-10ARM: sun8i: a23/a33: Add RGB666 pinsMaxime Ripard1-0/+10
The LCD output needs to be muxed. Add the proper pinctrl node. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10ARM: sun8i: a33: Add display pipelineMaxime Ripard1-0/+152
Add all the needed blocks to the A33 DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10ARM: sun8i: Convert the A23 and A33 to the CCUMaxime Ripard3-306/+75
Now that we have support for the CCU driver in sunxi-ng, convert the A23 and A33 DTs to that driver. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10ARM: dts: sun6i: switch A31/A31s to new CCU clock bindingsChen-Yu Tsai1-327/+97
Now that we have a different clock representation, switch to it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-10Merge branch 'sunxi/clk-for-4.9' into sunxi/dt-for-4.9Maxime Ripard24-79/+3860
2016-09-10clk: sunxi-ng: Add hardware dependencyJean Delvare1-0/+1
The sunxi-ng clock driver is useless for other architectures. Signed-off-by: Jean Delvare <jdelvare@suse.de> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-10clk: sunxi-ng: Add A23 CCUMaxime Ripard4-0/+751
Add support for the clock unit found in the A23. Due to the similarities with the A33, it also shares its clock IDs to allow sharing the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: Add A33 CCU supportMaxime Ripard7-0/+1071
This commit introduces the clocks found in the Allwinner A33 CCU. Since this SoC is very similar to the A23, and we share a significant share of the DTSI, the clock IDs that are going to be used will also be shared with the A23, hence the name of the various header files. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: Add N-class clocks supportMaxime Ripard4-0/+173
Add support for the class with a single factor, N, being a multiplier. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: mux: Add mux table macroMaxime Ripard1-13/+13
Add a new macro to declare muxes based on a table and a gate. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard5-33/+55
Some dividers might have a maximum value that is lower than the width of the register. Add a field to _ccu_div to handle those case properly. If the field is set to 0, the code will assume that the maximum value is the maximum one that can be used with the field register width. Otherwise, we'll use whatever value has been set. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-10clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structureMaxime Ripard1-0/+14
The internal _ccu_div structure is meant to be embedded into other structures to combine the various dividers and to form the clock classes support. Start to document those structures by using kerneldoc. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-10clk: sunxi-ng: div: Add mux table macrosMaxime Ripard1-7/+21
Add some macros to ease the declaration of clocks that are using them. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-09-08arm64: dts: r8a7796: Add GPIO device nodesTakeshi Kihara1-0/+112
Add GPIO device nodes to the DT of the r8a7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-09-08arm64: dts: r8a7796: salvator-x: add serial console pinsUlrich Hecht1-0/+16
Adds pin control for SCIF2. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: r8a7796: Add pinctrl device nodeTakeshi Kihara1-0/+5
This patch adds pinctrl device node for R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: r8a7795: salvator-x: Configure pins for the DU RGB outputLaurent Pinchart1-0/+7
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable GPIO ledsVladimir Barinov1-0/+11
This supports GPIO leds on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: Sound SSI supportVladimir Barinov1-0/+118
This supports SSI sound for H3ULCB board. SSI DMA mode used. CS2000 used as AUDIO_CLK_B. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable SDHI0Vladimir Barinov1-0/+49
This supports SDHI0 on H3ULCB board SD card slot Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable GPIO keysVladimir Barinov1-0/+13
This supports GPIO keys on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed propertySimon Horman1-2/+0
Remove cap-mmc-highspeed property from SDHI2 and SDHI3. This property is unnecessary as the driver automatically sets the highspeed capability. Furthermore its use is inconsistent with SDHI0 and SDHI1 which are also highspeed capable but do not have this property present. Found by inspection. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-08arm64: dts: h3ulcb: enable USB2.0 Host channel 1Vladimir Barinov1-0/+8
This supports USB2.0 Host channel 1 on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable USB2 PHY of channel 1Vladimir Barinov1-0/+12
This supports USB2 PHY channel #1 on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable WDTVladimir Barinov1-0/+5
This supports watchdog timer for H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable EXTALR clkVladimir Barinov1-0/+4
This enables EXTALR clock that can be used for the watchdog. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable I2C2Vladimir Barinov1-0/+12
This supports I2C2 bus on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable EthernetAVBVladimir Barinov1-0/+32
This supports Ethernet AVB on H3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: enable SCIF clk and pinsVladimir Barinov1-0/+13
This enables the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: initial device treeVladimir Barinov2-1/+52
Add the initial device tree for the R8A7795 SoC based H3ULCB low cost board. This commit supports the following peripherals: - SCIF (console) Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: h3ulcb: add H3ULCB board DT bindingsVladimir Barinov1-0/+2
Add H3ULCB Device tree bindings Documentation, listing it as a supported board. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodesGeert Uytterhoeven1-2/+4
The audio-dmac nodes used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: renesas: salvator-x: Enable DULaurent Pinchart1-0/+44
Only the VGA output is supported for now. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add DU device to DTLaurent Pinchart1-0/+46
Add the DU device to r8a7795.dtsi in a disabled state. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add VSP instancesLaurent Pinchart1-0/+90
The r8a7795 has 9 VSP instances. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add FCPV nodesLaurent Pinchart1-0/+63
The FCPs handle the interface between various IP cores and memory. Add the instances related to the VSP2s. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: salvator-x: enable HSUSBYoshihiro Shimoda1-0/+4
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: salvator-x: enable USB 2.0 Host channel 0Yoshihiro Shimoda1-0/+8
We have to set SW15 to pin 2-3 side on the board before we use CN9 as USB host or peripheral. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: salvator-x: enable usb2_phy of channel 0Yoshihiro Shimoda1-0/+24
This patch also adds a regulator node for USB2.0 to handle VBUS on/off by the phy-rcar-gen3-usb2 driver. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: Add HSUSB device nodeYoshihiro Shimoda1-0/+17
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: set maximum frequency for SDHI clocksWolfram Sang1-0/+4
Define the upper limit otherwise the driver cannot utilize max speeds. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: add FDP1 device nodesKieran Bingham1-0/+27
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: add FCPF device nodesKieran Bingham1-0/+21
Provide nodes for the FCP devices dedicated to the FDP device channels. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06devicetree: Add vendor prefix for FriendlyARMJames Pettigrew1-0/+1
Guangzhou FriendlyARM Computer Tech Co., Ltd is a Chinese ARM board vendor. Signed-off-by: James Pettigrew <james@innovum.com.au> Reviewed-by: Rask Ingemann Lambertsen <ccc94453@vip.cybercity.dk> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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