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2014-07-09ARM: at91: move at91sam9263 SoC to the CCFAlexandre Belloni1-1/+0
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9263 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clock implementation. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sam9263: define clocksAlexandre Belloni1-0/+311
Define the at91sam9263 clocks in the SoC dtsi file. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91: prepare common clk transition for sam9263Alexandre Belloni1-1/+5
Enclose the sam9263 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91) #endif" Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: cosino define crystals frequenciesAlexandre Belloni1-0/+8
Define Cosino boards main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: pm9g45: crystals frequenciesAlexandre Belloni1-0/+8
Define Ronetix pm9g45 main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sam9m10g45ek: define crystals frequenciesAlexandre Belloni1-0/+8
Define at91sam9m10g45ek main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91: move at91sam9g45 SoC to the CCFAlexandre Belloni1-1/+0
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9g45 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clock implementation. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sam9g45: define clocksAlexandre Belloni1-1/+341
Define the at91sam9g45 clocks in the SoC dtsi file. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91: prepare common clk transition for sam9g45Alexandre Belloni1-1/+5
Enclose the sam9g45 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91) #endif" Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: kizbox: define main crystal frequencyAlexandre Belloni1-0/+4
Define kizbox board's main crystal frequency. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: animeo_ip: define crystals frequenciesAlexandre Belloni1-0/+8
Define Somfy Animeo IP main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: ethernut5: define crystals frequenciesAlexandre Belloni1-0/+10
Define egnite Ethernut 5 main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: evk-pro3: define slow crytal frequencyAlexandre Belloni1-0/+6
Define Telit EVK-PRO3 slow crystal frequency Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: aks-cdu: define slow crytal frequencyAlexandre Belloni1-0/+6
Define AK signal CDU slow crystal frequency Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: ge863-pro3: define main crystal frequencyAlexandre Belloni1-0/+4
Define Telit GE863-PRO3 main crystal frequency. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: mpa1600: define crytals frequenciesAlexandre Belloni1-0/+8
Define Phontech MPA 1600 main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: qil_a9260: define crystals frequenciesAlexandre Belloni1-0/+8
Define Calao QIL-A9260 main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: tny_a9260: define crystals frequenciesAlexandre Belloni1-0/+8
Define Calao TNY-A9260 and TNY-A9G20 main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: usb_a9260: define crystals frequenciesAlexandre Belloni1-0/+8
Define Calao USB-A9260, USB-A9G20 and USB-A9G20-LPW main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: foxg20: define crystals frequenciesAlexandre Belloni1-0/+8
Define Acme Systems srl Fox G20 main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: at91sam9g20ek: define crystals frequenciesAlexandre Belloni1-0/+8
Define at91sam9g20ek main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91: move at91sam9260 SoCs to the CCFAlexandre Belloni1-1/+0
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91sam9260 SoCs support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clk implementation. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sam9g20: define clocksAlexandre Belloni1-0/+24
Define the at91sam9g20 clocks that differ from at91sam9260 in the SoC dtsi file. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sam9260: define clocksAlexandre Belloni1-1/+313
Define the at91sam9260 clocks in the SoC dtsi file. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91: prepare common clk transition for sam9260Alexandre Belloni1-1/+5
Enclose the sam9260 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91) #endif" Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: at91rm9200ek: define crystals frequenciesAlexandre Belloni1-0/+8
Define at91rm9200ek main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91: move at91rm9200 SoC to the CCFAlexandre Belloni1-1/+0
This patch removes the selection of AT91_USE_OLD_CLK when selecting at91rm9200 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clk implementation. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: rm9200: define clocksAlexandre Belloni1-0/+304
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91: prepare common clk transition for rm9200Alexandre Belloni1-1/+5
Enclose the rm9200 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91) #endif" Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: ariag25: define crystals frequenciesAlexandre Belloni1-0/+8
Define Acme Systems Aria G25 board main and slow crystals frequencies. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09Documentation: dt: document all the atmel pmc compatiblesAlexandre Belloni1-1/+4
Documentation for atmel-pmc only list one compatible, add the remaining compatible strings. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2014-07-09ARM: at91/dt: add NAND + DMA property for at91sam9rlNicolas Ferre1-0/+1
Add the "atmel,nand-has-dma" property to NAND node Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2014-07-09ARM: at91/dt: add DMA controller node to at91sam9rlNicolas Ferre1-0/+9
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2014-07-09ARM: at91: at91sam9n12ek: switch sound to CCFBo Shen1-0/+2
As the at91sam9n12ek has switch to CCF, so add clock for wm8904 Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviwed-by: Mark Brown <broonie@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91: sama5d3xek: switch sound to CCFBo Shen1-0/+2
As the sama5d3xek board has switch to CCF, so add clock for wm8904 Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviwed-by: Mark Brown <broonie@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sama5d3 crystals under the clocks nodeAlexandre Belloni3-21/+25
Having clocks grouped in a subnode is common practice, so move the crystals under a clocks node for the sama5d3 SoC and sama5d3 based boards. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sam9x5 crystals under the clocks nodeAlexandre Belloni2-19/+23
Having clocks grouped in a subnode is common practice, so move the crystals and the ADC clock under a clocks node for the at91sam9x5 SoC and at91sam9x5 based boards. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sam9rl crystals under the clocks nodeAlexandre Belloni2-20/+19
Having clocks grouped in a subnode is common practice, so move the crystals under a clocks node for the at91sam9rl SoC and at91sam9rl based boards. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sam9n12 crystals under the clocks nodeAlexandre Belloni2-17/+19
Having clocks grouped in a subnode is common practice, so move the crystals under a clocks node for the at91sam9n12 SoC and at91sam9n12 based boards. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-07-09ARM: at91/dt: sam9261 crystals under the clocks nodeAlexandre Belloni2-17/+19
Having clocks grouped in a subnode is common practice, so move the crystals under a clocks node for the at91sam9261 SoC and at91sam9261 based boards. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-06-30Linux 3.16-rc3Linus Torvalds1-1/+1
2014-06-30Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds6-6/+45
Pull ARM fixes from Russell King: "Another round of ARM fixes. The largest change here is the L2 changes to work around problems for the Armada 37x/380 devices, where most of the size comes down to comments rather than code. The other significant fix here is for the ptrace code, to ensure that rewritten syscalls work as intended. This was pointed out by Kees Cook, but Will Deacon reworked the patch to be more elegant. The remainder are fairly trivial changes" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8087/1: ptrace: reload syscall number after secure_computing() check ARM: 8086/1: Set memblock limit for nommu ARM: 8085/1: sa1100: collie: add top boot mtd partition ARM: 8084/1: sa1100: collie: revert back to cfi_probe ARM: 8080/1: mcpm.h: remove unused variable declaration ARM: 8076/1: mm: add support for HW coherent systems in PL310 cache
2014-06-30MAINTAINERS: exceptions for Documentation maintainerRandy Dunlap1-0/+3
Note that I don't maintain Documentation/ABI/, Documentation/devicetree/, or the language translation files. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-06-30Documentation: add section about git to email-clients.txtDan Carpenter1-0/+11
These days most people use git to send patches so I have added a section about that. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-06-29ARM: 8087/1: ptrace: reload syscall number after secure_computing() checkWill Deacon1-3/+4
On the syscall tracing path, we call out to secure_computing() to allow seccomp to check the syscall number being attempted. As part of this, a SIGTRAP may be sent to the tracer and the syscall could be re-written by a subsequent SET_SYSCALL ptrace request. Unfortunately, this new syscall is ignored by the current code unless TIF_SYSCALL_TRACE is also set on the current thread. This patch slightly reworks the enter path of the syscall tracing code so that we always reload the syscall number from current_thread_info()->syscall after the potential ptrace traps. Acked-by: Kees Cook <keescook@chromium.org> Tested-by: Kees Cook <keescook@chromium.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29ARM: 8086/1: Set memblock limit for nommuLaura Abbott1-0/+1
Commit 1c2f87c (ARM: 8025/1: Get rid of meminfo) changed find_limits to use memblock_get_current_limit for calculating the max_low pfn. nommu targets never actually set a limit on memblock though which means memblock_get_current_limit will just return the default value. Set the memblock_limit to be the end of DDR to make sure bounds are calculated correctly. Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29ARM: 8085/1: sa1100: collie: add top boot mtd partitionAndrea Adami1-0/+5
The CFI mapping is now perfect so we can expose the top block, read only. There isn't much to read, though, just the sharpsl_params values. Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29ARM: 8084/1: sa1100: collie: revert back to cfi_probeAndrea Adami1-1/+1
Reverts commit d26b17edafc45187c30cae134a5e5429d58ad676 ARM: sa1100: collie.c: fall back to jedec_probe flash detection Unfortunately the detection was challenged on the defective unit used for tests: one of the NOR chips did not respond to the CFI query. Moreover that bad device needed extra delays on erase-suspend/resume cycles. Tested personally on 3 different units and with feedback of two other users. Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29ARM: 8080/1: mcpm.h: remove unused variable declarationNicolas Pitre1-2/+0
The sync_phys variable has been replaced by link time computation in mcpm_head.S before the code was submitted upstream. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29ARM: 8076/1: mm: add support for HW coherent systems in PL310 cacheThomas Petazzoni2-0/+34
When a PL310 cache is used on a system that provides hardware coherency, the outer cache sync operation is useless, and can be skipped. Moreover, on some systems, it is harmful as it causes deadlocks between the Marvell coherency mechanism, the Marvell PCIe controller and the Cortex-A9. To avoid this, this commit introduces a new Device Tree property 'arm,io-coherent' for the L2 cache controller node, valid only for the PL310 cache. It identifies the usage of the PL310 cache in an I/O coherent configuration. Internally, it makes the driver disable the outer cache sync operation. Note that technically speaking, a fully coherent system wouldn't require any of the other .outer_cache operations. However, in practice, when booting secondary CPUs, these are not yet coherent, and therefore a set of cache maintenance operations are necessary at this point. This explains why we keep the other .outer_cache operations and only ->sync is disabled. While in theory any write to a PL310 register could cause the deadlock, in practice, disabling ->sync is sufficient to workaround the deadlock, since the other cache maintenance operations are only used in very specific situations. Contrary to previous versions of this patch, this new version does not simply NULL-ify the ->sync member, because the l2c_init_data structures are now 'const' and therefore cannot be modified, which is a good thing. Therefore, this patch introduces a separate l2c_init_data instance, called of_l2c310_coherent_data. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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