summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2016-05-12ARM: dts: Add non-removable to hsmmc on hp-t410Nicolas Chauvet1-0/+1
This will clean-up warnings at boot, since either that or cd-gpio{,s} are mandated by the dts specification of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@47810000[0]' of_get_named_gpiod_flags: can't parse 'cd-gpio' property of node '/ocp/mmc@47810000[0]' v2: use the generic non-removable instead of ti,non-removable Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: Fix ldo7 source for HDMI on igepv5Tony Lindgren1-0/+16
Fix ldo7 source for HDMI on igepv5. Suggested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: Fix uart wakeirq on omap5 by removing WAKEUP_EN for omapsTony Lindgren5-10/+10
The padconf register WAKEUP_EN is now handled in a generic way using Linux wakeirqs where pinctrl-single toggles the WAKEUP_EN bit when a wakeirq is enabled or disabled. At least omap5 gets confused if the WAKEUP_EN bit is set and the pin is not claimed as a wakeirq. The end result is that wakeirqs don't work properly as there is nothing handling the wakeirq. So let's just remove the WAKEUP_EN usage from dts files. Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-12ARM: dts: Fix igepv5 audiopwon-gpioTony Lindgren3-1/+22
Playing audio works on omap5-uevm, but produces an "Unhandled fault: imprecise external abort (0x1406) at 0x00000000" error on igepv5. Looks like the twl6040 audpwron GPIO pin is different for these boards. Let's fix the issue by configuring the audpwron in the board specific dts file. Cc: Agustí Fontquerni <af@iseebcn.com> Cc: Eduard Gavin <egavin@iseebcn.com> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Acked-by: Peter Ujfalusi <peter.ujflausi@ti com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-05-06ARM: dts: omap5-board-common: Describe the voltage supply mapping accuratelyNishanth Menon1-0/+43
OMAP5uEVM based platforms share a similar voltage rail map. This should be properly described in device tree, without this regulator core will be unable to determine the source voltage of LDOs such as LDO9 and SMPS10 which could be configured for bypass depending on the voltage requested of them. This results in conditions such as: ldo9: bypassed regulator has no supply! ldo9: failed to get the current voltage(-517) palmas-pmic 48070000.i2c:palmas@48:palmas_pmic: failed to register 48070000.i2c:palmas@48:palmas_pmic regulator Cc: Agustí Fontquerni <af@iseebcn.com> Cc: Eduard Gavin <egavin@iseebcn.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> [tony@atomide.com: fixed to use palmas style in-supply] Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-28ARM: dts: am57xx-idk: Include Industrial grade thermal thresholdsKeerthy1-0/+2
am57xx-idk have Industrial grade samples whose thermal thresholds are different as compared with dra7. Hence correcting the same. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-28ARM: dts: am57xx-beagle-x15: Include the commercial grade thresholdsKeerthy1-0/+1
am57xx-beagle-x15 have commercial grade samples whose thermal thresholds lower than dra7. Hence correcting the same. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-28ARM: dts: am57xx: Introduce industrial grade thermal thresholdsKeerthy1-0/+23
The silicon version ES2.0 onwards are industrial grade samples and have higher thermal thresholds than commecial grade samples. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-28ARM: dts: am57xx: Introduce commercial grade thermal thresholdsKeerthy1-0/+23
The silicon versions which are non ES2.0 are commercial grade silicon and have lower thermal thresholds. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: add DTS for Baltos IR2110Yegor Yefremov2-0/+72
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: add DTS for Baltos IR3220Yegor Yefremov2-0/+120
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: split am335x-baltos-ir5221 into dts and dtsi filesYegor Yefremov2-386/+409
Introduce am335x-baltos.dtsi, that provides common configuration for the whole device family based on the same SODIMM module. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHzVignesh R3-8/+11
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: dra7x: Remove QSPI pinmuxVignesh R2-31/+0
DRA7 family of processors from Texas Instruments, have a hardware module called IODELAYCONFIG Module which is expected to be configured. This block allows very specific custom fine tuning for electrical characteristics of IO pins that are necessary for functionality and device lifetime requirements. IODelay module has it's own register space with registers to configure various pins. According to AM572x TRM SPRUHZ6E October 2014–Revised January 2016[1] section 18.4.6.1 Pad Configuration, in addition to pinmuxing(MUXMODE), when operating a pad in certain mode, Virtual/Manual IO Timing Mode must also be configured to ensure that IO timings are met (DELAYMODE and MODESELECT fields of pad's IODELAYCONFIG module register). According to section 18.4.6.1.7 Isolation Requirements of above TRM, when reprogramming MUXMODE, DELAYMODE, and MODESELECT fields, there is a potential for a significant glitch on the corresponding IO. It is hence recommended to do this with I/O isolation (which can only be done in initial stages of bootloader). QSPI is one such module that requires IODELAY configuration. So, this patch removes the pinmux for QSPI for DRA74/DRA72 EVM as it needs to be done in bootloader (U-Boot) and cannot be done in kernel. Users should migrate to U-Boot v2016.05-rc1 or higher. [1] http://www.ti.com/lit/ug/spruhz6e/spruhz6e.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: omap5-board-common: describe gpadc for PalmasH. Nikolaus Schaller1-0/+10
tested on OMP5432 EVM Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: twl6030: describe gpadcH. Nikolaus Schaller1-0/+6
tested on Pandaboard ES. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: dra7xx: Fix compatible string for PCF8575 chipRoger Quadros2-5/+5
The boards use a TI variant of the PCF8575 so specify that in the compatible string. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: AM57xx/DRA7: Update SoC voltage rail limits to match data sheetNishanth Menon3-5/+5
As per the data sheet starting from SPRUHQ0H (Nov 2015 - Latest[1]), VDD_CORE can vary from 0.85v to 1.15v for AVS class0. VDD GPU/DSP et.al. can range from 0.85v to 1.25V with AVS class0 Since dynamic voltage scaling is disabled for DRA7/AM57xx SoCs for all SoC rails other than MPU, the bootloader is responsible for setting up the AVS class0 voltage, however, with wrong voltage machine constraints in dtb, regulator framework will lower the voltage below the required voltage levels for certain samples in production flow. This can cause catastrophic failures which can be pretty hard to identify. Update board files which don't match required specification. [1] http://www.ti.com/product/AM5728/datasheet/specifications#SPRT637-7340 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: OMAP36xx: : DT spelling s/#address-cell/#address-cells/Geert Uytterhoeven1-1/+1
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: omap5-cm-t54: DT spelling s/interrupt-name/interrupt-names/Geert Uytterhoeven1-1/+1
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-26ARM: dts: omap5-board-common: DT spelling s/interrupt-name/interrupt-names/Geert Uytterhoeven1-1/+1
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-14ARM: dts: Add support for dra72-evm rev C (SR2.0)Nishanth Menon4-826/+921
DRA72-EVM now has an upgrade to Rev C with SR2.0 silicon. As part of this change, a few updates were factored in that were software incompatible with previous board in few areas: - We now use DP83867 ethernet phy instead of older DP838865 which fails in certain use cases. - Two Ethernet ports now instead of the single one in rev B. - polarities changed for certain pcf gpios - Due to SoC phy current requirements, VDDA supplies are split between ldo3 and ldo2 (ldo2 was previously unused). NOTE: DSS (VDDA_VIDEO) is still supplied by ldo5, HDMI is now supplied by LDO2 instead of using LDO3. NOTE: It does not make much sense to spin off a new board compatible flag since there is no real benefit for the same. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-14ARM: dts: am335x-chilisom: Enable poweroff PMIC sequence using RTC signalMarcin Niestroj1-0/+4
ChiliSOM has TPS65217's PWR_EN pin connected to AM335x PMIC_POWER_EN pin. Processor's PMIC_POWER_EN is controlled by it's internal RTC, hence RTC subsystem is responsible for proper board poweroff sequence. This change enables complete poweroff sequence for ChiliBoard, switching PMIC's state from ACTIVE to SLEEP. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-14ARM: dts: am335x-chili*: Move Ethernet MAC description from SOM to boardMarcin Niestroj2-62/+61
ChiliSOM has 2 Ethernet subsystems with different types of possibly used PHY interfaces (i.e. MII, RMII, GMII, RGMII). Current code configured pinmux for RMII on 1st Ethernet subsystem and enabled Ethernet MAC with 1 slave for all boards which use ChiliSOM. This change moves pinmux configuration of 1st Ethernet subsystem to ChiliBoard description, as this is board-specific. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-14ARM: dts: am335x-chili*: Move uart0 description from SOM to boardMarcin Niestroj2-14/+14
uart0 configuration code has been in SOM. However, it is possible to use all (or none) of 6 uart's of AM335x processor present on ChiliSOM. This fix moves declaration of uart0 from ChiliSOM to ChiliBoard, because use of uart is strictly board-specific. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: am43xx: add support for clkout1 clockTero Kristo1-0/+54
clkout1 clock node and its generation tree was missing. Add this based on the data on TRM and PRCM functional spec. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: omap3-beagle: Provide NAND ready pinRoger Quadros1-0/+1
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 13212 KiB/ to 15753 KiB/s and write speed was unchanged at 4404 KiB/s. Measured using mtd_speedtest.ko on omap3-beagle-c4. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: am335x: Provide NAND ready pinRoger Quadros6-0/+6
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 7869 KiB/ to 8875 KiB/s and write speed was unchanged at 5100 KiB/s. Measured using mtd_speedtest.ko on am335x-evm. Cc: Teresa Remmet <t.remmet@phytec.de> Cc: Ilya Ledvich <ilya@compulab.co.il> Cc: Yegor Yefremov <yegorslists@googlemail.com> Cc: Rostislav Lisovy <lisovy@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: am437x: Provide NAND ready pinRoger Quadros2-0/+2
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 16516 KiB/ to 18813 KiB/s and write speed was unchanged at 9941 KiB/s. Measured using mtd_speedtest.ko. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: dra7x-evm: Provide NAND ready pinRoger Quadros2-0/+2
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. Read speed increases from 13768 KiB/ to 17246 KiB/s. Write speed was unchanged at 7123 KiB/s. Measured using mtd_speedtest.ko. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: dm816x: Enable gpio controller for GPMCRoger Quadros1-0/+2
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: dm814x: Enable gpio controller for GPMCRoger Quadros1-0/+2
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: omap3: Enable gpio controller for GPMCRoger Quadros1-0/+2
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: am4372: Enable gpio controller for GPMCRoger Quadros1-0/+2
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: am335x: Enable gpio controller for GPMCRoger Quadros1-0/+2
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: dra7: Enable gpio controller for GPMCRoger Quadros1-0/+2
GPMC driver provides GPI support for the GPMC_WAIT pins. Mark it gpio controller capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: omap5: Enable gpio and interrupt controller for GPMCRoger Quadros1-0/+4
GPMC driver provides interrupts and gpio for the GPMC_WAIT pins. Mark it as gpio and interrupt capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: omap4: Enable gpio and interrupt controller for GPMCRoger Quadros1-0/+4
GPMC driver provides interrupts and gpio for the GPMC_WAIT pins. Mark it as gpio and interrupt capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: omap24xx: Enable gpio and interrupt controller for GPMCRoger Quadros2-0/+8
GPMC driver provides interrupts and gpio for the GPMC_WAIT pins. Mark it as gpio and interrupt capable. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: omap4-kc1: Power off supportPaul Kocialkowski1-0/+5
This adds support for turning off the main power supply via the TWL6030 on the Kindle Fire (first generation). Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: omap4-kc1: LEDs supportPaul Kocialkowski1-0/+16
This adds support for the Kindle Fire (first generation) power button LEDs, that are wired to the TWL6030 PWM outputs. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: omap4-kc1: USB OTG supportPaul Kocialkowski1-0/+21
This adds support for USB OTG on the Kindle Fire (first generation). Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: Amazon Kindle Fire (first generation) codename kc1 basic supportPaul Kocialkowski2-0/+141
The Amazon Kindle Fire (first generation) codename kc1 is a tablet that was released by Amazon back in 2011. It is using an OMAP4430 SoC GP version. This adds devicetree support for the device, with only a few basic features supported, such as debug uart, i2c and internal emmc. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13devicetree: bindings: Add vendor prefix for Amazon.com, Inc.Paul Kocialkowski1-0/+1
This adds the amazon vendor prefix for Amazon.com, Inc. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: am335x-baltos-ir5221: use dedicated RTS/CTS signalsYegor Yefremov1-8/+4
Before "tty: Add software emulated RS485 support for 8250" patch Baltos devices relied on MCTRL_GPIO framework to handle both modem signals and RS485 mode. With emulated RS485 support for 8250 we can now use these pins as dedicated RTS/CTS signals taking advantage of hardware flow control etc. when operating in RS232 mode. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: AM572x-IDK Initial SupportSchuyler Patton4-0/+391
The AM572x-IDK board is a board based on TI's AM5728 SOC which has a dual core 1.5GHz A15 processor. This board is a development platform for the Industrial market with: - 2GB of DDR3L - Dual 1Gbps Ethernet - HDMI, - PRU-ICSS - uSD - 16GB eMMC - CAN - RS-485 - PCIe - USB3.0 - Video Input Port - Industrial IO port and expansion connector The link to the data sheet and TRM can be found here: http://www.ti.com/product/AM5728 This patch creates a common dtsi file that will provide a common board dtsi file to define the nodes that are common to AM57xx (including the upcoming AM5718) IDK boards. Initial support is only for basic peripherals Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: am335x: Add initial support for ICEv2 boardLokesh Vutla3-0/+310
TI's Industrial Communication Engine EVM is a low cost hardware mainly developed for industrial communication type applications using serial or Ethernet based interfaces. This platform features TI's AM3359 with 800MHz single core Cortex-A8 processor, 256MB DDR3, 64MB SPI flash, 8MB NOR Flash, mmc, usb, can, dual Ethernet ports. For more information, look at HW user guide[1], Data manual[2]. Just add basic support for the moment. [1] http://processors.wiki.ti.com/index.php/AM335x_Industrial_Communication_Engine_EVM_Rev2_1_HW_User_Guide [2] http://www.ti.com/lit/ds/symlink/am3359.pdf Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: da850/am4372/am33xx: Use generic node name for ehrpwmFranklin S Cooper Jr4-12/+12
When possible generic node names should be used. So change the node name from ehrpwm to pwm. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: dra7xx: Fix compatible string for PCF8575 chipBen Hutchings2-2/+2
The binding definition for the PCF857x GPIO expanders doesn't mention a "ti,pcf8575" compatible string. This is apparently because TI is only a second source - there is no functional difference between PCF8575 chips manufactured by TI and NXP, and the same board might be populated with either depending on availability. This is not a problem in practice because the I2C core uses of_modalias_node() before matching drivers and this strips the manufacturer name. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-04-13ARM: dts: N9/N950: Add support for accelerometerFilip Matijević3-0/+82
Signed-off-by: Filip Matijević <filip.matijevic.pz@gmail.com> Signed-off-by: Sebastian Reichel <sre@kernel.org> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-08-09 16:51:23 +0300