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2020-11-18Merge tag 'renesas-pinctrl-for-v5.11-tag1' of ↵Linus Walleij14-286/+298
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.11 - Add remaining video-in (VIN) pin groups on R-Car H2 and RZ/G1H, - Image size optimizations and code consolidations, - Minor fixes and improvements.
2020-11-13pinctrl: renesas: Constify sh73a0_vccq_mc0_opsRikard Falkeborn1-1/+1
The only usage of sh73a0_vccq_mc0_ops is to assign its address to the ops field in the regulator_desc struct, which is a const pointer. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20201109221012.177478-1-rikard.falkeborn@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: Protect GPIO leftovers by CONFIG_PINCTRL_SH_FUNC_GPIOGeert Uytterhoeven3-3/+11
On SuperH and ARM SH/R-Mobile SoCs, the pin control driver handles GPIOs, too. To reduce code size when compiling a kernel supporting only modern SoCs, most, but not all, of the GPIO functionality is protected by checks for CONFIG_PINCTRL_SH_FUNC_GPIO. Factor out the remaining parts when not needed: 1. sh_pfc_soc_info.{in,out}put describe GPIO pins that have input resp. output capabilities (SuperH and SH/R-Mobile). 2. sh_pfc_soc_info.gpio_irq{,_size} describe the mapping from GPIO pins to interrupt numbers (SH/R-Mobile). 3. sh_pfc_gpio_set_direction() configures GPIO direction, called from the GPIO driver through pinctrl_gpio_direction_{in,out}put() (SH/R-Mobile). Unfortunately this function cannot just be moved to drivers/pinctrl/renesas/gpio.c, as it relies on knowledge of sh_pfc_pinctrl, which is internal to drivers/pinctrl/renesas/pinctrl.c. While code size reduction is minimal, this does help in documenting depencies. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-9-geert+renesas@glider.be
2020-11-13pinctrl: renesas: r8a7778: Use common R-Car bias handlingGeert Uytterhoeven2-40/+10
Currently, the rcar_pinmux_[gs]et_bias() helpers handle only SoCs that have separate LSI Pin Pull-Enable (PUEN) and Pull-Up/Down Control (PUD) registers, like R-Car Gen3 and RZ/G2. Update the function to handle SoCs that have only LSI Pin Pull-Up Control Register (PUPR), like R-Car Gen1/Gen2 and RZ/G1. Reduce code duplication by converting the R-Car M1A pin control driver to use the common handler. Note that this changes behavior in case the (invalid!) option "bias-pull-down" is used in an R-Car M1A DTS: before, it was ignored silently; after this change, it is considered the same as "bias-pull-up". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-8-geert+renesas@glider.be
2020-11-13pinctrl: renesas: r8a7778: Use physical addresses for PUPR regsGeert Uytterhoeven1-15/+9
The handling of the LSI Pin Pull-Up Control Registers (PUPR) on R-Car M1A uses register offsets instead of register physical addresses. This is different from the handling on other R-Car parts. Convert the bias handling from register offsets to physical addresses. This increases uniformity, and prepares for consolidation of the bias handling. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-7-geert+renesas@glider.be
2020-11-13pinctrl: renesas: Factor out common R-Car Gen3 bias handlingGeert Uytterhoeven7-215/+54
All pin control drivers for R-Car Gen3 SoCs contain identical bias handling. Reduce code duplication by moving it to the common pinctrl.c code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-6-geert+renesas@glider.be
2020-11-13pinctrl: renesas: Optimize sh_pfc_pin_configGeert Uytterhoeven1-6/+4
Shrink sh_pfc_pin_config from 8 to 2 bytes: - The mux_set flag can be removed, as a non-zero mark value means the same (zero = PINMUX_RESERVED is an invalid mark value), - The gpio_enabled flag needs only a single bit, - Mark values are small integers, and can easily fit in a 15-bit bitfield. This saves 6 bytes per pin when allocating the sh_pfc_pinctrl.configs array, i.e. it reduces run-time memory consumption by ca. 1.5 KiB. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-5-geert+renesas@glider.be
2020-11-13pinctrl: renesas: Reorder struct sh_pfc_pin to remove holeGeert Uytterhoeven1-2/+2
On arm64, pointer size and alignment is 64-bit, hence a 4-byte hole is present in between the enum_id and name members of the sh_pfc_pin structure. Get rid of this hole by sorting the structure's members by decreasing size. This saves up to 1.5 KiB per enabled SoC, and reduces the size of a kernel including support for all R-Car Gen3 SoCs by more than 10 KiB. This has no size impact on SH and arm32. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-4-geert+renesas@glider.be
2020-11-13pinctrl: renesas: Singular/plural grammar fixesGeert Uytterhoeven2-4/+4
Fix a few singular vs. plural grammar issues in comments. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-3-geert+renesas@glider.be
2020-11-13pinctrl: renesas: Remove superfluous goto in sh_pfc_gpio_set_direction()Geert Uytterhoeven1-5/+0
Commit b13431ed6eab808a ("pinctrl: sh-pfc: Remove incomplete flag "cfg->type"") removed the last statement in between the goto and the label. Hence remove both. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028151637.1734130-2-geert+renesas@glider.be
2020-11-13pinctrl: renesas: r8a7791: Optimize pinctrl image size for R8A774[34]Biju Das1-0/+18
This driver supports both RZ/G1[MN] and R-Car M2-W/M2-N SoCs. Optimize pinctrl image size for RZ/G1[MN], when support for R-Car M2-W/M2-N (R8A779[13]) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-7-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a7790: Optimize pinctrl image size for R8A7742Biju Das1-0/+14
This driver supports both RZ/G1H and R-Car H2 SoCs. Optimize pinctrl image size for RZ/G1H, when support for R-Car H2 (R8A7790) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-6-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a77990: Optimize pinctrl image size for R8A774C0Biju Das1-0/+12
This driver supports both RZ/G2E and R-Car E3 SoCs. Optimize pinctrl image size for RZ/G2E, when support for R-Car E3 (R8A77990) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1Biju Das1-0/+12
This driver supports both RZ/G2N and R-Car M3-N SoCs. Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N (R8A77965) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1Biju Das1-0/+12
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs. Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+ (R8A7796[01]) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019132805.5996-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-13pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1Biju Das1-2/+12
This driver supports both RZ/G2H and R-Car H3 ES2 SoCs. Optimize pinctrl image size for RZ/G2H, when support for R-Car H3 ES2 (R8A77951) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-11pinctrl: pinctrl-at91-pio4: Set irq handler and data in one goMartin Kaiser1-2/+2
Replace the two separate calls for setting the irq handler and data with a single irq_set_chained_handler_and_data() call. Signed-off-by: Martin Kaiser <martin@kaiser.cx> Link: https://lore.kernel.org/r/20201108180144.28594-1-martin@kaiser.cx Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-11pinctrl: qcom: sdx55: update kconfig dependencyVinod Koul1-1/+1
Commit be117ca32261 ("pinctrl: qcom: Kconfig: Rework PINCTRL_MSM to be a dependency rather then a selected config") moved the qcom pinctrl drivers to have PINCTRL_MSM as dependency rather then a selected config, so do this change for SDX55 pinctrl driver as well. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20201111043610.177168-1-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-11pinctrl: nomadik: db8500: Add more detailed LCD groupsLinus Walleij1-1/+9
We need a more granular distribution among funcion A and function B for the LCD pins for the Samsung GT-I9070. Provide some new pin groups so we can configure this phone properly. Link: https://lore.kernel.org/r/20201110232330.2242167-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: qcom: Add SDX55 pincontrol driverJeevan Shriram3-0/+1028
Add initial Qualcomm SDX55 pinctrl driver to support pin configuration with pinctrl framework for SDX55 SoC. [ported from downstream and tidy up] Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20201109062620.14566-3-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10dt-bindings: pinctrl: qcom: Add SDX55 pinctrl bindingsVinod Koul1-0/+154
Add device tree binding Documentation details for Qualcomm SDX55 pinctrl driver. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201109062620.14566-2-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: ocelot: Add support for Serval platformsLars Povlsen1-0/+92
This patch adds support for Serval pinctrl, using the ocelot driver as basis. It adds pinconfig support as well, as supported by the platform. gclement: Split from a larger patch adding support all platforms in the same time. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20201106093118.965152-5-gregory.clement@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: ocelot: Add support for Luton platformsLars Povlsen1-0/+92
This patch adds support for Luton pinctrl, using the ocelot driver as basis. It adds pinconfig support as well, as supported by the platform. gclement: Split from a larger patch adding support all platforms in the same time. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20201106093118.965152-4-gregory.clement@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10dt-bindings: pinctrl: ocelot: Add Serval SoC supportGregory CLEMENT1-2/+2
Add the documentation for the Microsemi Serval pinmuxing and gpio controller. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20201106093118.965152-3-gregory.clement@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10dt-bindings: pinctrl: ocelot: Add Luton SoC supportGregory CLEMENT1-1/+2
Add the documentation for the Microsemi Luton pinmuxing and gpio controller. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20201106093118.965152-2-gregory.clement@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: ocelot: Remove unnecessary conversion to boolKaixu Xia1-1/+1
Fix the following coccicheck warning: ./drivers/pinctrl/pinctrl-ocelot.c:732:28-33: WARNING: conversion to bool not needed here Reported-by: Tosk Robot <tencent_os_robot@tencent.com> Signed-off-by: Kaixu Xia <kaixuxia@tencent.com> Link: https://lore.kernel.org/r/1604651795-1220-1-git-send-email-kaixuxia@tencent.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10firmware: QCOM_SCM: Allow qcom_scm driver to be loadable as a permenent moduleJohn Stultz5-3/+11
Allow the qcom_scm driver to be loadable as a permenent module. This still uses the "depends on QCOM_SCM || !QCOM_SCM" bit to ensure that drivers that call into the qcom_scm driver are also built as modules. While not ideal in some cases its the only safe way I can find to avoid build errors without having those drivers select QCOM_SCM and have to force it on (as QCOM_SCM=n can be valid for those drivers). Signed-off-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Kalle Valo <kvalo@codeaurora.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <maz@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: Kalle Valo <kvalo@codeaurora.org> Cc: Maulik Shah <mkshah@codeaurora.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Saravana Kannan <saravanak@google.com> Cc: Todd Kjos <tkjos@google.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-arm-msm@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: linux-gpio@vger.kernel.org Link: https://lore.kernel.org/r/20201106042710.55979-3-john.stultz@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: qcom: Allow pinctrl-msm code to be loadable as a moduleJohn Stultz2-1/+4
Tweaks to allow pinctrl-msm code to be loadable as a module. This is needed in order to support having the qcom-scm driver, which pinctrl-msm calls into, configured as a module. This requires that we tweak Kconfigs selecting PINCTRL_MSM to also depend on QCOM_SCM || QCOM_SCM=n so that we match the module setting of QCOM_SCM. Signed-off-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <maz@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: Kalle Valo <kvalo@codeaurora.org> Cc: Maulik Shah <mkshah@codeaurora.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Saravana Kannan <saravanak@google.com> Cc: Todd Kjos <tkjos@google.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-arm-msm@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: linux-gpio@vger.kernel.org Link: https://lore.kernel.org/r/20201106042710.55979-2-john.stultz@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: qcom: Kconfig: Rework PINCTRL_MSM to be a depenency rather then a ↵John Stultz2-24/+25
selected config This patch reworks PINCTRL_MSM to be a visible option, and instead of having the various SoC specific drivers select PINCTRL_MSM, this switches those configs to depend on PINCTRL_MSM. This is useful, as it will be needed in order to cleanly support having the qcom-scm driver, which pinctrl-msm calls into, configured as a module. Without this change, we would eventually have to add dependency lines to every config that selects PINCTRL_MSM, and that would becomes a maintenance headache. We also add PINCTRL_MSM to the arm64 defconfig to avoid surprises as otherwise PINCTRL_MSM/IPQ* options previously enabled, will be off. Signed-off-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <maz@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: Kalle Valo <kvalo@codeaurora.org> Cc: Maulik Shah <mkshah@codeaurora.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Saravana Kannan <saravanak@google.com> Cc: Todd Kjos <tkjos@google.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-arm-msm@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: linux-gpio@vger.kernel.org Link: https://lore.kernel.org/r/20201106042710.55979-1-john.stultz@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: amd: print debounce filter info in debugfsCoiby Xu1-2/+41
Print the status of debounce filter as follows, $ cat /sys/kernel/debug/gpio pin129 interrupt is disabled | interrupt is masked | disable wakeup in S0i3 state | disable wakeup in S3 state | disable wakeup in S4/S5 state| input is high | pull-up is disabled | Pull-down is disabled | output is disabled | debouncing filter disabled | 0x50000 pin130 interrupt is disabled | interrupt is masked | disable wakeup in S0i3 state | disable wakeup in S3 state | disable wakeup in S4/S5 state | input is high | pull-up is disabled | Pull-down is disabled | output is disabled | debouncing filter (high) enabled | debouncing timeout is 124800 (us)| 0x503c8 Signed-off-by: Coiby Xu <coiby.xu@gmail.com> Link: https://lore.kernel.org/r/20201105231912.69527-4-coiby.xu@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: ingenic: Add lcd-8bit group for JZ4770Paul Cercueil1-1/+8
Add the "lcd-8bit" group to the "lcd" function. As "lcd-24bit" is a superset of "lcd-8bit", in theory the former could be modified to only contain the pins not already included in "lcd-8bit", just like how it's done for the JZ4740 and JZ4725B platforms. However, we can't do that without breaking Device Tree ABI, so in that case we have no choice but to have two groups containing the same pins. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Link: https://lore.kernel.org/r/20201101090104.5088-3-paul@crapouillou.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: ingenic: Get rid of repetitive dataPaul Cercueil1-811/+447
Abuse the pin function pointer to store the pin function value directly, when all the pins of a group have the same function value. Now when the pointer value is <= 3 (unsigned), the pointer value is used as the pin function; otherwise it is used as a regular pointer. This drastically reduces the number of pin function tables needed, and drops .data usage by about 2 KiB. Additionally, the few pin function tables that are still around now contain u8 instead of int, since the largest number that will be stored is 3. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Link: https://lore.kernel.org/r/20201101090104.5088-2-paul@crapouillou.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: mt7622: drop pwm ch7 as mt7622 only has 6 channelsFrank Wunderlich1-12/+1
mt7622 is reported by mediatek to have only 6 pwm channels so drop pindefines for 7th channel Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Acked-by: Sean Wang <sean.wang@kernel.org> Link: https://lore.kernel.org/r/20201016204019.2606-4-linux@fw-web.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10dt-bindings: pinctrl: qcom: add msm8953 pinctrl bindingsVladimir Lypak1-0/+167
Add device tree bindings documentation for Qualcomm MSM8953 pinctrl driver. Signed-off-by: Vladimir Lypak <junak.pub@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201007160611.942754-2-junak.pub@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10pinctrl: qcom: add pinctrl driver for msm8953Vladimir Lypak3-0/+1855
Add inititial pinctrl driver for MSM8953 platform. Compatible SoCs are: MSM8953, APQ8053, SDM(SDA)450, SDM(SDA)632. Based off CAF implementation. Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org> Signed-off-by: Vladimir Lypak <junak.pub@gmail.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20201007160611.942754-1-junak.pub@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-05pinctrl: Remove hole in pinctrl_gpio_rangeGeert Uytterhoeven1-2/+2
On 64-bit platforms, pointer size and alignment are 64-bit, hence two 4-byte holes are present before the pins and gc members of the pinctrl_gpio_range structure. Get rid of these holes by moving the pins pointer. This reduces kernel size of an arm64 Rockchip kernel by ca. 512 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201028145117.1731876-1-geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-05pinctrl: core: Add missing #ifdef CONFIG_GPIOLIBHe Zhe1-0/+2
To fix the following build warnings when CONFIG_GPIOLIB=n. drivers/pinctrl/core.c:1607:20: warning: unused variable 'chip' [-Wunused-variable] 1608 | struct gpio_chip *chip; | ^~~~ drivers/pinctrl/core.c:1606:15: warning: unused variable 'gpio_num' [-Wunused-variable] 1607 | unsigned int gpio_num; | ^~~~~~~~ drivers/pinctrl/core.c:1605:29: warning: unused variable 'range' [-Wunused-variable] 1606 | struct pinctrl_gpio_range *range; | ^~~~~ Fixes: f1b206cf7c57 ("pinctrl: core: print gpio in pins debugfs file") Signed-off-by: He Zhe <zhe.he@windriver.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20201028103921.22486-1-zhe.he@windriver.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-05pinctrl/meson: enable building as modulesKevin Hilman10-13/+38
Enable pinctrl drivers for 64-bit Amlogic SoCs to be built as modules. The default is still built-in, this only adds the option of building as modules. Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201026183025.31768-1-khilman@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-10-26pinctrl: renesas: r8a7790: Add VIN1-B and VIN2-G pins, groups and functionsLad Prabhakar1-1/+131
Add pins, groups and functions for the VIN1-B [data/sync/field/clkenb/clk] and VIN2-G8. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20200917195924.20384-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-10-26Linux 5.10-rc1Linus Torvalds1-2/+2
2020-10-26treewide: Convert macro and uses of __section(foo) to __section("foo")Joe Perches117-196/+196
Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Conversion done using the script at: https://lore.kernel.org/lkml/75393e5ddc272dc7403de74d645e6c6e0f4e70eb.camel@perches.com/2-convert_section.pl Signed-off-by: Joe Perches <joe@perches.com> Reviewed-by: Nick Desaulniers <ndesaulniers@gooogle.com> Reviewed-by: Miguel Ojeda <ojeda@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-10-25kernel/sys.c: fix prototype of prctl_get_tid_address()Rasmus Villemoes1-3/+3
tid_addr is not a "pointer to (pointer to int in userspace)"; it is in fact a "pointer to (pointer to int in userspace) in userspace". So sparse rightfully complains about passing a kernel pointer to put_user(). Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-10-25mm: remove kzfree() compatibility definitionEric Biggers6-8/+6
Commit 453431a54934 ("mm, treewide: rename kzfree() to kfree_sensitive()") renamed kzfree() to kfree_sensitive(), but it left a compatibility definition of kzfree() to avoid being too disruptive. Since then a few more instances of kzfree() have slipped in. Just get rid of them and remove the compatibility definition once and for all. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-10-25checkpatch: enable GIT_DIR environment use to set git repository locationJoe Perches1-5/+7
If set, use the environment variable GIT_DIR to change the default .git location of the kernel git tree. If GIT_DIR is unset, keep using the current ".git" default. Link: https://lkml.kernel.org/r/c5e23b45562373d632fccb8bc04e563abba4dd1d.camel@perches.com Signed-off-by: Joe Perches <joe@perches.com> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-10-25Merge tag 'timers-urgent-2020-10-25' of ↵Linus Torvalds3-1/+116
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fixes from Thomas Gleixner: "A time namespace fix and a matching selftest. The futex absolute timeouts which are based on CLOCK_MONOTONIC require time namespace corrected. This was missed in the original time namesapce support" * tag 'timers-urgent-2020-10-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: selftests/timens: Add a test for futex() futex: Adjust absolute futex timeouts with per time namespace offset
2020-10-25Merge tag 'sched-urgent-2020-10-25' of ↵Linus Torvalds2-5/+12
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler fixes from Thomas Gleixner: "Two scheduler fixes: - A trivial build fix for sched_feat() to compile correctly with CONFIG_JUMP_LABEL=n - Replace a zero lenght array with a flexible array" * tag 'sched-urgent-2020-10-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched/features: Fix !CONFIG_JUMP_LABEL case sched: Replace zero-length array with flexible-array
2020-10-25Merge tag 'perf-urgent-2020-10-25' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf fix from Thomas Gleixner: "A single fix to compute the field offset of the SNOOPX bit in the data source bitmask of perf events correctly" * tag 'perf-urgent-2020-10-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf: correct SNOOPX field offset
2020-10-25Merge tag 'locking-urgent-2020-10-25' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking fix from Thomas Gleixner: "Just a trivial fix for kernel-doc warnings" * tag 'locking-urgent-2020-10-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: locking/seqlocks: Fix kernel-doc warnings
2020-10-25Merge tag 'ntb-5.10' of git://github.com/jonmason/ntbLinus Torvalds3-5/+3
Pull NTB fixes from Jon Mason. * tag 'ntb-5.10' of git://github.com/jonmason/ntb: NTB: Use struct_size() helper in devm_kzalloc() ntb: intel: Fix memleak in intel_ntb_pci_probe NTB: hw: amd: fix an issue about leak system resources
2020-10-25Merge branch 'i2c/for-5.10' of ↵Linus Torvalds1-1/+10
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c fix from Wolfram Sang: "Regression fix for rc1 and stable kernels as well" * 'i2c/for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: core: Restore acpi_walk_dep_device_list() getting called after registering the ACPI i2c devs
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-01 01:22:46 +0300