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2014-03-09Merge tag 'imx-soc-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Olof Johansson435-2893/+4885
into next/soc i.MX SoC changes for 3.15 from Shawn Guo: - Support suspend from ocram (DDR IO floating) for imx6 platforms - Add cpuidle support for imx6sl - Sparse warning fixes for imx6sl and vf610 clock code - Remove PWM platform code - Support ptp and rmii clock from pad - Support WEIM CS GPR configuration - Random cleanups and defconfig updates * tag 'imx-soc-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6: (373 commits) ARM: imx6: drop .text.head section annotation from headsmp.S ARM: imx6: build suspend-imx6.o with CONFIG_SOC_IMX6 ARM: imx6: rename pm-imx6q.c to pm-imx6.c ARM: imx6: introduce CONFIG_SOC_IMX6 for i.MX6 common stuff ARM: imx6: do not call imx6q_suspend_init() with !CONFIG_SUSPEND ARM: imx6: call suspend_set_ops() from suspend routine ARM: imx6: build headsmp.o only on CONFIG_SMP ARM: imx6: move v7_cpu_resume() into suspend-imx6.S ARM i.MX6q: Mark VPU and IPU AXI transfers as cacheable, increase IPU priority ARM: imx6q: Add GPR6 and GPR7 register definitions for iomuxc gpr bus: imx-weim: support CS GPR configuration ARM: mach-imx: Kconfig: Remove IMX_HAVE_PLATFORM_IMX2_WDT from SOC_IMX53 ARM: imx_v6_v7_defconfig: Select CONFIG_DEBUG_FS ARM: mach-imx: Select CONFIG_SRAM at ARCH_MXC level ARM: imx: add speed grading check for i.mx6 soc ARM: imx: avoid calling clk APIs in idle thread which may cause schedule ARM: imx6q: support ptp and rmii clock from pad ARM: imx6q: remove unneeded clk lookups ARM: imx_v6_v7_defconfig: Select CONFIG_MMC_UNSAFE_RESUME ARM: imx_v4_v5_defconfig: Select CONFIG_MMC_UNSAFE_RESUME ...
2014-03-09Merge tag 'omap-for-v3.15/prcm-signed' of ↵Olof Johansson7-6/+26
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Power, reset and clock related changes via Paul Walmsley <paul@pwsan.com>, via Tony Lindgren: Some low-level optimizations and fixes that don't belong in an -rc series for various OMAP-family chips, targeted for v3.15. Basic build, boot, and PM test logs are available here: http://www.pwsan.com/omap/testlogs/prcm-a-for-v3.15/20140228124518/ * tag 'omap-for-v3.15/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP3+: DPLL: stop reparenting to same parent if already done ARM: OMAP2+: clock: fix rate prints ARM: AM43x: hwmod data: register spinlock OCP interface ARM: OMAP2+: clockdomain: Reintroduce SW_SLEEP Support ARM: OMAP2+: AM43xx: implement support for machine restart Signed-off-by: Olof Johansson <olof@lixom.net>
2014-03-09Merge tag 'omap-for-v3.15/soc-signed' of ↵Olof Johansson8-15/+21
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc OMAP SoC changes from Tony Lindgren: Few SoC related improvments for omaps. * tag 'omap-for-v3.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: remove OMAP_PACKAGE_ZAC and OMAP_PACKAGE_ZAF ARM: OMAP2+: AM43x: Use gptimer as clocksource ARM: OMAP2+: AM43x: determine features ARM: OMAP2+: AM43x: Add ID for ES1.1 ARM: OMAP2+: AM43x: enable in default config Signed-off-by: Olof Johansson <olof@lixom.net>
2014-03-09Merge tag 'v3.15-rockchip-smp' of ↵Olof Johansson11-0/+322
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc Merge Rockchip SMP support from Heiko Stübner: SMP-support for RK3066 and RK3188 SoCs from Rockchip. * tag 'v3.15-rockchip-smp' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: rockchip: add smp bringup code ARM: rockchip: add power-management-unit ARM: rockchip: add sram dt nodes and documentation ARM: rockchip: add snoop-control-unit Signed-off-by: Olof Johansson <olof@lixom.net>
2014-03-05ARM: imx6: drop .text.head section annotation from headsmp.SShawn Guo1-2/+0
The function v7_secondary_startup() works just fine in .text section, so there is no need to have .text.head section annotation at all. Drop it. Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6: build suspend-imx6.o with CONFIG_SOC_IMX6Shawn Guo1-1/+3
Even when CONFIG_SUSPEND is enabled, it makes no sense to build suspend-imx6.o if none of i.MX6 support is built in. Let's build suspend-imx6.o only when both CONFIG_SUSPEND and CONFIG_SOC_IMX6 are enabled. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6: rename pm-imx6q.c to pm-imx6.cShawn Guo2-3/+1
The pm-imx6q.c works for all i.MX6 SoCs, so let's rename it to pm-imx6.c and have the build controlled by option CONFIG_SOC_IMX6. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6: introduce CONFIG_SOC_IMX6 for i.MX6 common stuffShawn Guo1-19/+13
The i.MX6 SoCs have something in common, so let's introduce CONFIG_SOC_IMX6 for those stuff. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6: do not call imx6q_suspend_init() with !CONFIG_SUSPENDShawn Guo1-4/+6
When CONFIG_SUSPEND is not enabled, we should reasonably skip the call to imx6q_suspend_init(). Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6: call suspend_set_ops() from suspend routineShawn Guo1-7/+5
Rename function imx6q_ocram_suspend_init() to imx6q_suspend_init() and call suspend_set_ops() from there. Now we get a centralized function for suspend initialization. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6: build headsmp.o only on CONFIG_SMPShawn Guo2-4/+2
With v7_cpu_resume() being moved out of headsmp.S, all the remaining code in the file is only needed by CONFIG_SMP build. So we can control the build of headsmp.o with only obj-$(CONFIG_SMP) now. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6: move v7_cpu_resume() into suspend-imx6.SShawn Guo4-39/+43
The suspend-imx6.S is introduced recently for suspend low-level assembly code. Since function v7_cpu_resume() is only used by suspend support, it makes sense to move the function into suspend-imx6.S, and control the build of the file with CONFIG_SUSPEND option. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM i.MX6q: Mark VPU and IPU AXI transfers as cacheable, increase IPU priorityPhilipp Zabel1-0/+34
This is needed so that the IPU framebuffer scanout cannot be starved by VPU or GPU activity. Some boards like the SabreLite and SabreSD seem to set this in the DCD already, but the documented register reset values do not contain the necessary settings. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6q: Add GPR6 and GPR7 register definitions for iomuxc gprPhilipp Zabel1-0/+18
Masks for IPU AXI transaction QoS settings Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05bus: imx-weim: support CS GPR configurationShawn Guo2-1/+85
For imx50-weim and imx6q-weim type of devices, there might a WEIM CS space configuration register in General Purpose Register controller, e.g. IOMUXC_GPR1 on i.MX6Q. Depending on which configuration of the following 4 is chosen for given system, IOMUXC_GPR1[11:0] should be set up as 05, 033, 0113 or 01111 correspondingly. CS0(128M) CS1(0M) CS2(0M) CS3(0M) CS0(64M) CS1(64M) CS2(0M) CS3(0M) CS0(64M) CS1(32M) CS2(32M) CS3(0M) CS0(32M) CS1(32M) CS2(32M) CS3(32M) The patch creates a function for such type of devices, which scans 'ranges' property of WEIM node and build the GPR value incrementally. Thus the WEIM CS GPR can be set up automatically at boot time. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Philippe De Muyter <phdm@macqel.be> Tested-by: Philippe De Muyter <phdm@macqel.be>
2014-03-05ARM: mach-imx: Kconfig: Remove IMX_HAVE_PLATFORM_IMX2_WDT from SOC_IMX53Fabio Estevam1-1/+0
SOC_IMX53 is a device-tree only platform, so we don't need IMX_HAVE_PLATFORM_IMX2_WDT at all because this symbol only provides some code to help register imx2-wdt platform devices. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx_v6_v7_defconfig: Select CONFIG_DEBUG_FSFabio Estevam1-0/+1
CONFIG_DEBUG_FS is a very useful debug option as it allow us to access key data such as the clock tree, for example: mount -t debugfs debugfs /sys/kernel/debug cat /sys/kernel/debug/clk/clk_summary Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: mach-imx: Select CONFIG_SRAM at ARCH_MXC levelFabio Estevam1-1/+1
Booting a mx6q system built with multi_v7_defconfig leads to the following error messages on boot: [ 0.037758] imx6q_ocram_suspend_init: ocram pool unavailable! [ 0.037768] imx6_pm_common_init: failed to initialize ocram suspend -19! This happens because CONFIG_SRAM is not selected by default in multi_v7_defconfig. Fix this by selecting CONFIG_SRAM at ARCH_MXC level, so that other SoCs could use the SRAM driver as well. As SRAM automatically selects GENERIC_ALLOCATOR, just drop it from the Kconfig entry. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: add speed grading check for i.mx6 socAnson Huang1-3/+23
The fuse map of speed_grading[1:0] defines the max speed of ARM, see below the definition: 2b'11: 1200000000Hz; 2b'10: 996000000Hz; 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz. 2b'00: 792000000Hz; Need to remove all illegal setpoints according to fuse map. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: avoid calling clk APIs in idle thread which may cause scheduleAnson Huang1-6/+77
As clk_pllv3_wait_lock will call usleep_range, and the clk APIs mutex lock may be held when CPU entering idle, so calling clk APIs must be avoided in cpu idle thread, this is to avoid reschedule warning in cpu idle, just access register directly to achieve that. bad: scheduling from the idle thread! CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.14.0-rc1+ #657 Backtrace: [<80012188>] (dump_backtrace) from [<8001246c>] (show_stack+0x18/0x1c) r6:808c0038 r5:00000000 r4:808e5a1c r3:00000000 [<80012454>] (show_stack) from [<8064b2ec>] (dump_stack+0x84/0x9c) [<8064b268>] (dump_stack) from [<80055ee0>] (dequeue_task_idle+0x20/0x30) r5:808bef40 r4:bf7dff40 [<80055ec0>] (dequeue_task_idle) from [<8004f028>] (dequeue_task+0x30/0x50) r4:bf7dff40 r3:80055ec0 [<8004eff8>] (dequeue_task) from [<800503c0>] (deactivate_task+0x30/0x34) r4:bf7dff40 [<80050390>] (deactivate_task) from [<8064d8e4>] (__schedule+0x2c8/0x5c0) [<8064d61c>] (__schedule) from [<8064dc14>] (schedule+0x38/0x88) r10:80912964 r9:808c1e50 r8:808c0038 r7:808cbf30 r6:80e128ec r5:60000093 r4:80912968 [<8064dbdc>] (schedule) from [<8064dfec>] (schedule_preempt_disabled+0x10/0x14) [<8064dfdc>] (schedule_preempt_disabled) from [<8064ebc0>] (mutex_lock_nested+0x1c0/0x3c0) [<8064ea00>] (mutex_lock_nested) from [<804ae71c>] (clk_prepare_lock+0x44/0xe4) r10:806554cc r9:bf7df1bc r8:808cf4f8 r7:808cf544 r6:bf7df1b8 r5:808c0010 r4:80e69750 [<804ae6d8>] (clk_prepare_lock) from [<804af214>] (clk_get_rate+0x14/0x64) r6:bf7df1b8 r5:00000002 r4:bf017000 r3:80922ad0 [<804af200>] (clk_get_rate) from [<80025d30>] (imx6sl_set_wait_clk+0x18/0x20) r5:00000002 r4:00000001 [<80025d18>] (imx6sl_set_wait_clk) from [<80023454>] (imx6sl_enter_wait+0x20/0x48) [<80023434>] (imx6sl_enter_wait) from [<80477c24>] (cpuidle_enter_state+0x44/0xfc) r4:3c386e48 r3:80023434 [<80477be0>] (cpuidle_enter_state) from [<80477dd8>] (cpuidle_idle_call+0xfc/0x160) r8:808cf4f8 r7:00000001 r6:80e69534 r5:00000000 r4:bf7df1b8 [<80477cdc>] (cpuidle_idle_call) from [<8000f61c>] (arch_cpu_idle+0x10/0x50) r9:808c0000 r8:00000000 r7:80921a89 r6:808c8938 r5:808c899c r4:808c0000 [<8000f60c>] (arch_cpu_idle) from [<8006fa94>] (cpu_startup_entry+0x108/0x160) [<8006f98c>] (cpu_startup_entry) from [<806452ac>] (rest_init+0xb4/0xdc) r7:808afae0 [<806451f8>] (rest_init) from [<8086fb58>] (start_kernel+0x328/0x38c) r6:ffffffff r5:808c8880 r4:808c8a30 [<8086f830>] (start_kernel) from [<80008074>] (0x80008074) Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6q: support ptp and rmii clock from padShawn Guo2-1/+36
On imx6qdl, the ENET RMII and PTP clock can come from either internal ANATOP/CCM or external clock source through pad GPIO_16. But in case of the external clock source, bit IOMUXC_GPR1[21] needs to be cleared. The patch adds the support for systems that use an external clock source and distinguishes above two cases by checking if the PTP clock specified in device tree is the one coming from the internal ANATOP/CCM. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx6q: remove unneeded clk lookupsShawn Guo1-6/+0
Since commit (a94f8ec ARM: imx6q: remove board specific CLKO setup), a number of clk lookups in imx6q clock driver is no longer needed. Let's remove them. The cpu0 lookup is also removed since we are now running imx6 cpufreq driver and looking up clocks from device tree. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx_v6_v7_defconfig: Select CONFIG_MMC_UNSAFE_RESUMEFabio Estevam1-0/+1
PM subsystem treats mmc card as removed during suspend. If MMC is used to store the root file system, it is better to tell the kernel not to treat it as a removable media, so select CONFIG_MMC_UNSAFE_RESUME for such purpose. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx_v4_v5_defconfig: Select CONFIG_MMC_UNSAFE_RESUMEFabio Estevam1-0/+1
PM subsystem treats mmc card as removed during suspend. If MMC is used to store the root file system, it is better to tell the kernel not to treat it as a removable media, so select CONFIG_MMC_UNSAFE_RESUME for such purpose. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: enable delaytimer on the imx timerSebastian Andrzej Siewior1-0/+12
The imx can support timer-based delays, so implement this. Skips past jiffy calibration. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: add always-on clock array for i.mx6sl to maintain correct usecountAnson Huang1-0/+11
IPG, ARM and MMDC's clock should be enabled during kernel boot up, so we need to maintain their usecount, otherwise, they may be disabled unexpectedly if their children's clock are turned off, and caused their parent PLLs also get disabled, which is incorrect. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: add suspend in ocram support for i.mx6slAnson Huang3-4/+61
i.MX6SL's suspend in ocram function is derived from i.MX6Q, it can lower the DDR IO power from ~10mA@1.2V to ~1mA@1.2V, measured on i.MX6SL EVK board, SH5. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: add suspend in ocram support for i.mx6dlAnson Huang1-1/+23
i.MX6DL's suspend in ocram function is derived from i.MX6Q, it can lower the DDR IO power from ~26mA@1.5V to ~15mA@1.5V, measured on i.MX6DL SabreSD board, R25. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: add suspend in ocram support for i.mx6qAnson Huang7-11/+577
When system enter suspend, we can set the DDR IO to high-Z state to save DDR IOs' power consumption, this operation can save many power(from ~26mA@1.5V to ~15mA@1.5V, measured on i.MX6Q SabreSD board, R25) of DDR IOs. To achieve that, we need to copy the suspend code to ocram and run the low level hardware related code(set DDR IOs to high-Z state) in ocram. If there is no ocram space available, then system will still do suspend in external DDR, hence no DDR IOs will be set to high-Z. The OCRAM usage layout is as below, ocram suspend region(4K currently): ======================== high address ====================== . . . ^ ^ ^ imx6_suspend code PM_INFO structure(imx6_cpu_pm_info) ======================== low address ======================= Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM i.MX: remove PWM platform supportSascha Hauer10-102/+0
As the i.MX pwm driver is devicetree only, remove the platform support for this device. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: clk-vf610: Suppress duplicate const sparse warningLiu Ying1-18/+18
There should be no duplicate const specifiers for those static constant character string arrays defined for clock mux options. Also, the arrays are only taken as the 5th argument for the imx_clk_mux() function, which is in the type of 'const char **parents'. So, let's remove the 2nd const specifier right after 'char'. This patch fixes these sparse warnings: arch/arm/mach-imx/clk-vf610.c:66:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:67:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:68:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:69:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:70:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:71:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:72:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:73:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:74:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:75:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:76:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:77:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:78:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:79:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:80:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:81:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:83:25: warning: duplicate const arch/arm/mach-imx/clk-vf610.c:84:25: warning: duplicate const Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: clk-imx6sl: Suppress duplicate const sparse warningLiu Ying1-21/+21
There should be no duplicate const specifiers for those static constant character string arrays defined for clock mux options. Also, the arrays are only taken as the 5th argument for the imx_clk_mux() function, which is in the type of 'const char **parents'. So, let's remove the 2nd const specifier right after 'char'. This patch fixes these sparse warnings: arch/arm/mach-imx/clk-imx6sl.c:21:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:22:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:23:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:24:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:25:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:26:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:27:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:28:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:29:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:30:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:31:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:32:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:33:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:34:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:35:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:36:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:37:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:38:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:39:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:40:25: warning: duplicate const arch/arm/mach-imx/clk-imx6sl.c:41:25: warning: duplicate const Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: add select on ARCH_MXC for cpufreq supportJohn Tobias1-3/+3
Move ARCH_HAS_CPUFREQ, ARCH_HAS_OPP and PM_OPP on ARCH_MXC so that the user can enable the cpufreq support for iMX6Q and/or iMX6SL. Signed-off-by: John Tobias <john.tobias.ph@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx_v6_v7_defconfig: Enable some drivers used on the cpuimx35.Denis Carikli1-0/+2
The eukrea cpuimx35 has a pcf8563 RTC and a LCD gpio regulator. We enable the respective drivers in order to be able to use theses features with this configuration. Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM i.MX35: build in pinctrl support.Denis Carikli1-1/+1
shawn.guo: While at it, we drop 'select PINCTRL' from SOC_IMX35, since it's been covered by ARCH_MXC. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx_v6_v7_defconfig: Enable backlight gpio support.Denis Carikli1-0/+1
The eukrea mbimxsd51 has a gpio backlight for its LCD display, so we turn that driver on. Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: add cpuidle support for i.mx6slAnson Huang6-0/+93
Add cpuidle support for i.MX6SL, currently only support two cpuidle levels(ARM wfi and WAIT mode), and add software workaround for WAIT mode errata as below: ERR005311 CCM: After exit from WAIT mode, unwanted interrupt(s) taken during WAIT mode entry process could cause cache memory corruption. Software workaround: To prevent this issue from occurring, software should ensure that the ARM to IPG clock ratio is less than 12:5 (that is < 2.4x), before entering WAIT mode. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: AHB rate must be set to 132MHz on i.mx6slAnson Huang1-1/+8
The reset value of AHB divider is 3, so current AHB rate is 99MHz which is not correct for kernel, need to ensure AHB rate is 132MHz in clk driver, as ipg is sourcing from AHB, and it should be 66MHz by default. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx: Use INT_MEM_CLK_LPM as the bit nameFabio Estevam3-6/+6
Bit 17 of register CCM_CGPR is called INT_MEM_CLK_LPM as per the mx6 reference manual, so use this name instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05ARM: imx_v6_v7_defconfig: Select PCI supportFabio Estevam1-0/+2
Let PCI driver be enabled by default. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-03-05Merge tag 'kconfig-cleanup-for-3.15' into imx/socShawn Guo33-228/+12
- Remove common kconfig options required by multi-platform builds out of individual platforms as they are redundant. - Make SMP, CACHE_L2X0 and GPIO config options user visible on multi-platform builds as most platforms enable these options and all platforms can run with them enabled. - Make multi-platform v6 default to more optimal v6k rather than v6 - Remove the last bit of mach-virt and convert it to just a kconfig option. Conflicts: arch/arm/mach-omap2/Kconfig
2014-03-01ARM: rockchip: add smp bringup codeHeiko Stuebner5-0/+239
This adds the necessary smp-operations and startup code to use additional cores on Rockchip SoCs. We currently hog the power management unit in the smp code, as it is necessary to control the power to the cpu core and nothing else is currently using it, so a generic implementation can be done later. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Ulrich Prinz <ulrich.prinz@googlemail.com>
2014-03-01ARM: rockchip: add power-management-unitHeiko Stuebner2-0/+21
The pmu is needed to bring up the cores during smp operations and later also other system parts. Therefore add a node and documentation for it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Ulrich Prinz <ulrich.prinz@googlemail.com>
2014-03-01ARM: rockchip: add sram dt nodes and documentationHeiko Stuebner3-0/+56
Add dt-nodes for the sram on rk3066 and rk3188 including the reserved section needed for smp bringup. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Ulrich Prinz <ulrich.prinz@googlemail.com>
2014-03-01ARM: rockchip: add snoop-control-unitHeiko Stuebner2-0/+6
This adds the device-node and config select to enable the scu in all Rockchip Cortex-A9 SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Ulrich Prinz <ulrich.prinz@googlemail.com>
2014-03-01Merge tag 'for-v3.15/omap-hwmod-clk-prcm-a' of ↵Tony Lindgren7-6/+26
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.15/prcm Some low-level optimizations and fixes that don't belong in an -rc series for various OMAP-family chips, targeted for v3.15. Basic build, boot, and PM test logs are available here: http://www.pwsan.com/omap/testlogs/prcm-a-for-v3.15/20140228124518/
2014-03-01ARM: OMAP2+: remove OMAP_PACKAGE_ZAC and OMAP_PACKAGE_ZAFPaul Bolle2-10/+0
The Kconfig symbols OMAP_PACKAGE_ZAC and OMAP_PACKAGE_ZAF were added in v2.6.36. They have never been used. Setting them has no effect. These symbols can safely be removed. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> [tony@atomide.com: updated to remove also the related mux.h entries] Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-01ARM: OMAP2+: AM43x: Use gptimer as clocksourceRajendra Nayak2-2/+3
The SyncTimer in AM43x is clocked using the following two sources: 1) An inaccuarte 32k clock (CLK_32KHZ) derived from PER DPLL, causing system time to go slowly (~10% deviation). 2) external 32KHz RTC clock, which may not always be available on board like in the case of ePOS EVM Use gptimer as clocksource instead, as is done in the case of AM335x (which does not have a SyncTimer). With this, system time keeping works accurately. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-01ARM: OMAP2+: AM43x: determine featuresAfzal Mohammed2-0/+3
Determine AM43x device features by reusing AM335x helper as feature register layout is similar. And also exporting AM43xx family name. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-03-01ARM: OMAP2+: AM43x: Add ID for ES1.1Lokesh Vutla2-3/+14
Adding ID for AM437x ES1.1 silicon. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-29 04:01:00 +0300