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2012-11-21pinctrl/u300/coh901: stop spawning pinctrl from GPIOLinus Walleij3-9/+1
Let's stop spawning the pinctrl driver from the GPIO driver, we have these two mechanisms broken apart now, and they can each probe in isolation. If the GPIO driver cannot find its pin controller (pinctrl-u300), the pin controller core will tell it to defer probing. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-21pinctrl/u300/coh901: let the gpio_chip register the rangeLinus Walleij2-53/+49
Instead of having the pinctrl driver register the GPIO range for the gpio_chip, making it necessary to instantiate the pin controller from the GPIO driver and pass the GPIO chip as platform data, now let the GPIO chip driver register it's own ranges and have the pinctrl driver look up the GPIO chip from the pinctrl core as necessary. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-21pinctrl: add function to retrieve range from pinLinus Walleij2-0/+27
This adds a function to the pinctrl core to retrieve the GPIO range associated with a certain pin for a certain controller. This is needed when a pinctrl driver want to look up the corresponding struct gpio_chip for a certain pin. As the GPIO drivers can now create these ranges themselves, the pinctrl driver no longer knows about all its associated GPIO chips. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-21gpiolib: return any error code from range creationLinus Walleij1-1/+2
If we try to create a range for a certain GPIO chip and the target pin controller is not yet available it may return a probe deferral error code, so handle this all the way our by checking the error code. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-21pinctrl: make range registration defer properlyLinus Walleij1-1/+6
This makes the pinctrl_find_and_add_gpio_range() return -EPROBE_DEFER if the range hosting pin controller cannot be located. We may assume that the common case for why adding a range fails is that the targe pin controller device has not probed yet. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-21gpiolib: rename find_pinctrl_*Linus Walleij3-4/+4
Rename the function find_pinctrl_and_add_gpio_range() to pinctrl_find_and_add_gpio_range() so as to be consistent with the rest of the functions. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-21gpiolib: let gpiochip_add_pin_range() specify offsetLinus Walleij4-6/+47
Like with commit 3c739ad0df5eb41cd7adad879eda6aa09879eb76 it is not always enough to specify all the pins of a gpio_chip from offset zero to be added to a pin map range, since the mapping from GPIO to pin controller may not be linear at all, but need to be broken into a few consecutive sub-ranges or 1-pin entries for complicated cases. The ranges may also be sparse. This alters the signature of the function to accept offsets into both the GPIO-chip local pinspace and the pin controller local pinspace. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: nomadik: Staticize non-exported symbolsAxel Lin1-14/+12
They are not referenced outside of this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: nomadik: Prevent NULL dereference if of_match_device returns NULLAxel Lin1-3/+8
of_match_device() may return NULL. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: single: dump pinmux register valueHaojian Zhuang1-4/+4
Dump pinmux register value, not only function part in the pinmux register. Also fix the issue on caluclating pin offset. The last parameter should be pin number, not register offset. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15Pinctrl/spear: plgpio: don't call prepare/unprepareViresh Kumar1-4/+15
SPEAr SoC's don't do anything in clk_prepare() of plgpio driver, so there is no need to call this routine multiple times. Just call it once at probe. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: plgpio: Call clk_disable_unprepare only if clk_prepare_enable is calledAxel Lin1-1/+2
This driver allows clk_get() failure, and still work without it. This patch adds !IS_ERR(plgpio->clk) checking in plgpio_request() error path so we only call clk_disable_unprepare() if clk_prepare_enable() is called. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: spear: Make get_gpio_pingroup return NULL when no gpio_pingroup foundAxel Lin1-3/+3
Currently get_gpio_pingroup() may return NULL or ERR_PTR(-EINVAL) when no gpio_pingroup found. The caller in gpio_request_endisable() only checks if the return value is NULL. Return ERR_PTR(-EINVAL) for get_gpio_pingroup() causes problem and seems not necessary. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: coh901: Return proper error if irq_domain_add_linear() failsAxel Lin1-2/+4
Return -ENOMEM instead of 0 if irq_domain_add_linear fails. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: spear: Fix the logic of setting reg in pmx_init_gpio_pingroup_addrAxel Lin1-3/+3
Current code does not work if count > 1, fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: imx: Fix the logic checking if not able to find pin reg mapAxel Lin1-1/+1
Current code sets "pin_reg = &info->pin_regs[i];" in each loop iteration, so in the case of no-match, pin_reg is not NULL. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: tegra: Staticize non-exported symbolsAxel Lin1-10/+12
They are not referenced outside of this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl/nomadik: db8540: split clkout groupPatrice Chotard1-5/+10
The clkout group is split into groups clkout1 and clkout2 which allows pins cklkout1 and clkout2 to be muxed separately. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl/nomadik: db8500: split clkout groupPatrice Chotard1-7/+14
The clkout group is split into groups clkout1 and clkout2 which allows pins cklkout1 and clkout2 to be muxed separately. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: pxa3xx: Remove phy_base and phy_size from struct pxa3xx_pinmux_infoAxel Lin2-4/+0
They are not used, remove them. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: pxa3xx: Use devm_request_and_ioremapAxel Lin1-8/+2
Use managed resources API to simplify the code. Also ensure we do request mem_region before ioremap. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-15pinctrl: tegra: Make PINCTRL_TEGRA select PINMUX && PINCONFAxel Lin1-4/+2
Then we can remove "select PINMUX && PINCONF" from PINCTRL_TEGRA{20,30}. This simplifies the dependency. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-13pinctrl: mxs: Make PINCTRL_MXS select PINMUX && PINCONFAxel Lin1-4/+2
Then we can remove "select PINMUX && PINCONF" from PINCTRL_IMX{23,28}. This simplifies the dependency. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-13pinctrl: spear: Staticize non-exported symbolsAxel Lin1-5/+7
They are not referenced outside of this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: pinmux: Release all taken pins in pinmux_enable_setting error pathsAxel Lin1-7/+21
Currently pinmux_enable_setting does not release all taken pins if ops->enable() returns error. This patch ensures all taken pins are released in any error paths. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: lantiq: Staticize non-exported symbolsAxel Lin1-6/+6
Both ltq_pinctrl_dt_node_to_map() and ltq_pinctrl_dt_free_map() are not referenced outside of this file. Make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: lantiq: Remove ltq_pmx_disable() functionAxel Lin1-11/+0
Current code adds empty ltq_pmx_disable() because pinmux_check_ops() requires this callback to be defined. This is not required since commit 02b50ce4cb1 "pinctrl: make pinmux disable function optional". Thus remove ltq_pmx_disable() function. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: SPEAr: Add SoC specific gpio configuration routinesShiraz Hashim3-14/+53
Different SPEAr SoCs have different approach to configure pins as gpios. Some configure a group of gpios with single register bit and others have one bit per gpio pin. Only earlier one is implemented till now, this patch adds support for later one. Here we add callbacks to SoC specific code to configure gpios in gpio_request_enable(). That will do additional SoC specific configuration to enable gpio pins. We also implement this callback for SPEAr1340 in this patch. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: Staticize pinconf_opsAxel Lin7-7/+7
They are not referenced outside respective driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Simon Arlott <simon@fire.lp0.eu> Cc: John Crispin <blogic@openwrt.org> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11Merge branch 'nomadik' into develLinus Walleij15-165/+303
2012-11-11Merge branch 'at91' into develLinus Walleij42-446/+2794
2012-11-11ARM: SPEAr: Add plgpio node in device tree dtsi filesViresh Kumar7-2/+108
This patch adds plgpio nodes in SPEAr DT files. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: SPEAr: Add gpio ranges supportViresh Kumar8-17/+447
Most of SPEAr SoCs, which support pinctrl, can configure & use pads as gpio. This patch gpio enable support for SPEAr pinctrl drivers. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11gpiolib: iron out include ladder mistakesLinus Walleij2-25/+38
The <*/gpio.h> includes are updated again: now we need to account for the problem introduced by commit: 595679a8038584df7b9398bf34f61db3c038bfea "gpiolib: fix up function prototypes etc" Actually we need static inlines in include/asm-generic/gpio.h as well since we may have GPIOLIB but not PINCTRL. Make sure to move all the CONFIG_PINCTRL business to the end of the file so we are sure we have declared struct gpio_chip. And we need to keep the static inlines in <linux/gpio.h> but here for the !CONFIG_GENERIC_GPIO case, and then we may as well throw in a few warnings like the other prototypes there, if someone would have the bad taste of compiling without GENERIC_GPIO even. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11gpiolib: separation of pin concernsLinus Walleij6-28/+20
The fact that of_gpiochip_add_pin_range() and gpiochip_add_pin_range() share too much code is fragile and will invariably mean that bugs need to be fixed in two places instead of one. So separate the concerns of gpiolib.c and gpiolib-of.c and have the latter call the former as back-end. This is necessary also when going forward with other device descriptions such as ACPI. This is done by: - Adding a return code to gpiochip_add_pin_range() so we can reliably check whether this succeeds. - Get rid of the custom of_pinctrl_add_gpio_range() from pinctrl. Instead create of_pinctrl_get() to just retrive the pin controller per se from an OF node. This composite function was just begging to be deleted, it was way to purpose-specific. - Use pinctrl_dev_get_name() to get the name of the retrieved pin controller and use that to call back into the generic gpiochip_add_pin_range(). Now the pin range is only allocated and tied to a pin controller from the core implementation in gpiolib.c. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11gpiolib: call pin removal in chip removal functionLinus Walleij1-0/+1
This makes us call gpiochio_remove_pin_ranges() in the gpiochip_remove() function, so we get rid of ranges when freeing the chip. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11gpiolib: remove duplicate pin range codeLinus Walleij1-12/+1
Commit 69e1601bca88809dc118abd1becb02c15a02ec71 "gpiolib: provide provision to register pin ranges" Introduced both of_gpiochip_remove_pin_range() and gpiochip_remove_pin_ranges(). But the contents are exactly the same so remove the OF one and rely on the range deletion in the core. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11gpiolib-of: staticize the pin range callsLinus Walleij1-4/+4
Commit 69e1601bca88809dc118abd1becb02c15a02ec71 "gpiolib: provide provision to register pin ranges" Declared the of_gpiochip_[add|remove]_pin_range() global while they should be static as they are only ever used in this file. Let's convert them to static. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11gpiolib: fix up function prototypes etcLinus Walleij3-11/+29
Commit 69e1601bca88809dc118abd1becb02c15a02ec71 "gpiolib: provide provision to register pin ranges" Got most of it's function prototypes wrong, so fix this up by: - Moving the void declarations into static inlines in <linux/gpio.h> (previously the actual prototypes were declared here...) - Declare the gpiochip_add_pin_range() and gpiochip_remove_pin_ranges() functions in <asm-generic/gpio.h> together with the pin range struct declaration itself. - Actually only implement these very functions in gpiolib.c if CONFIG_PINCTRL is set. - Additionally export the symbols since modules will need to be able to do this. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: sirf: Staticize non-exported symbolAxel Lin1-2/+2
Staticize sirfsoc_gpio_irq_map() function. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: u300: Staticize non-exported symbolsAxel Lin1-6/+4
Staticize u300_pin_config_get() and u300_pin_config_set() functions. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl/u300: use managed resourcesLinus Walleij1-28/+4
This converts the U300 pin controller to use managed resources (devm_*) for it's memory region. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl/coh901: convert to use managed resourcesLinus Walleij1-43/+19
This switches the COH 901 pin controller to use managed resources (devm_*) for memory remaps, clocks, etc. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl/coh901: use irqdomain, allocate irqdescsLinus Walleij4-27/+46
This switches the COH 901 pinctrl driver to allocate its GPIO IRQs dynamically, and start to use a linear irqdomain to map from the hardware IRQs. This way we can cut away the complex allocation of IRQ numbers from the <mach/irqs.h> file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11ARM: U300: bump IRQs to offset 32Linus Walleij2-59/+59
The U300 IRQs were bumped once to offset to 1 (in order to avoid using IRQ 0 which is now NO_IRQ). This was OK as we were still passing the number of irqs in the .nr_irqs field of the machine, with descriptors allocated at boot time. However .nr_irqs should be 0, leading the system to reserve the first 16 IRQs. Then the VIC driver will complain that IRQs 1 thru 15 are pre-allocated, so to avoid this and use free descriptors, move all IRQs up to offset 32. This will all be done away with as we migrate to device tree, so it is an interim solution. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: SPEAr: Add plgpio driverViresh Kumar3-0/+754
Most of SPEAr SoCs, which support pinctrl, can configure & use pads as gpio. This patch adds plgpio driver for configuring these pads as gpio. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11gpiolib: provide provision to register pin rangesShiraz Hashim10-0/+251
pinctrl subsystem needs gpio chip base to prepare set of gpio pin ranges, which a given pinctrl driver can handle. This is important to handle pinctrl gpio request calls in order to program a given pin properly for gpio operation. As gpio base is allocated dynamically during gpiochip registration, presently there exists no clean way to pass this information to the pinctrl subsystem. After few discussions from [1], it was concluded that may be gpio controller reporting the pin range it supports, is a better way than pinctrl subsystem directly registering it. [1] http://comments.gmane.org/gmane.linux.ports.arm.kernel/184816 Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> [Edited documentation a bit] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11Revert "pinctrl: remove pinctrl_remove_gpio_range"Viresh Kumar2-0/+16
This reverts earlier commit which removed pinctrl_remove_gpio_range(), because at that time there weren't any more users of that routine. It was removed as the removal of ranges was done in unregister of pinctrl. But as we are now registering stuff from gpiolib, we may remove and insert a gpio module multiple times. So, we need this routine again. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: exynos: Add terminating entry for of_device_id tableAxel Lin1-0/+1
The of_device_id table is supposed to be zero-terminated. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-11pinctrl: sirf: enable the driver support new SiRFmarco SoCBarry Song2-13/+39
The driver supports old up SiRFprimaII SoCs, this patch makes it support the new SiRFmarco as well. SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to disable GPIO pad, we should write 1 to the corresponding bit in the new CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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