index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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2013-12-05
Merge branch 'clk/clk-unregister' of git://linuxtv.org/snawrocki/samsung into...
Mike Turquette
11
-19
/
+235
2013-12-04
clk: exynos5420: fix cpll clock register offsets
Chander Kashyap
1
-2
/
+2
2013-12-04
clk: Implement clk_unregister
Sylwester Nawrocki
2
-3
/
+120
2013-12-04
clk: Add common __clk_get(), __clk_put() implementations
Sylwester Nawrocki
7
-0
/
+42
2013-12-04
clkdev: Fix race condition in clock lookup from device tree
Sylwester Nawrocki
1
-2
/
+10
2013-12-04
clk: Provide not locked variant of of_clk_get_from_provider()
Sylwester Nawrocki
2
-8
/
+46
2013-12-04
omap3isp: Modify clocks registration to avoid circular references
Sylwester Nawrocki
2
-6
/
+17
2013-12-04
clk: hisilicon: add common clock support
Haojian Zhuang
8
-0
/
+823
2013-12-03
Merge branch 'clk-tegra-next' of git://nv-tegra.nvidia.com/user/pdeschrijver/...
Mike Turquette
20
-3013
/
+5091
2013-12-02
Merge tag 'sunxi-clk-for-3.13' of https://github.com/mripard/linux into clk-n...
Mike Turquette
3
-14
/
+76
2013-11-28
clk: tegra: fix __clk_lookup() return value checks
Wei Yongjun
1
-4
/
+4
2013-11-28
clk: tegra: Do not print errors for clk_round_rate()
Thierry Reding
1
-6
/
+3
2013-11-28
clk: socfpga: Remove check for "reg" property in socfpga_clk_init
Dinh Nguyen
1
-3
/
+1
2013-11-28
clk: fixed-factor: Fix device-tree binding typo
Ezequiel Garcia
1
-2
/
+2
2013-11-28
clk: clean up everything on debugfs error
Alex Elder
1
-1
/
+2
2013-11-26
clk: tegra: Initialize DSI low-power clocks
Thierry Reding
1
-0
/
+2
2013-11-26
clk: tegra: add FUSE clock device
Alexandre Courbot
4
-1
/
+4
2013-11-26
clk: tegra: Properly setup PWM clock on Tegra30
Thierry Reding
1
-1
/
+3
2013-11-26
clk: tegra: Initialize secondary gr3d clock on Tegra30
Thierry Reding
1
-0
/
+1
2013-11-26
clk: tegra114: Initialize clocks needed for HDMI
Mikko Perttunen
1
-0
/
+2
2013-11-26
clk: tegra124: add suspend/resume function for tegra_cpu_car_ops
Joseph Lo
1
-0
/
+27
2013-11-26
clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_ops
Joseph Lo
1
-0
/
+26
2013-11-26
clk: tegra124: Add support for Tegra124 clocks
Peter De Schrijver
4
-0
/
+1771
2013-11-26
clk: tegra124: Add new peripheral clocks
Peter De Schrijver
1
-0
/
+69
2013-11-26
clk: tegra124: Add common clk IDs to clk-id.h
Peter De Schrijver
1
-0
/
+22
2013-11-26
clk: tegra: add TEGRA_PERIPH_NO_GATE
Peter De Schrijver
3
-3
/
+22
2013-11-26
clk: tegra: add locking to periph clks
Peter De Schrijver
2
-19
/
+24
2013-11-26
clk: tegra: Add periph regs bank X
Peter De Schrijver
1
-0
/
+10
2013-11-26
clk: tegra: Add support for PLLSS
Peter De Schrijver
2
-2
/
+126
2013-11-26
clk: tegra: move tegra20 to common infra
Peter De Schrijver
1
-402
/
+255
2013-11-26
clk: tegra: move tegra30 to common infra
Peter De Schrijver
1
-895
/
+403
2013-11-26
clk: tegra: introduce common gen4 super clock
Peter De Schrijver
4
-74
/
+155
2013-11-26
clk: tegra: move PMC, fixed clocks to common files
Peter De Schrijver
5
-74
/
+253
2013-11-26
clk: tegra: move periph clocks to common file
Peter De Schrijver
6
-581
/
+627
2013-11-26
clk: tegra: move audio clk to common file
Peter De Schrijver
4
-208
/
+402
2013-11-26
clk: tegra: add clkdev registration infra
Peter De Schrijver
3
-159
/
+179
2013-11-26
clk: tegra: add common infra for DT clocks
Peter De Schrijver
2
-0
/
+16
2013-11-26
clk: tegra: add header for common tegra clock IDs
Peter De Schrijver
1
-0
/
+213
2013-11-26
clk: tegra: move fields to tegra_clk_pll_params
Peter De Schrijver
5
-177
/
+175
2013-11-26
clk: tegra: use pll_ref as the pll_e parent
Peter De Schrijver
2
-4
/
+7
2013-11-26
clk: tegra: move some PLLC and PLLXC init to clk-pll.c
Peter De Schrijver
2
-93
/
+111
2013-11-26
clk: tegra: Add TEGRA_PERIPH_NO_DIV flag
Peter De Schrijver
2
-3
/
+9
2013-11-26
clk: tegra: common periph_clk_enb_refcnt and clks
Peter De Schrijver
6
-108
/
+85
2013-11-26
clk: tegra: simplify periph clock data
Peter De Schrijver
7
-584
/
+464
2013-11-26
clk: tegra: Fix clock rate computation
Thierry Reding
1
-0
/
+2
2013-11-26
ARM: tegra30: add missing CLK IDs
Peter De Schrijver
1
-1
/
+9
2013-11-26
clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3d
Thierry Reding
2
-6
/
+6
2013-11-26
clk: tegra: PLLE spread spectrum control
Peter De Schrijver
1
-1
/
+29
2013-11-26
clk: tegra: Set the clk parent of host1x to pll_p
Andrew Chew
1
-0
/
+1
2013-11-26
clk: tegra: add TEGRA_DIVIDER_ROUND_UP for periph clks
Peter De Schrijver
2
-33
/
+39
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