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2018-09-25arm64: dts: broadcom: Use the .dtb name in the rule, rather than .dtsLiviu Dudau1-1/+1
Commit a7eb26392b893 ("arm64: dts: broadcom: Add reference to Compute Module IO Board V3") adds the bcm2837-rpi-cm3-io3.dts file as a target in the Makefile, rather than the .dtb name. This will skip the generation of the .dtb file at compile time and will fail the dtbs_install target. Fixes: a7eb26392b893 ("arm64: dts: broadcom: Add reference to Compute Module IO Board V3") Signed-off-by: Liviu Dudau <liviu@dudau.co.uk> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'samsung-soc-4.20' of ↵Olof Johansson6-108/+97
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt Samsung mach/soc changes for v4.20 1. Fix imprecise abort during Odroid XU3-family suspend to RAM (but it is not end of work needed for suspend). 2. Cleanup and fix of SD card write protect on MINI2440. * tag 'samsung-soc-4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: s3c24xx: Restore proper usage of pr_info/pr_cont ARM: s3c24xx: Correct SD card write protect detection on Mini2440 ARM: s3c24xx: Consistently use tab for indenting member assignments ARM: s3c24xx: formatting cleanup in mach-mini2440.c ARM: s3c24xx: Remove empty gta02_pmu children probe ARM: exynos: Fix imprecise abort during Exynos5422 suspend to RAM ARM: exynos: Store Exynos5420 register state in one variable Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'hisi-arm32-dt-for-4.20' of git://github.com/hisilicon/linux-hisi ↵Olof Johansson1-170/+176
into next/dt ARM: DT: Hisilicon ARM32 SoCs updates for 4.20 - Switch to updated coresight bindings for hip04 SoC * tag 'hisi-arm32-dt-for-4.20' of git://github.com/hisilicon/linux-hisi: arm: dts: hip04: Update coresight bindings for hardware ports Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'hisi-arm64-dt-for-4.20' of git://github.com/hisilicon/linux-hisi ↵Olof Johansson6-95/+299
into next/dt ARM64: DT: Hisilicon SoC DT updates for 4.20 - Add missing clocks for Hi6220 - Switch to updated coresight bindings for Hi6220 - Add DT bindings and support for Hi3670 SoC and HiKey970 board * tag 'hisi-arm64-dt-for-4.20' of git://github.com/hisilicon/linux-hisi: arm64: dts: Add devicetree support for HiKey970 board dt-bindings: arm: hisilicon: Add binding for HiKey970 board arm64: dts: Add devicetree for Hisilicon Hi3670 SoC dt-bindings: arm: hisilicon: Add binding for Hi3670 SoC arm64: dts: hi6220: Update coresight bindings for hardware ports arm64: dts: hisilicon: Add missing clocks property for CPUs Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'stm32-dt-for-v4.20-1' of ↵Olof Johansson8-17/+74
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt STM32 DT updates for v4.20, round 1 Highlights: ---------- - MCU platforms update: - Add missing clock node's lobel on stm32f429 - Remove cd-inverted property for sdio nodes for all mcus - Fix stm32h7 rtc binding - MPU STM32MP157 platform update: - Enable display: CEC and DSI - Fix SPI node name to match with the new DTC * tag 'stm32-dt-for-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: Fix SPI controller node names ARM: dts: stm32: enable display on stm32mp157c-ev1 board ARM: dts: stm32: update rtc st,syscfg property on stm32h743 ARM: dts: stm32: Remove cd-inverted property for stm32f746-disco ARM: dts: stm32: Remove cd-inverted property for stm32f769-disco ARM: dts: stm32: Remove cd-inverted property for stm32f469-disco ARM: dts: stm32: Remove cd-inverted property for stm32429i-eval ARM: dts: stm32: Add clk-lse node's label on stm32f429 Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'ux500-dts-arm-soc' of ↵Olof Johansson8-44/+56
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt Ux500 DTS changes for the v4.20 kernel cycle. Assorted housekeeping DTS patches. * tag 'ux500-dts-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: dts: ux500: Mark PRCMU as syscon compatible arm: dts: ste: Update coresight bindings for hardware port ARM: dts: ste: Fix SPI controller node names ARM: dts: ux500: Get rid of DTC warnings ARM: dts: ux500: Fix LCDA clock line muxing dt-bindings: arm: scu: Correct example SCU unit addresses ARM: dts: ux500: Correct SCU unit address Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'aspeed-4.20-devicetree' of ↵Olof Johansson6-2/+404
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt ASPEED device tree updates for 4.20 - Two new ast2500-based machines: * Facebook TiogaPass (x86 server) * HXT StarDragon 4800 Reference Evaluation Platform 2 (arm64 server) - Updates for the Quanta q71l system - i2c device tree cleanups * tag 'aspeed-4.20-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: dts: aspeed: Adding Facebook TiogaPass BMC ARM: dts: aspeed: Add HXT StarDragon 4800 REP2 BMC ARM: dts: aspeed: quanta-q71l: Enable adc & ibt nodes ARM: dts: aspeed: quanta-q71l: Add four PSUs ARM: dts: aspeed: quanta-q71l: add aliases for i2c ARM: dts: aspeed: Fix I2C bus warnings Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'am654-for-v4.20' of ↵Olof Johansson5-27/+147
git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into next/dt TI AM654 support for v4.20 merge window. This branch adds changes for the Texas Instruments AM654 SoC. Included changes are: - Add uart nodes - Change address cells and size-cells of interconnect tfrom 1 to 2 - Add secure proxy instance for main domain - Add DMSC support * tag 'am654-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: ti: k3-am6: Add Device Management Security Controller support arm64: dts: ti: am654: Add secure proxy instance for main domain arm64: dts: ti: am654: Add uart nodes arm64: dts: ti: k3-am65: Change #address-cells and #size-cells of interconnect to 2 Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'juno-updates-4.20' of ↵Olof Johansson3-121/+106
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt ARMv8 Juno/Vexpress updates for v4.20 1. Enablement of scatter gather mode for CoreSight TMC-ETR routing 2. Usage of updated coresight graph bindings that eliminates loads of dtc warnings * tag 'juno-updates-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Enable coresight tmc scatter gather in ETR arm64: dts: juno: Update entries to match latest coresight bindings Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'arm-soc/for-4.20/devicetree-arm64' of ↵Olof Johansson5-6/+9
https://github.com/Broadcom/stblinux into next/dt This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 4.20, please pull the following: - Stefan provides a reference to the Compute Module IO Board V3 such that we can reference the arm counterpart and still build it for arm64 - Rob fixes I2C and SPI bus warnings which are going to show up with his update to DTC scheduled for 4.20 * tag 'arm-soc/for-4.20/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: Fix I2C and SPI bus warnings arm64: dts: broadcom: Add reference to Compute Module IO Board V3 Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'arm-soc/for-4.20/devicetree' of ↵Olof Johansson14-4/+351
https://github.com/Broadcom/stblinux into next/dt This pull request contains Broadcom ARM-based SoCs Device Tree changes for 4.20, please pull the following: - Rafal updates the Broadcom BCM5301x (Northstar) DTS files to use the new style partition parser and removes the unsupported/undocumented linux,part-probe properties that were previously introduced - Stefan adds supports for the Raspberry Pi Compute Module 3/3Lite, he also updates the Raspberry Pi 3B+ USB Ethernet adapter to have proper LED configuration - Rob fixes a bunch of SPI bus warnings in the Northstar Plus and Hurricane 2 DTS files - Florian documents the Broadcom roboswitch Switch Register Access Block (SRAB) interrupts, adds the switch interrupts to the Northstar Plus DTS include file and finally updates the BCM958625HR reference board to have the proper SFP module definition * tag 'arm-soc/for-4.20/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: bcm: Fix SPI bus warnings ARM: dts: NSP: Wire up switch interrupts dt-bindings: net: dsa: Document B53 SRAB interrupts and registers ARM: dts: NSP: Enable SFP on bcm958625hr ARM: dts: bcm283x-rpi-lan7515: Enable Ethernet LEDs ARM: dts: BCM5301X: Specify flash partitions ARM: dts: add Raspberry Pi Compute Module 3 and IO board dt-bindings: bcm: Add Raspberry Pi CM3 and CM3L Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'amlogic-dt64' of ↵Olof Johansson4-828/+1136
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Amlogic ARM64 DT updates for v4.20 - AXG: cleanup/reorder nodes - AXG: add audio PDM support for s400 board - GX: increase CMA memory size - GX: new canvas driver * tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson: Switch simple-mfd and syscon order arm64: dts: meson-axg-s400: Add chosen and memory nodes arm64: dts: meson-axg: use the proper compatible for ethmac arm64: dts: meson-axg: s400: add pdm to the sound card arm64: dts: meson-axg: s400: add dmic codec arm64: dts: meson-axg: add pdm arm64: dts: meson-gx: add dmcbus and canvas nodes. arm64: dts: meson: libretech: update board model arm64: dts: meson-gx: increase default shared CMA pool size arm64: dts: meson-axg: sort nodes consistently arm64: dts: meson-axg: s400: add sound card arm64: dts: meson-axg: s400: enable audio devices arm64: dts: meson-axg: add audio fifos Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'v4.20-rockchip-dts64-1' of ↵Olof Johansson12-20/+3083
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt New soc support for the px30 quad-core Cortex-A35. New boards are the px30 eval board and roc-rk3399-pc. The rk3328 got support for the one gpio controlled via the general register files and the rk3399 finally got its idle-states defined. And finally fixes and improvements for firefly-rk3399 (wifi), roc-rk3328-cc (sdmmc-uhs, io-domains), rk3328-rock64 (gpio-regulator pin fix) and rk3399-sapphire (gpio-regulator pin fix, pmic pin fix and type-c port supply). * tag 'v4.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Add type-c port supply on rk3399-sapphire board arm64: dts: rockchip: fix vcc_host1_5v pin assign on rk3328-rock64 arm64: dts: rockchip: add WiFi module support for Firefly-RK3399 arm64: dts: rockchip: remove dvs2 pinctrl from pmic on rk3399-sapphire arm64: dts: rockchip: Fix VCC5V0_HOST_EN on rk3399-sapphire arm64: dts: rockchip: re-order vcc_sys on rk3399-sapphire arm64: dts: rockchip: add missing vop properties for px30 arm64: dts: rockchip: Add idle-states to device tree for rk3399 arm64: dts: rockchip: add sdmmc UHS support for roc-rk3328-cc arm64: dts: rockchip: add GRF GPIO controller to rk3328 arm64: dts: rockchip: add io-domain to roc-rk3328-cc arm64: dts: rockchip: add PX30 evaluation board devicetree arm64: dts: rockchip: add core dtsi file for PX30 SoCs dt-bindings: rockchip: grf: add grf and pmugrf description for px30 arm64: dts: rockchip: add support for ROC-RK3399-PC board Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'renesas-arm64-dt-for-v4.20' of ↵Olof Johansson27-363/+3462
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Renesas ARM64 Based SoC DT Updates for v4.20 * Correct whitespace around assignments * R-Car Gen-3 SoCs: - Enable SDR104 for SD devices - Include R-Car product name in DTSI files to ease maintenance * R-Car Gen-3 SoC based boards: Convert to new LVDS DT bindings * R-Car Gen 3 Salvator-X and Salvator-XS boards: - Override secondary addresses of ADV748x to avoid address conflicts * R-Car Gen 3 based Salvator-XS board: Enable SATA * R-Car M3-N (r8a77965) SoC: - Add FDP1 device nodes - Move arm_cc630p and timer nodes to restore sort-order of file - Correct clock/reset for usb2_phy1 - Correct HS-USB compat string - Add OPPs table for cpu devices enabling CPUFreq support - Add CAN device placeholder nodes to facilitate adding initial device tree for KF daughter board - Attach SYS-DMAC to the IPMMU * R-Car M3-N (r8a77965) based ULCB board: - Initial device tree for board and KF daughter board * R-Car E3 (r8a77990) SoC: - Add SYS-DMAC, I2C VIN, CSI-2, MSIOF device nodes - Add BRG support to SCIF2 which allows an increase in serial clock accuracy - Use CPG/MSSR and SYSC binding definitions * R-Car E3 (r8a77990) based Ebisu board: Enable PWM * R-Car D3 (r8a77995) SoC: Attach the SYS-DMAC to the IPMMU * R-Car D3 (r8a77995) based Draak board: Sort device nodes * R-Car V3H (r8a77980) based V3HSK board: - Move lvds0 node to restore sort-order of file * R-Car V3H (r8a77980) SoC: - Add RWDT, CSI2 and VIN, Cortex-A53 PMU nodes - Move IPMMU and CAN clock nodes to restore sort-order of file * R-Car V3M (r8a77970) SoC: - Add MMC nodes - Move CAN clock node to restore sort-order of file * R-Car V3M (r8a77970) based V3MSK board: Add eMMC support * R-Car V3H (r8a77980) based Condor board: Add PCIe, DU, LVDS and HDMI support * RZ/G2M (r8a774a1) SoC: - Initial device tree - Add SYS-DMAC, SCIF, HSCIF, INTC-EX, EtherAVB, RWDT, pinctl, GPIO, SDHI, I2C, IIC-DVFS, thermal, IPMMU, MSIOF, Cortex-A53 CPU core, PWM, Audio, FCPF, FCPV, USB2.0, USB-DMAC, HSUSB and USB3.0 device nodes * tag 'renesas-arm64-dt-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (58 commits) arm64: dts: r8a77965: add FDP1 device nodes arm64: dts: renesas: draak: Sort device nodes arm64: dts: renesas: enable SDR104 on R-Car Gen3 arm64: dts: renesas: r8a77990: Add SYS-DMAC device nodes arm64: dts: renesas: r8a77990: Add I2C device nodes arm64: dts: renesas: r8a77990: Add VIN and CSI-2 device nodes arm64: dts: renesas: r8a77990: Add all MSIOF nodes arm64: dts: renesas: r8a7795: Move arm_cc630p node arm64: dts: renesas: r8a77990: Add BRG support to SCIF2 arm64: dts: renesas: r8a77990: Use CPG/MSSR and SYSC binding definitions arm64: dts: renesas: salvator-xs: Improve SATA switch settings comments arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1 arm64: dts: renesas: r8a77965: Fix HS-USB compatible arm64: dts: renesas: r8a77965: Move timer node arm64: dts: renesas: v3hsk: Move lvds0 node arm64: dts: renesas: Fix whitespace around assignments arm64: dts: renesas: r8a77965: m3nulcb-kf: Initial device tree arm64: dts: renesas: condor: add PCIe support arm64: dts: renesas: r8a77980: add PCIe support arm64: dts: renesas: r8a774a1: Add USB3.0 device nodes ... Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-23Merge tag 'renesas-arm-dt-for-v4.20' of ↵Olof Johansson12-25/+178
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Renesas ARM Based SoC DT Updates for v4.20 * R-Car Gen1 SoCs: Include product name in DTSI files for ease of maintenance * R-Car Gen2 SoCs: - Convert to new DU DT bindings - Correct SATA device sizes to 2 MiB * R-Car H2 (r8a7790) based Porter board: Add DA9063 OnKey PMIC node * R-Car E2 (r8a7794) based Silk board: Add DA9063 PMIC, RTC and OnKey nodes * R-Car M2-N (r8a7793) based Gose board: Add DA9210 node for CPU DVFS * RZ/G1C (R8A77470) SoC: - Add GPIO nodes - Add PFC support - Use r8a77470-sysc binding definitions * RZ/G1C (r8a77470) iW-RainboW-G23S dev platform: - Specify EtherAVB PHY IRQ - Add pinctl support for scif1 * RZ/N1D (r9a06g032) SoC: Use r9a06g032-sysctrl binding definitions * tag 'renesas-arm-dt-for-v4.20' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: r9a06g032: Use r9a06g032-sysctrl binding definitions ARM: dts: Include R-Car Gen1 product name in DTSI files ARM: dts: stout: Add DA9063 OnKey node ARM: dts: silk: Add DA9063 RTC and OnKey node ARM: dts: iwg23s-sbc: specify EtherAVB PHY IRQ ARM: dts: r8a77470: Add GPIO support ARM: dts: silk: Add DA9063 PMIC node ARM: dts: gose: Add DA9210 node for CPU DVFS ARM: dts: rcar-gen2: Convert to new DU DT bindings ARM: dts: iwg23s-sbc: Add pinctl support for scif1 ARM: dts: r8a77470: Add PFC support ARM: dts: r8a77470: Use r8a77470-sysc binding definitions ARM: dts: rcar: Correct SATA device sizes to 2 MiB Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-21ARM: dts: stm32: Fix SPI controller node namesRob Herring1-1/+1
SPI controller nodes should be named 'spi' rather than 'qspi'. Fixing the name enables dtc SPI bus checks. Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-09-21ARM: dts: stm32: enable display on stm32mp157c-ev1 boardYannick Fertré1-6/+67
Enable panel raydium RM68200, DSI bridge & display controller. Signed-off-by: Yannick Fertré <yannick.fertre@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-09-21ARM: dts: ux500: Mark PRCMU as syscon compatibleLinus Walleij1-1/+1
We need to distribute out the responsibilities of the PRCMU registers instead of having one big lump handling everything. By making it syscon compatible, we can start grabbing the register map elsewhere when needed. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-21arm: dts: ste: Update coresight bindings for hardware portSuzuki K Poulose1-32/+33
Switch to the new coresight bindings Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-21ARM: dts: ste: Fix SPI controller node namesRob Herring4-5/+5
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the name enables dtc SPI bus checks. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-21ARM: dts: ux500: Get rid of DTC warningsLinus Walleij3-1/+8
By removing the reference to skeleton.dtsi, defining chosen {} and proper memory nodes we get warning-free device trees for the Ux500. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-21ARM: dts: ux500: Fix LCDA clock line muxingLinus Walleij1-2/+6
The "lcdaclk_b_1" group is muxed with the function "lcd" but needs a separate entry to be muxed in with "lcda" rather than "lcd". Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-21dt-bindings: arm: scu: Correct example SCU unit addressesGeert Uytterhoeven2-2/+2
The unit addresses of the Cortex-A9 SCU device nodes contain too many zeroes. Remove them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-21ARM: dts: ux500: Correct SCU unit addressGeert Uytterhoeven1-1/+1
The unit address of the Cortex-A9 SCU device node contains one zero too many. Remove it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-20ARM: dts: aspeed: Adding Facebook TiogaPass BMCVijay Khemka2-0/+147
Initial introduction of Facebook TiogaPass family equipped with Aspeed 2500 BMC SoC. TiogaPass is a x86 server development kit with a ASPEED ast2500 BMC manufactured by Facebook. Specifically, This adds the TiogaPass platform device tree file including the flash layout used by the TiogaPass BMC machines. Signed-off-by: Vijay Khemka <vijaykhemka@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-09-20ARM: dts: aspeed: Add HXT StarDragon 4800 REP2 BMCYuan Yao2-0/+208
The HXT StarDragon 4800 REP2 (Reference Evaluation Platform) is an aarch64 ARMv8 server platform with an ast2520 BMC. Signed-off-by: Yuan Yao <yao.yuan@linaro.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-09-20ARM: dts: stm32: update rtc st,syscfg property on stm32h743Amelie Delaunay1-1/+1
To fit with latest rtc driver updates, rtc st,syscfg property must contain the control register offset of pwrcfg and the mask corresponding to the DBP (Disable Backup Protection) bit. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-09-20ARM: dts: stm32: Remove cd-inverted property for stm32f746-discoPatrice Chotard1-2/+1
Remove cd-inverted property and update cd-gpios active level accordingly Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-09-20ARM: dts: stm32: Remove cd-inverted property for stm32f769-discoPatrice Chotard1-2/+1
Remove cd-inverted property and update cd-gpios active level accordingly Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-09-20ARM: dts: stm32: Remove cd-inverted property for stm32f469-discoPatrice Chotard1-2/+1
Remove cd-inverted property and update cd-gpios active level accordingly Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-09-20ARM: dts: stm32: Remove cd-inverted property for stm32429i-evalPatrice Chotard1-2/+1
Remove cd-inverted property and update cd-gpios active level accordingly Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-09-20ARM: dts: stm32: Add clk-lse node's label on stm32f429Patrice Chotard1-1/+1
Add missing clk_lse label for node clk-lse. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2018-09-19ARM: s3c24xx: Restore proper usage of pr_info/pr_contCedric Roux1-3/+3
Fix wrong usage of pr_info introduced by the commit e728e4f20100 ("ARM: s3c24xx: formatting cleanup in mach-mini2440.c"). Since the idea is to print on a single line, pr_cont has to be used. Signed-off-by: Cedric Roux <sed@free.fr> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-09-19arm: dts: hip04: Update coresight bindings for hardware portsSuzuki K Poulose1-170/+176
Switch to the new the hardware port bindings. Cc: Wei Xu <xuwei5@hisilicon.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19arm64: dts: Add devicetree support for HiKey970 boardManivannan Sadhasivam2-0/+36
Add devicetree support for HiKey970 development board which based on Hi3670 SoC and is also one of the 96Boards Consumer Edition and AI platform. Only UART6 is enabled which is the default console required by the 96Boards Consumer Edition Specification. This patch has been tested on HiKey970 Board. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19dt-bindings: arm: hisilicon: Add binding for HiKey970 boardManivannan Sadhasivam1-0/+4
Add devicetree binding for HiKey970 board. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19arm64: dts: Add devicetree for Hisilicon Hi3670 SoCManivannan Sadhasivam1-0/+162
Add initial devicetree support for Hisilicon Hi3670 SoC which is similar to Hi3660 SoC with NPU support. This SoC has Octal core BigLittle CPUs in two clusters(4 * A53 & 4 * A73). Only UART6 has been added for console support which is pre configured by the bootloader. A fixed clock is sourcing the UART6 which will get replaced by the clock driver when available. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19dt-bindings: arm: hisilicon: Add binding for Hi3670 SoCManivannan Sadhasivam1-0/+4
Add devicetree binding for Hi3670 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19arm64: dts: hi6220: Update coresight bindings for hardware portsSuzuki K Poulose1-95/+86
Switch to updated coresight bindings for hw ports. Cc: xuwei5@hisilicon.com Cc: lipengcheng8@huawei.com Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-19arm64: dts: hisilicon: Add missing clocks property for CPUsViresh Kumar1-0/+7
The clocks property should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add missing clocks property. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2018-09-18arm64: dts: ti: k3-am6: Add Device Management Security Controller supportNishanth Menon1-0/+28
Add TISCI compatible System controller for AM6 SoCs. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-18arm64: dts: ti: am654: Add secure proxy instance for main domainNishanth Menon1-0/+11
Add secure proxy instance for Main domain Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-18arm64: dts: ti: am654: Add uart nodesNishanth Menon5-0/+81
Add uart nodes for AM654 device tree components. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-18arm64: dts: ti: k3-am65: Change #address-cells and #size-cells of ↵Kishon Vijay Abraham I2-27/+27
interconnect to 2 AM65 has two PCIe controllers and each PCIe controller has '2' address spaces one within the 4GB address space of the SoC and the other above the 4GB address space of the SoC (cbass_main) in addition to the register space. The size of the address space above the 4GB SoC address space is 4GB. These address ranges will be used by CPU/DMA to access the PCIe address space. In order to represent the address space above the 4GB SoC address space and to represent the size of this address space as 4GB, change address-cells and size-cells of interconnect to 2. Since OSPI has similar need in MCU Domain Memory Map, change address-cells and size-cells of cbass_mcu interconnect also to 2. Fixes: ea47eed33a3fe3d919 ("arm64: dts: ti: Add Support for AM654 SoC") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Vignesh R <vigneshr@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-14ARM: dts: aspeed: quanta-q71l: Enable adc & ibt nodesPatrick Venture1-0/+8
This machine uses the ADC and iBT devices. Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-09-14ARM: dts: aspeed: quanta-q71l: Add four PSUsPatrick Venture1-0/+20
Enable the four PSUs via generic PMBUS. Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-09-14ARM: dts: aspeed: quanta-q71l: add aliases for i2cPatrick Venture1-0/+19
Provide aliases to each i2c bus per labels added for each PCIe slot, etc, that are downstream beyond a mux. Signed-off-by: Patrick Venture <venture@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-09-14ARM: dts: aspeed: Fix I2C bus warningsRob Herring2-2/+2
dtc has new checks for I2C buses. The ASpeed dts files have a node named 'i2c' which causes a false positive warning. As the node is a 'simple-bus', correct the node name to be 'bus' to fix the warnings. arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-opp-romulus.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-ast2500-evb.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-arm-centriq2400-rep.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-opp-zaius.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dtb: Warning (i2c_bus_bridge): /ahb/apb/i2c@1e78a000: incorrect #size-cells for I2C bus Cc: Joel Stanley <joel@jms.id.au> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: linux-aspeed@lists.ozlabs.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au>
2018-09-14ARM: dts: bcm: Fix SPI bus warningsRob Herring2-2/+2
dtc has new checks for SPI buses. Fix the warnings in node names. arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dtb: Warning (spi_bus_bridge): /axi@18000000/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm958525er.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm958525xmc.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm958622hr.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm958625hr.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' arch/arm/boot/dts/bcm988312hr.dtb: Warning (spi_bus_bridge): /axi/qspi@27200: node name for SPI buses should be 'spi' Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: Jon Mason <jonmason@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-09-14arm64: dts: broadcom: Fix I2C and SPI bus warningsRob Herring3-5/+5
dtc has new checks for I2C and SPI buses. Fix the warnings in node names and unit-addresses. arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dtb: Warning (i2c_bus_reg): /hsls/i2c@e0000/pcf8574@20: I2C bus unit address format error, expected "27" arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dtb: Warning (i2c_bus_reg): /hsls/i2c@e0000/pcf8574@20: I2C bus unit address format error, expected "27" arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dtb: Warning (spi_bus_bridge): /hsls/ssp@180000: node name for SPI buses should be 'spi' arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dtb: Warning (spi_bus_bridge): /hsls/ssp@190000: node name for SPI buses should be 'spi' Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: Jon Mason <jonmason@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-23 21:49:29 +0300