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2023-03-27Enable device mapper config to map physical block devices onto higher-level ↵MichaelZhuxx1-0/+2
virtual block devices Signed-off-by: MichaelZhuxx <michael.zhu@starfivetech.com>
2023-03-22wireless: clear aic8800 driver warningskyler.zheng6-26/+49
clear aic8800 driver warning Signed-off-by: <skyler.zheng@starfivetech.com>
2023-03-22wireless: format aic8800 driver files to unixskyler.zheng15-4857/+4857
format aic8800 driver files to unix Signed-off-by: <skyler.zheng@starfivetech.com>
2023-03-22wireless: add gpl-2.0 license for aic8800 driverskyler.zheng106-0/+109
add SPDX-License-Identifier: GPL-2.0-or-later for usb wifi dongle aic8800 driver Signed-off-by: <skyler.zheng@starfivetech.com>
2023-03-22usb wifi dongle: enable aic8800 driverskyler.zheng1-0/+3
enable aic8800 driver Signed-off-by: <skyler.zheng@starfivetech.com>
2023-03-22wireless: add usb wifi dongle aic8800 driverskyler.zheng111-0/+62805
add usb wifi dongle aic8800 linux driver Signed-off-by: Skyler Zheng <skyler.zheng@starfivetech.com>
2023-03-20Merge tag 'JH7110_515_SDK_v4.5.2' into vf2-515-develVF2_v2.11.5Andy Hu0-0/+0
version JH7110_515_SDK_v4.5.2 for JH7110 EVB board 1. #4142: soft_3rdpart: linux: IMG GPU disable pdump in kernel space and user space
2023-03-20Merge branch 'CR_4142_gpu_2_joyce.ooi' into 'jh7110-5.15.y-devel'andy.hu3-4/+4
CR_4142: gpu: drm: img: disable PDUMP See merge request sdk/linux!748
2023-03-20gpu: drm: img: disable PDUMPjoyce.ooi3-4/+4
PDUMP is disabled to improve performance of GPU as PDUMP is used for debugging purposes. Signed-off-by: joyce.ooi <joyce.ooi@starfivetech.com>
2023-03-20Merge branch 'CR_4142_gpu_2_joyce.ooi' into 'vf2-515-devel'andy.hu3-4/+4
CR_4142: gpu: drm: img: disable PDUMP See merge request sbc/linux!87
2023-03-20gpu: drm: img: disable PDUMPjoyce.ooi3-4/+4
PDUMP is disabled to improve performance of GPU as PDUMP is used for debugging purposes. Signed-off-by: joyce.ooi <joyce.ooi@starfivetech.com>
2023-03-19Merge tag 'JH7110_515_SDK_v4.5.1' into vf2-515-develAndy Hu6-4/+107
version JH7110_515_SDK_v4.5.1 for JH7110 EVB board 1. #4082: linux: u-boot: apply csr patch 2. #3499: linux: u-boot: enable framebuffer console 3. #4038: linux: vout fixed open clock fail 4. #3509: linux: fix some bugs and add request(), free(), set_config() ops for sys gpiochip
2023-03-17Merge branch 'CR_3509_pinctrl_hal.feng' into 'jh7110-5.15.y-devel'andy.hu2-3/+89
CR 3509 pinctrl hal.feng See merge request sdk/linux!746
2023-03-17Merge branch 'CR_4038_vout_515_changhuang.liang' into 'jh7110-5.15.y-devel'andy.hu1-0/+2
CR_4038_vout_515_changhuang.liang gpu: drm: verisilicon: Fixed open clock fail See merge request sdk/linux!743
2023-03-17Merge branch 'CR_3499_vout_515_changhuang.liang' into 'jh7110-5.15.y-devel'andy.hu2-1/+10
CR_3499_vout_515_changhuang.liang gpu: drm: verisilicon: Add framebuffer console support See merge request sdk/linux!741
2023-03-17Merge branch 'CR_4082_apply_csr_patch_515_Andy.Hu' into 'jh7110-5.15.y-devel'andy.hu1-0/+6
CR_4082: riscv: fix build with binutils 2.38 See merge request sdk/linux!744
2023-03-17pinctrl: starfive: Add request(), free(), set_config() ops for sys gpiochipHal Feng1-0/+84
So libgpiod can call these ops to support some options of commands such as "-B pull-down" and "-B pull-up". Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2023-03-16riscv: fix build with binutils 2.38Aurelien Jarno1-0/+6
From version 2.38, binutils default to ISA spec version 20191213. This means that the csr read/write (csrr*/csrw*) instructions and fence.i instruction has separated from the `I` extension, become two standalone extensions: Zicsr and Zifencei. As the kernel uses those instruction, this causes the following build failure: CC arch/riscv/kernel/vdso/vgettimeofday.o <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h: Assembler messages: <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' The fix is to specify those extensions explicitely in -march. However as older binutils version do not support this, we first need to detect that. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Tested-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-03-16pinctrl: starfive: jh7110: Correct the ioconfig register address and bit ↵Hal Feng2-3/+5
definitions 1. Correct the io_conf_reg address when pin number >= PAD_QSPI_SCLK. 2. The pull-down bit is the fourth bit, so the mask is 0x10. Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2023-03-15gpu: drm: verisilicon: Fixed open clock failChanghuang Liang1-0/+2
Fixed open clock fail because this clock not close. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
2023-03-14gpu: drm: verisilicon: Add framebuffer console supportChanghuang Liang2-1/+10
Add framebuffer console support. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
2023-03-10Merge branch 'CR_2829_cryp_jiajie.ho' into 'vf2-515-devel'andy.hu1-0/+1
CR_2829: riscv: defconfig - Enable tcrypt module See merge request sbc/linux!80
2023-03-10Merge branch 'CR_3929_vf2_enable_thermal_subsystem_5.15_ziv.xu' into ↵andy.hu1-0/+4
'vf2-515-devel' CR_3929_vf2_enable_thermal_subsystem_5.15_ziv See merge request sbc/linux!82
2023-03-10thermal:vf2 enable thermal subsystemziv.xu1-0/+4
vf2 enable thermal subsystem Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2023-03-10Merge remote-tracking branch 'sdk/jh7110-5.15.y-devel' into vf2-515-develAndy Hu3-63/+18
sync for CR_3922_evb_515_DRM_mipi_hdmi_display_keith.zhao
2023-03-09Merge branch 'CR_3922_evb_515_DRM_mipi_hdmi_display_keith.zhao' into ↵andy.hu3-67/+19
'jh7110-5.15.y-devel' CR 3922 riscv:linux:vout:mipi+hdmi See merge request sdk/linux!738
2023-03-09Merge tag 'JH7110_515_SDK_v4.5.0-rc2' into vf2-515-develAndy Hu5-35/+33
version JH7110_515_SDK_v4.5.0-rc2 for JH7110 EVB board 1. #3746: linux: vout rgb code rollback to v4.4.0 2. #3668: linux: perf:sbi: disable cpu hotplug callback 3. #3166: linux: add thermal subsystem 4. #3877: linux: expand the mtd0 spl partition size in spi nor flash 5. #3729: linux: fix 4K wayland not work on some monitors
2023-03-09riscv:linux:vout:mipi+hdmikeith.zhao3-67/+19
fix hdmi+mipi display issues on debian http://192.168.110.82/redmine/issues/3922 Signed-off-by: keith <keith.zhao@starfivetech.com>
2023-03-09Merge branch 'CR_3729_evb_515_DRM__hdmi_4K_keith.zhao' into ↵andy.hu1-1/+1
'jh7110-5.15.y-devel' CR 3729 riscv:linux:vout:hdmi See merge request sdk/linux!736
2023-03-09Merge branch 'CR_3877_mtd0_expansion_5.15_ziv.xu' into 'jh7110-5.15.y-devel'andy.hu1-1/+1
CR_3877_mtd0_expansion_5.15_ziv.xu See merge request sdk/linux!731
2023-03-09Merge branch 'CR_3166_add_thermal_subsystem_support_5.15_ziv.xu' into ↵andy.hu2-3/+24
'jh7110-5.15.y-devel' CR_3166_add_thermal_subsystem_support_5.15_ziv.xu See merge request sdk/linux!727
2023-03-09Merge branch 'CR_3668_disable_register_cpu_hotplug_cb_minda' into ↵andy.hu1-0/+2
'jh7110-5.15.y-devel' CR 3668 perf:sbi: disable cpu hotplug callback. See merge request sdk/linux!722
2023-03-09Merge branch 'CR_3746_evb_515_rgb_1080_60_porting_rollback_shengyang.chen' ↵andy.hu2-31/+6
into 'jh7110-5.15.y-devel' CR_3746_evb_515_riscv:linux:vout: rollback rgb code to tag JH7110_515_SDK_v4.4.0 See merge request sdk/linux!733
2023-03-09riscv:linux:vout:hdmikeith.zhao1-1/+1
Dell 4K can not display , it is caused by PM interface need delay the time to enter power off Signed-off-by: keith <keith.zhao@starfivetech.com>
2023-03-09riscv: defconfig - Enable tcrypt moduleJia Jie Ho1-0/+1
Add tcrypt as module to VisionFive 2. User can use this module to do basic functional and speed test on crypto module. Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
2023-03-09perf:sbi: disable cpu hotplug callback.Minda Chen1-0/+2
register cpu hotplug callback will cause dhrystone and coremark benchmark reduce the scores. this CPU hotplug ops will do in sbi cpu/on and off. So disable this no side effect. Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
2023-03-09riscv:linux:vout: rollback rgb code to tag JH7110_515_SDK_v4.4.0shengyang.chen2-31/+6
rollback rgb code to tag JH7110_515_SDK_v4.4.0 after porting patch-rgb support 1080P@60fps Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
2023-03-07jh7110.dsti :expand mtd0 partitionziv.xu1-1/+1
expand mtd0 partition Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2023-03-07thermal: enable thermal subsystem with step_wise governorziv.xu2-3/+24
enable thermal subsystem with step_wise governor Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2023-03-03Merge tag 'JH7110_515_SDK_v4.5.0-rc1' into vf2-515-develAndy Hu16-546/+87
version JH7110_515_SDK_v4.5.0-rc1 for JH7110 EVB board 1. #3467: linux: fix CPUfreq issue for the hibernation resume issue 2. #3546: linux: fix v4l2-compliance test issue for imx219 sensor 3. #3526: linux: qspi use reset framework 4. #3746: linux: rgb display support 1080p 60fps
2023-03-03Merge branch 'CR_3467_cpufreq_add_pm_opp_5.15_mason.huo' into 'vf2-515-devel'andy.hu1-0/+6
CR_3467 cpufreq_add_pm_opp See merge request sbc/linux!76
2023-03-03Merge branch 'CR_3583_IPV6_SUPPORT_samin.guo' into 'vf2-515-devel'andy.hu1-1/+0
CR_3583: riscv: defconfig: jh7110: enable ipv6. See merge request sbc/linux!75
2023-03-03Merge branch 'CR_3702_mtd0_expansion_5.15_ziv.xu' into 'vf2-515-devel'andy.hu1-1/+1
CR_3702_mtd0_expansion_5.15_ziv.xu See merge request sbc/linux!74
2023-03-03Merge branch 'CR_3746_evb_515_rgb_1080_60_porting_shengyang.chen' into ↵andy.hu3-33/+58
'jh7110-5.15.y-devel' CR_3746_evb_515_riscv:linux:vout: rgb support 1080P@60fps See merge request sdk/linux!719
2023-03-03Merge branch 'CR_3526_qspi_use_reset_framework_5.15_ziv.xu' into ↵andy.hu2-31/+11
'jh7110-5.15.y-devel' CR_3526_qspi_use_reset_framework_5.15_ziv.xu See merge request sdk/linux!712
2023-03-03Merge branch 'CR_3546_v4l2_compliance_515_changhuang.liang' into ↵andy.hu1-240/+0
'jh7110-5.15.y-devel' CR_3546_v4l2_compliance_515_changhuang.liang media: starfive: Delete operate sensor ctrl in video node See merge request sdk/linux!716
2023-03-03Merge branch 'CR_3467_cpufreq_add_pm_opp_5.15_mason.huo' into ↵andy.hu5-231/+2
'jh7110-5.15.y-devel' CR_3467 cpufreq: starfive: Add opp suspend callback See merge request sdk/linux!717
2023-03-03riscv: dts: Set specific cpu frequency when suspendingMason Huo1-0/+1
As JH7110 saves & restores all clock registers in hibernation. The cpu voltage may not correct after restoring cpu freqency from hibernation resume process. In case it's suspended in 1.5GHz with 1.04v, and it schedules to 750Mhz with 0.8v before resuming, then the cpu clock will be restored to 1.5GHz, but the cpu voltage still remains in 0.8v, then the system crashes. So we set the cpu frequency to 750MHz, and it will keep the cpu voltage matched when doing hibernation resuming. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-03-03cpufreq: Introduce the cpufreq-dt driver for JH7110Mason Huo4-231/+1
The original starfive-cpufreq is deprecated. Use the cpufreq-dt driver for JH7110, as this is a generic cpu scaling driver. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-03-03riscv: dts: statfive: Add clock and power supply for cpuMason Huo1-0/+6
To enable the cpufreq-dt driver, config the cpu with clock & power supply regulator. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-24 08:03:18 +0300