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2022-05-31riscv: defconfig: Support pcie nvme driver for StarFive JH7110Kevin.xie1-0/+1
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-05-31riscv: defconfig: Disable PCIE ASPM moduleKevin.xie1-0/+1
FIXME: If we enable ASPM module, JH7110 evb will get stuck after added some pcie devices that has relevant capability. Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-05-30clk:starfive:Adjust clocks' flagxingyu.wu1-18/+18
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-05-30Merge branch 'CR_1049_watchdog_Xingyu.Wu' into 'jh7110-5.15.y-devel'andy.hu1-3/+27
watchdog:starfive:Modify real timeout sec setting and read See merge request sdk/linux!88
2022-05-30watchdog:starfive:Modify real timeout sec setting and readxingyu.wu1-3/+27
According to watchdog reset after twice timeout in hardware, adjust real timeout sec setting and read by divider. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-05-30v4l2: fixed sc2235->dvp->isp->ddr errorchanghuang.liang3-16/+14
2022-05-29Merge branch 'CR_1070_evb_hdmi_inno_keith.zhao' into 'jh7110-5.15.y-devel'andy.hu16-179/+9701
Cr 1070 evb hdmi inno keith.zhao See merge request sdk/linux!87
2022-05-29riscv:linux:driver:inno hdmikeith.zhao1-55/+8
delete some clock ,DC8200 unuse but other module used (gpu.vpu..) Signed-off-by: keith.zhao<keith.zhao@statfivetech.com>
2022-05-28driver:drm:hdmikeith.zhao16-179/+9748
add inno hdmi driver,only support 1080P mode Signed-off-by: keith.zhao <keith.zhao@starfivetech.com>
2022-05-26Merge branch 'CR_868_USB-HOST_yanhong.wang' into 'jh7110-5.15.y-devel'andy.hu5-39/+112
Cr 868 usb host yanhong.wang See merge request sdk/linux!84
2022-05-26Merge branch 'CR_998_V4L2_evb_changhuang.liang' into 'jh7110-5.15.y-devel'andy.hu25-2272/+2792
Cr 998 v4 l2 evb changhuang.liang See merge request sdk/linux!85
2022-05-26defconfig:starfive: add USB_CDNS3_STARFIVE to defconfigyanhong.wang1-0/+1
Add CONFIG_USB_CDNS3_STARFIVE to defconfig for StarFive JH7110 SoC. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-05-26USB:cdns3:starfive-jh7110: Update cdns3-starfive driveryanhong.wang1-34/+85
Update cdns3-starfive usb control driver, default support usb2.0 and usb3.0. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-05-26dt-bindings:usb:jh7110: Add usb supportyanhong.wang3-5/+26
Add bindings for usb control on the StarFive JH7100 SoC. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-05-26v4l2: modify coding stylechanghuang.liang4-15/+14
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26v4l2: open ov4689changhuang.liang3-2/+6
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26v4l2: vin add top clk and reset control supportchanghuang.liang12-33/+80
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26v4l2: add ov5640 configurechanghuang.liang2-14/+51
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26pmic: pmic use fs_initcall initchanghuang.liang1-2/+14
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26v4l2: fixed mipi -> vin pipeline image abnormalchanghuang.liang7-54/+6
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26v4l2: add mipi pipeline supportchanghuang.liang11-104/+234
2022-05-26v4l2: add macor and ov4689 4dlane configurechanghuang.liang2-18/+305
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26pmic: modify pmic functionchanghuang.liang2-6/+4
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26soc/pmic: add pmic supportchanghuang.liang5-0/+155
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26v4l2: ov4689 update kernel 5.15changhuang.liang1-8/+8
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-26V4L2: modify v4l2 base 7110 EVBchanghuang.liang12-2111/+2010
dts/starfive: add ov4689 configure and delete sc2235 pinctrl Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-25Merge branch 'CR_1051_CLOCK_TREE_Xingyu.Wu' into 'jh7110-5.15.y-devel'andy.hu2-36/+40
Cr 1051 clock tree xingyu.wu See merge request sdk/linux!83
2022-05-24clk:starfive:Modify the definitions instead of numbers in vout clock treexingyu.wu1-14/+18
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-05-24clk:starfive:Modify the critical clocks' flagsxingyu.wu1-22/+22
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-05-23Merge branch 'CR_1004_gpio_add_reset_jianlong' into 'jh7110-5.15.y-devel'andy.hu3-447/+835
pinctrl: starfive: Add jh7110 aon controller gpio register See merge request sdk/linux!80
2022-05-23Merge branch 'CR_1035_CLOCK_TREE_VOUT_Xingyu.Wu' into 'jh7110-5.15.y-devel'andy.hu2-4/+74
clk:starfive:Add top clocks and reset in vout clock tree See merge request sdk/linux!78
2022-05-23Merge branch 'CR_968_bring_up_samin.guo' into 'jh7110-5.15.y-devel'andy.hu3-4/+2
Cr 968 bring up samin.guo See merge request sdk/linux!81
2022-05-23pinctrl: starfive: Add jh7110 aon controller gpio registerJianlong Huang3-447/+835
1. Add jh7110 aon controller gpio and irq register 2. Modify jh7110 sys controller irq register 3. Add clock and reset about jh7110 iomux Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-05-23net:phy:motorcomm: change tx delay chain.samin1-1/+1
Improve compatibility of YT8521SC and YT8521SH in rgmii mode. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-23Makefile: remove HWBOARD_FLAG.samin1-2/+0
Modifying the main Makefile is not standardized and must be restored. And it will cause an error when compiling the module driver. So remove them. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-23clk:starfive:jh7110: pll0 switches to 1250M.samin1-1/+1
pll0 switches to 1250M by spl. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-23Merge branch 'CR_1028_SDIO_clivia.cai' into 'jh7110-5.15.y-devel'andy.hu2-11/+17
dt-bindings:sd: update jh7110 sd dt-bingings See merge request sdk/linux!79
2022-05-20dt-bindings:sd: update jh7110 sd dt-bingingsClivia.Cai2-11/+17
Update the evb board sd card dt-bingings Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2022-05-20Merge branch 'CR_1033_PCIE_mason.huo' into 'jh7110-5.15.y-devel'andy.hu4-19/+202
PCIe: plda: Add support for evb See merge request sdk/linux!77
2022-05-20clk:starfive:Add top clocks and reset in vout clock treexingyu.wu2-4/+74
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
2022-05-20PCIe: plda: Add support for evbmason.huo4-19/+202
1.Add pinctrl for power-enable & perst#. 2.Config refclk & clkreq. 3.Add ATR for host bridge config space. Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2022-05-19Merge branch 'CR_1005_SPI_1-6_Xingyu.Wu' into 'jh7110-5.15.y-devel'andy.hu4-11/+408
Cr 1005 spi 1 6 xingyu.wu See merge request sdk/linux!76
2022-05-19pinctrl:starfive:Modify the mask of gpio_din_reg to make spi4 workxingyu.wu1-1/+1
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-05-19dts:starfive:Add nodes for SPI 1 to 6xingyu.wu3-10/+407
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-05-19Merge branch 'CR_1010_JPU_samin.guo' into 'jh7110-5.15.y-devel'andy.hu1-22/+12
Cr 1010 jpu samin.guo See merge request sdk/linux!75
2022-05-19Merge branch 'CR_1026_SEC_william.qiu' into 'jh7110-5.15.y-devel'andy.hu1-3/+0
crypto:starfive:fix clock diable error See merge request sdk/linux!72
2022-05-19Merge branch 'CR_971_temp_sensor_samin.guo' into 'jh7110-5.15.y-devel'andy.hu10-1/+523
Cr 971 temp sensor samin.guo See merge request sdk/linux!73
2022-05-19Merge branch 'CR_1009_pmu_samin.guo' into 'jh7110-5.15.y-devel'andy.hu3-12/+17
Cr 1009 pmu samin.guo See merge request sdk/linux!74
2022-05-19dt-bindings:jh7110: Adjust clock-names/reset-names newlinessamin1-20/+8
Adjust clock-names/reset-names newlines to unify the code style. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-19dt-bindings:jh7110:jpu: add NOC_BUS_CLK_VDEC for jpu.samin1-2/+4
JPU is in Power domain Vdec, so need NOC_BUS_CLK_VDEC. Signed-off-by: samin <samin.guo@starfivetech.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-29 09:34:41 +0300