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2022-06-20wifi: mac80211: move interface config to new structJohannes Berg79-368/+402
We'll use bss_conf for per-link configuration later, so move out all the non-link-specific data out into a new struct ieee80211_vif_cfg used in the vif. Some adjustments were done with the following spatch: @@ expression sdata; struct ieee80211_vif *vifp; identifier var = { assoc, ibss_joined, aid, arp_addr_list, arp_addr_cnt, ssid, ssid_len, s1g, ibss_creator }; @@ ( -sdata->vif.bss_conf.var +sdata->vif.cfg.var | -vifp->bss_conf.var +vifp->cfg.var ) @bss_conf@ struct ieee80211_bss_conf *bss_conf; identifier var = { assoc, ibss_joined, aid, arp_addr_list, arp_addr_cnt, ssid, ssid_len, s1g, ibss_creator }; @@ -bss_conf->var +vif_cfg->var (though more manual fixups were needed, e.g. replacing "vif_cfg->" by "vif->cfg." in many files.) Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-06-20wifi: mac80211: move some future per-link data to bss_confJohannes Berg45-202/+209
To add MLD, reuse the bss_conf structure later for per-link information, so move some things into it that are per link. Most transformations were done with the following spatch: @@ expression sdata; identifier var = { chanctx_conf, mu_mimo_owner, csa_active, color_change_active, color_change_color }; @@ -sdata->vif.var +sdata->vif.bss_conf.var @@ struct ieee80211_vif *vif; identifier var = { chanctx_conf, mu_mimo_owner, csa_active, color_change_active, color_change_color }; @@ -vif->var +vif->bss_conf.var Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-06-20wifi: cfg80211: do some rework towards MLO link APIsJohannes Berg33-533/+1255
In order to support multi-link operation with multiple links, start adding some APIs. The notable addition here is to have the link ID in a new nl80211 attribute, that will be used to differentiate the links in many nl80211 operations. So far, this patch adds the netlink NL80211_ATTR_MLO_LINK_ID attribute (as well as the NL80211_ATTR_MLO_LINKS attribute) and plugs it through the system in some places, checking the validity etc. along with other infrastructure needed for it. For now, I've decided to include only the over-the-air link ID in the API. I know we discussed that we eventually need to have to have other ways of identifying a link, but for local AP mode and auth/assoc commands as well as set_key etc. we'll use the OTA ID. Also included in this patch is some refactoring of the data structures in struct wireless_dev, splitting for the first time the data into type dependent pieces, to make reasoning about these things easier. Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-06-20wifi: mac80211: reject WEP or pairwise keys with key ID > 3Johannes Berg1-5/+13
We don't really care too much right now since our data structures are set up to not have a problem with this, but clearly it's wrong to accept WEP and pairwise keys with key ID > 3. However, with MLD we need to split into per-link (GTK, IGTK, BIGTK) and per interface/MLD (including WEP) keys so make sure this is not a problem. Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2022-06-15Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.gitKalle Valo24-86/+298
ath.git patches for v5.20. Major changes: ath10k * 802.3 frame format support
2022-06-15net: sparx5: Allow mdb entries to both CPU and portsCasper Andersson1-20/+35
Allow mdb entries to be forwarded to CPU and be switched at the same time. Only remove entry when no port and the CPU isn't part of the group anymore. Signed-off-by: Casper Andersson <casper.casan@gmail.com> Acked-by: Steen Hegelund <Steen.Hegelund@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15bcm63xx_enet: switch to napi_build_skb() to reuse skbuff_headsSieng Piaw Liew1-2/+2
napi_build_skb() reuses NAPI skbuff_head cache in order to save some cycles on freeing/allocating skbuff_heads on every new Rx or completed Tx. Use napi_consume_skb() to feed the cache with skbuff_heads of completed Tx so it's never empty. Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15net: don't check skb_count twiceSieng Piaw Liew1-3/+4
NAPI cache skb_count is being checked twice without condition. Change to checking the second time only if the first check is run. Signed-off-by: Sieng Piaw Liew <liew.s.piaw@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15net: bridge: allow add/remove permanent mdb entries on disabled portsCasper Andersson1-6/+9
Adding mdb entries on disabled ports allows you to do setup before accepting any traffic, avoiding any time where the port is not in the multicast group. Signed-off-by: Casper Andersson <casper.casan@gmail.com> Acked-by: Nikolay Aleksandrov <razor@blackwall.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15i40e: add xdp frags support to ndo_xdp_xmitLorenzo Bianconi1-25/+62
Add the capability to map non-linear xdp frames in XDP_TX and ndo_xdp_xmit callback. Tested-by: Sarkar Tirthendu <tirthendu.sarkar@intel.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Tested-by: George Kuruvinakunnel <george.kuruvinakunnel@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15net: phy: marvell-88x2222: set proper phydev->portIvan Bornyakov1-0/+2
phydev->port was not set and always reported as PORT_TP. Set phydev->port according to inserted SFP module. Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15dt-bindings: net: xilinx: document xilinx emaclite driver bindingRadhey Shyam Pandey1-0/+63
Add basic description for the xilinx emaclite driver DT bindings. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15Merge branch 'ipa-simplify-completion-stats'David S. Miller5-83/+86
Alex Elder says: ==================== net: ipa: simplify completion statistics The first patch in this series makes the name used for variables representing a TRE ring be consistent everywhere. The second renames two structure fields to better represent their purpose. The last four rework a little code that manages some tranaction and byte transfer statistics maintained mainly for TX endpoints. For the most part this series is refactoring. The last one also includes the first step toward no longer assuming an event ring is dedicated to a single channel. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15net: ipa: rework gsi_channel_tx_update()Alex Elder1-27/+23
Rename gsi_channel_tx_update() to be gsi_trans_tx_completed(), and pass it just the transaction pointer, deriving the channel from the transaction. Update the comments above the function to provide a more concise description of how statistics for TX endpoints are maintained and used. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15net: ipa: stop counting total RX bytes and transactionsAlex Elder2-9/+1
In gsi_evt_ring_rx_update(), we update each transaction so its len field reflects the actual number of bytes received. In the process, the total number of transactions and bytes processed on the channel are summed, and added to a running total for the channel. But we don't actually use those running totals for RX endpoints. They're maintained for TX channels to support CoDel when they are associated with a "real" network device. So stop maintaining these totals for RX endpoints, and update the comment where the fields are defined to make it clear they're only valid for TX channels. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15net: ipa: simplify TX completion statisticsAlex Elder1-8/+6
When a TX request is issued, its channel's accumulated byte and transaction counts are recorded. This currently does *not* take into account the transaction being committed. Later, when the transaction completes, the number of bytes and transactions that have completed since the transaction was committed are reported to the network stack. The transaction and its byte count are accounted for at that time. Instead, record the transaction and its bytes in the counts recorded at commit time. This avoids the need to do so when the transaction completes, and provides a (small) simplification of that code. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15net: ipa: introduce gsi_trans_tx_committed()Alex Elder4-11/+27
Create a new function that encapsulates recording information needed for TX channel statistics when a transaction is committed. Record the accumulated length in the transaction before the call (for both RX and TX), so it can be used when updating TX statistics. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15net: ipa: rename two transaction fieldsAlex Elder2-24/+25
There are two fields in a GSI transaction that keep track of TRE counts. The first represents the number of TREs reserved for the transaction in the TRE ring; that's currently named "tre_count". The second is the number of TREs that are actually *used* by the transaction at the time it is committed. Rename the "tre_count" field to be "rsvd_count", to make its meaning a little more specific. The "_count" is present in the name mainly to avoid interpreting it as a reserved (not-to-be-used) field. This name also distinguishes it from the "tre_count" field associated with a channel. Rename the "used" field to be "used_count", to match the convention used for reserved TREs. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15net: ipa: use "tre_ring" for all TRE ring local variablesAlex Elder1-9/+9
All local variables that represent event rings are named "ring". All but two functions that represent a channel's TRE ring with a local variable use the name "tre_ring". For consistency, use that name in the two functions that don't fit the pattern. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-15Merge branch 'support-mt7531-on-bpi-r2-pro'Jakub Kicinski5-357/+505
Frank Wunderlich says: ==================== Support mt7531 on BPI-R2 Pro This Series add Support for the mt7531 switch on Bananapi R2 Pro board. This board uses port5 of the switch to conect to the gmac0 of the rk3568 SoC. Currently CPU-Port is hardcoded in the mt7530 driver to port 6. Compared to v1 the reset-Patch was dropped as it was not needed and CPU-Port-changes are completely rewriten based on suggestions/code from Vladimir Oltean (many thanks to this). In DTS Patch i only dropped the status-property that was not needed/ignored by driver. Due to the Changes i also made a regression test on mt7623 bpi-r2 (mt7623 soc + mt7530) and bpi-r64 (mt7622 soc + mt7531) with cpu- port 6. Tests were done directly (ipv4 config on dsa user port) and with vlan-aware bridge including vlan that was tagged outgoing on dsa user port. ==================== Link: https://lore.kernel.org/r/20220610170541.8643-1-linux@fw-web.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15arm64: dts: rockchip: Add mt7531 dsa node to BPI-R2-Pro boardFrank Wunderlich1-0/+48
Add Device Tree node for mt7531 switch connected to gmac0. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15dt-bindings: net: dsa: make reset optional and add rgmii-mode to mt7531Frank Wunderlich1-5/+3
A board may have no independent reset-line, so reset cannot be used inside switch driver. E.g. on Bananapi-R2 Pro switch and gmac are connected to same reset-line. Resets should be acquired only to 1 device/driver. This prevents reset to be bound to switch-driver if reset is already used for gmac. If reset is only used by switch driver it resets the switch *and* the gmac after the mdio bus comes up resulting in mdio bus goes down. It takes some time until all is up again, switch driver tries to read from mdio, will fail and defer the probe. On next try the reset does the same again. Make reset optional for such boards. Allow port 5 as cpu-port and phy-mode rgmii for mt7531. - MT7530 supports RGMII on port 5 and RGMII/TRGMII on port 6. - MT7531 supports on port 5 RGMII and SGMII (dual-sgmii) and SGMII on port 6. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15net: dsa: mt7530: get cpu-port via dp->cpu_dp instead of constantFrank Wunderlich2-8/+20
Replace last occurences of hardcoded cpu-port by cpu_dp member of dsa_port struct. Now the constant can be dropped. Suggested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15net: dsa: mt7530: rework mt753[01]_setupFrank Wunderlich1-4/+21
Enumerate available cpu-ports instead of using hardcoded constant. Suggested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15net: dsa: mt7530: rework mt7530_hw_vlan_{add,del}Frank Wunderlich1-18/+12
Rework vlan_add/vlan_del functions in preparation for dynamic cpu port. Currently BIT(MT7530_CPU_PORT) is added to new_members, even though mt7530_port_vlan_add() will be called on the CPU port too. Let DSA core decide when to call port_vlan_add for the CPU port, rather than doing it implicitly. We can do autonomous forwarding in a certain VLAN, but not add br0 to that VLAN and avoid flooding the CPU with those packets, if software knows it doesn't need to process them. Suggested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15dt-bindings: net: dsa: convert binding for mediatek switchesFrank Wunderlich2-327/+406
Convert txt binding to yaml binding for Mediatek switches. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15Merge branch 'mlxsw-remove-xm-support'Jakub Kicinski11-2266/+244
Ido Schimmel says: ==================== mlxsw: Remove XM support The XM was supposed to be an external device connected to the Spectrum-{2,3} ASICs using dedicated Ethernet ports. Its purpose was to increase the number of routes that can be offloaded to hardware. This was achieved by having the ASIC act as a cache that refers cache misses to the XM where the FIB is stored and LPM lookup is performed. Testing was done over an emulator and dedicated setups in the lab, but the product was discontinued before shipping to customers. Therefore, in order to remove dead code and reduce complexity of the code base, revert the three patchsets that added XM support. ==================== Link: https://lore.kernel.org/r/20220613132116.2021055-1-idosch@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15mlxsw: Revert "Prepare for XM implementation - LPM trees"Petr Machata3-163/+31
This reverts commit 923ba95ea22d ("Merge branch 'mlxsw-spectrum-prepare-for-xm-implementation-lpm-trees'"). Signed-off-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15mlxsw: Revert "Prepare for XM implementation - prefix insertion and removal"Petr Machata3-589/+209
This reverts commit e7086213f7b4 ("Merge branch 'mlxsw-spectrum-prepare-for-xm-implementation-prefix-insertion-and-removal'"). Signed-off-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15mlxsw: Revert "Introduce initial XM router support"Petr Machata11-1518/+8
This reverts commit 75c2a8fe8e39 ("Merge branch 'mlxsw-introduce-initial-xm-router-support'"). Signed-off-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-15Merge branch 'mlx5-next' of ↵Jakub Kicinski11-65/+292
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux Saeed Mahameed says: ==================== mlx5-next: updates 2022-06-14 1) Updated HW bits and definitions for upcoming features 1.1) vport debug counters 1.2) flow meter 1.3) Execute ASO action for flow entry 1.4) enhanced CQE compression 2) Add ICM header-modify-pattern RDMA API Leon Says ========= SW steering manipulates packet's header using "modifying header" actions. Many of these actions do the same operation, but use different data each time. Currently we create and keep every one of these actions, which use expensive and limited resources. Now we introduce a new mechanism - pattern and argument, which splits a modifying action into two parts: 1. action pattern: contains the operations to be applied on packet's header, mainly set/add/copy of fields in the packet 2. action data/argument: contains the data to be used by each operation in the pattern. This way we reuse same patterns with different arguments to create new modifying actions, and since many actions share the same operations, we end up creating a small number of patterns that we keep in a dedicated cache. These modify header patterns are implemented as new type of ICM memory, so the following kernel patch series add the support for this new ICM type. ========== * 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux: net/mlx5: Add bits and fields to support enhanced CQE compression net/mlx5: Remove not used MLX5_CAP_BITS_RW_MASK net/mlx5: group fdb cleanup to single function net/mlx5: Add support EXECUTE_ASO action for flow entry net/mlx5: Add HW definitions of vport debug counters net/mlx5: Add IFC bits and enums for flow meter RDMA/mlx5: Support handling of modify-header pattern ICM area net/mlx5: Manage ICM of type modify-header pattern net/mlx5: Introduce header-modify-pattern ICM properties ==================== Link: https://lore.kernel.org/r/20220614184028.51548-1-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-14docs: tls: document the TLS_TX_ZEROCOPY_ROJakub Kicinski1-0/+25
Add missing documentation for the TLS_TX_ZEROCOPY_RO opt-in. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Maxim Mikityanskiy <maximmi@nvidia.com> Link: https://lore.kernel.org/r/20220610180212.110590-1-kuba@kernel.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2022-06-14ethtool: Fix and simplify ethtool_convert_link_mode_to_legacy_u32()Marco Bonelli1-15/+2
Fix the implementation of ethtool_convert_link_mode_to_legacy_u32(), which is supposed to return false if src has bits higher than 31 set. The current implementation uses the complement of bitmap_fill(ext, 32) to test high bits of src, which is wrong as bitmap_fill() fills _with long granularity_, and sizeof(long) can be > 4. No users of this function currently check the return value, so the bug was dormant. Also remove the check for __ETHTOOL_LINK_MODE_MASK_NBITS > 32, as the enum ethtool_link_mode_bit_indices contains far beyond 32 values. Using find_next_bit() to test the src bitmask works regardless of this anyway. Signed-off-by: Marco Bonelli <marco@mebeim.net> Link: https://lore.kernel.org/r/20220609134900.11201-1-marco@mebeim.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-14net: phy: fixed_phy: set phy_mask before calling mdiobus_register()Rasmus Villemoes1-0/+1
There's no point probing for phys on this artificial bus, so we can save a little bit of boot time by telling mdiobus_register() not to do that. This doesn't have any functional change, since, at this point, fixed_mdio_read() returns 0xffff for all addresses/registers, so mdiobus_scan() -> get_phy_device() -> get_phy_c22_id() will return -ENODEV, which is just ignored. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: https://lore.kernel.org/r/20220606200208.1665417-1-linux@rasmusvillemoes.dk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-06-14net/mlx5: Add bits and fields to support enhanced CQE compressionOfer Levi2-3/+20
Expose ifc bits and add needed structure fields and methods to support enhanced CQE compression feature. The enhanced CQE compression feature improves cpu utiliziation with better packet latency from nic to host. Signed-off-by: Ofer Levi <oferle@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-06-14net/mlx5: Remove not used MLX5_CAP_BITS_RW_MASKShay Drory2-26/+0
Remove not used MLX5_CAP_BITS_RW_MASK. While at it, remove CAP_MASK, MLX5_CAP_OFF_CMDIF_CSUM and MLX5_DEV_CAP_FLAG_*, since MLX5_CAP_BITS_RW_MASK was their only user. Signed-off-by: Shay Drory <shayd@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-06-14net/mlx5: group fdb cleanup to single functionShay Drory1-8/+10
Currently, the allocation of fdb software objects are done is single function, oppose to the cleanup of them. Group the cleanup of fdb software objects to single function. Signed-off-by: Shay Drory <shayd@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-06-14net/mlx5: Add support EXECUTE_ASO action for flow entryJianbo Liu2-0/+47
Attach flow meter to FTE with object id and index. Use metadata register C5 to store the packet color meter result. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-06-14net/mlx5: Add HW definitions of vport debug countersSaeed Mahameed1-4/+19
total_q_under_processor_handle - number of queues in error state due to an async error or errored command. send_queue_priority_update_flow - number of QP/SQ priority/SL update events. cq_overrun - number of times CQ entered an error state due to an overflow. async_eq_overrun -number of time an EQ mapped to async events was overrun. comp_eq_overrun - number of time an EQ mapped to completion events was overrun. quota_exceeded_command - number of commands issued and failed due to quota exceeded. invalid_command - number of commands issued and failed dues to any reason other than quota exceeded. Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Michael Guralnik <michaelgur@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-06-14net/mlx5: Add IFC bits and enums for flow meterJianbo Liu2-4/+111
Add/extend structure layouts and defines for flow meter. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Reviewed-by: Ariel Levkovich <lariel@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-06-14RDMA/mlx5: Support handling of modify-header pattern ICM areaYevgeny Kliteynik3-18/+37
Add support for allocate/deallocate and registering MR of the new type of ICM area. Support exists only for devices that support sw_owner_v2. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-06-14net/mlx5: Manage ICM of type modify-header patternYevgeny Kliteynik2-0/+43
Added support for managing new type of ICM for devices that support sw_owner_v2. Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Acked-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-06-14net/mlx5: Introduce header-modify-pattern ICM propertiesYevgeny Kliteynik1-2/+5
Added new fields for device memory capabilities, in order to support creation of ICM memory for modify header patterns. Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Acked-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
2022-06-13net: make __sys_accept4_file() staticYajun Deng2-13/+6
__sys_accept4_file() isn't used outside of the file, make it static. As the same time, move file_flags and nofile parameters into __sys_accept4_file(). Signed-off-by: Yajun Deng <yajun.deng@linux.dev> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-13tcp: sk_forced_mem_schedule() optimizationEric Dumazet2-5/+7
sk_memory_allocated_add() has three callers, and returns to them @memory_allocated. sk_forced_mem_schedule() is one of them, and ignores the returned value. Change sk_memory_allocated_add() to return void. Change sock_reserve_memory() and __sk_mem_raise_allocated() to call sk_memory_allocated(). This removes one cache line miss [1] for RPC workloads, as first skbs in TCP write queue and receive queue go through sk_forced_mem_schedule(). [1] Cache line holding tcp_memory_allocated. Signed-off-by: Eric Dumazet <edumazet@google.com> Acked-by: Soheil Hassas Yeganeh <soheil@google.com> Reviewed-by: Shakeel Butt <shakeelb@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-13net: smsc95xx: add support for Microchip EVB-LAN8670-USBParthiban Veerasooran1-0/+5
This patch adds support for Microchip's EVB-LAN8670-USB 10BASE-T1S ethernet device to the existing smsc95xx driver by adding the new USB VID/PID pairs. Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-13nfp: support 48-bit DMA addressing for NFP3800Yinjun Zhang10-33/+52
48-bit DMA addressing is supported in NFP3800 HW and implemented in NFDK firmware, so enable this feature in driver now. Note that with this change, NFD3 firmware, which doesn't implement 48-bit DMA, cannot be used for NFP3800 any more. RX free list descriptor, used by both NFD3 and NFDK, is also modified to support 48-bit DMA. That's OK because the top bits is always get set to 0 when assigned with 40-bit address. Based on initial work of Jakub Kicinski <jakub.kicinski@netronome.com>. Signed-off-by: Yinjun Zhang <yinjun.zhang@corigine.com> Signed-off-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-13Merge branch 'ipa-refactoring'David S. Miller7-99/+80
Alex Elder says: ==================== net: ipa: simple refactoring This series contains some minor code improvements. The first patch verifies that the configuration is compatible with a recently-defined limit. The second and third rename two fields so they better reflect their use in the code. The next gets rid of an empty function by reworking its only caller. The last two begin to remove the assumption that an event ring is associated with a single channel. Eventually we'll support having multiple channels share an event ring but some more needs to be done before that can happen. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-13net: ipa: derive channel from transactionAlex Elder3-29/+13
In gsi_channel_tx_queued(), we report when a transaction gets passed to hardware. Change that function so it takes transaction rather than a channel as its argument, and derive the channel from the transaction. Rename the function accordingly. Delete the header comments above the function definition; the ones above the declaration in "gsi_private.h" should suffice. In addition, the comments above gsi_channel_tx_update() do a fine job of explaining what's going on. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-06-13net: ipa: determine channel from eventAlex Elder1-5/+21
Each event in an event ring describes the TRE whose completion caused the event. Currently, every event ring is dedicated to a single channel, so the channel is easily derived from the event ring. An event ring can actually be shared by more than one channel though, and to distinguish events for one channel from another, the event structure contains a field indicating which channel the event is associated with. In gsi_event_trans(), use the channel ID in an event to determine which channel the event is for. This makes the channel pointer now passed to that function irrelevant; pass the GSI pointer to that function instead. And although it shouldn't happen, warn if an event arrives that records a channel ID that's not in use, or if the event does not have a transaction associated with it. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>