summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2024-03-07Merge branch 'CR_9700_VF2_CAN_5.15_william.qiu' into 'vf2-515-devel'JH7110_VF2_515_v5.11.4andy.hu2-0/+24
CR_9700_5.15: riscv: dts: can: add dts for CAN See merge request sbc/linux!199
2024-03-07riscv: dts: can: add dts for CANWilliam Qiu2-0/+24
add dts for CAN. Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2024-03-01Merge branch 'CR_9594_Support_OpenVPN_Tailscale_515_Andy.Hu' into ↵JH7110_VF2_515_v5.11.3andy.hu1-0/+1
'vf2-515-devel' CR_9594: riscv: configs: enable CONFIG_TUN for OpenVPN/Tailscale See merge request sbc/linux!195
2024-03-01riscv: configs: enable CONFIG_TUN for OpenVPN/TailscaleAndy Hu1-0/+1
enable tun.ko for VF2 board, to fix github issue: https://github.com/starfive-tech/linux/issues/129 Signed-off-by: Andy Hu <andy.hu@starfivetech.com>
2024-03-01Merge tag 'JH7110_SDK_515_v5.11.3' into vf2-515-develAndy Hu1-5/+2
2024-03-01Merge branch 'CR_9543_VOUT_MIPI_Keith' into 'jh7110-5.15.y-devel'andy.hu1-2/+3
CR_9543 vout: mipi: update dphy config See merge request sdk/linux!1027
2024-02-28vout: mipi: update dphy configkeith.zhao1-2/+3
for history reason , the dphy bitrate always be 750M need fixup. Signed-off-by: keith.zhao <keith.zhao@starfivetech.com>
2024-02-02Merge tag 'JH7110_SDK_515_v5.11.1' into vf2-515-develAndy Hu1-3/+3
2024-02-02Merge branch 'CR_7926_gpu_515_sdk_shanlong.li' into 'jh7110-5.15.y-devel'andy.hu1-3/+3
CR_7926:driver:gpu: memset pagearray before use it by cacheable addr See merge request sdk/linux!1020
2024-02-01driver:gpu: memset pagearray before use it by cacheable addrshanlong.li1-3/+3
memset pageArray befor use it to fix up fw load error and grainy screen Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
2024-01-26Merge tag 'JH7110_SDK_515_v5.11.0' into vf2-515-develAndy Hu21-3717/+2864
2024-01-26Merge branch 'CR_9096_wave5_v4l2_v14-5.15_Som.Qin' into 'jh7110-5.15.y-devel'andy.hu20-3715/+2863
CR 9096 porting wave5 v4l2 driver v14 See merge request sdk/linux!1017
2024-01-26Merge branch 'CR_8965_vin_515_changhuang.liang' into 'jh7110-5.15.y-devel'andy.hu1-2/+1
CR_8965_vin_515_changhuang.liang media: starfive: Lower the priority of print See merge request sdk/linux!1015
2024-01-23media: add wave511 v4l2 support for starfive jh 7110 platfromSom Qin10-82/+194
Signed-off-by: Som Qin <som.qin@starfivetech.com>
2024-01-23media: chips-media: wave5: Fix panic on decoding DECODED_IDX_FLAG_SKIPMattijs Korpershoek1-1/+1
The display frame region information received from the vpu also contains the frame display index: info->index_frame_display. This index, being a s32, can be negative when a skip option is passed. In that case, its value is DECODED_IDX_FLAG_SKIP (-2). When disp_idx == -2, the following exception occurs: [ 1530.782246][ T1900] Hardware name: Texas Instruments AM62P5 SK (DT) [ 1530.788501][ T1900] pstate: a0400005 (NzCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 1530.796144][ T1900] pc : wave5_vpu_dec_get_output_info+0x300/0x308 [wave5] [ 1530.803060][ T1900] lr : wave5_vpu_dec_get_output_info+0x80/0x308 [wave5] [ 1530.809873][ T1900] sp : ffffffc00b85bc00 [ 1530.813872][ T1900] x29: ffffffc00b85bc00 x28: 0000000000000000 x27: 0000000000000001 [ 1530.821695][ T1900] x26: 00000000fffffffd x25: 00000000ffffffff x24: ffffff8812820000 [ 1530.829516][ T1900] x23: ffffff88199f7840 x22: ffffff8873f5e000 x21: ffffffc00b85bc58 [ 1530.837336][ T1900] x20: 0000000000000000 x19: ffffff88199f7920 x18: ffffffc00a899030 [ 1530.845156][ T1900] x17: 00000000529c6ef0 x16: 00000000529c6ef0 x15: 0000000000198487 [ 1530.852975][ T1900] x14: ffffffc009f2b650 x13: 0000000000058016 x12: 0000000005000000 [ 1530.860795][ T1900] x11: 0000000000000000 x10: 0000000000000000 x9 : 0000000000000000 [ 1530.868615][ T1900] x8 : 0000000000000000 x7 : 0000000000000000 x6 : 0000000000004086 [ 1530.876434][ T1900] x5 : 0000000000000001 x4 : ffffffc001454b94 x3 : ffffffc001454d94 [ 1530.884256][ T1900] x2 : ffffffc00b8201d0 x1 : 0000000000000020 x0 : 0000000000000000 [ 1530.892087][ T1900] Call trace: [ 1530.895225][ T1900] wave5_vpu_dec_get_output_info+0x300/0x308 [wave5] [ 1530.901788][ T1900] wave5_vpu_dec_finish_decode+0x6c/0x3dc [wave5] [ 1530.908081][ T1900] wave5_vpu_irq_thread+0x140/0x168 [wave5] [ 1530.913856][ T1900] irq_thread_fn+0x44/0xa4 [ 1530.918154][ T1900] irq_thread+0x15c/0x288 [ 1530.922330][ T1900] kthread+0x104/0x1d4 [ 1530.926247][ T1900] ret_from_fork+0x10/0x20 [ 1530.930520][ T1900] Code: 2a1f03ea 2a1f03eb 35ffef2c 17ffff74 (d42aa240) [ 1530.937296][ T1900] ---[ end trace 0000000000000000 ]--- [ 1530.942596][ T1900] Kernel panic - not syncing: BRK handler: Fatal exception [ 1530.949629][ T1900] SMP: stopping secondary CPUs [ 1530.954244][ T1900] Kernel Offset: disabled [ 1530.958415][ T1900] CPU features: 0x00,00000000,00800184,0000421b [ 1530.964496][ T1900] Memory Limit: none Move the disp_info assignment after testing that the index is positive to avoid the exception. Fixes: 45d1a2b93277 ("media: chips-media: wave5: Add vpuapi layer") Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
2024-01-23media: chips-media: wave5: Fix spelling mistake "bufferur" -> "buffer"Colin Ian King1-1/+1
There is a spelling mistake in a dev_dbg message. Fix it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
2024-01-23media: wave5: add OF and V4L_MEM2MEM_DRIVERS dependenciesDeborah Brouwer1-1/+2
Fix compile warning when CONFIG_OF=n: drivers/media/platform/chips-media/wave5/wave5-vpu.c:274:34: warning: 'wave5_dt_ids' defined but not used [-Wunused-const-variable=] 274 | static const struct of_device_id wave5_dt_ids[] = { | Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> [hverkuil: added commit log text]
2024-01-23media: chips-media: wave5: Add wave5 driver to maintainers fileRobert Beckett1-0/+8
Add the Chips&Media wave5 encoder/decoder driver to the maintainers file Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com>
2024-01-23dt-bindings: media: wave5: add yaml devicetree bindingsRobert Beckett1-0/+61
Add bindings for the wave5 chips&media codec driver Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org>
2024-01-23media: chips-media: wave5: Add the v4l2 layerNas Chung8-0/+4366
Add the decoder and encoder implementing the v4l2 API. This patch also adds the Makefile and the VIDEO_WAVE_VPU config Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Signed-off-by: Nas Chung <nas.chung@chipsnmedia.com>
2024-01-23media: chips-media: wave5: Add vpuapi layerNas Chung9-0/+5839
Add the vpuapi layer of the wave5 codec driver. This layer is used to configure the hardware according to the parameters. Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Signed-off-by: Nas Chung <nas.chung@chipsnmedia.com>
2024-01-23media: v4l2: Allow M2M job queuing w/o streaming CAP queueSebastian Fricke1-3/+6
Allow decoder drivers to enable set the ignore_streaming flag on their CAPTURE queue, to allow queuing jobs to the M2M ready queue and perform firmware sequence analysis with just a streaming OUTPUT queue and available bitstream data. Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
2024-01-23media: v4l2: Add ignore_streaming flagSebastian Fricke1-0/+7
Add a new flag to the `struct v4l2_m2m_dev` to toggle whether a queue must be streaming in order to allow queuing jobs to the ready queue. Currently, both queues (CAPTURE & OUTPUT) must be streaming in order to allow adding new jobs. This behavior limits the usability of M2M for some drivers, as these have to be able, to perform analysis of the sequence to ensure, that userspace prepares the CAPTURE queue correctly. Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
2024-01-23media: reverts old version wave5 driverSom Qin17-11249/+0
Signed-off-by: Som Qin <som.qin@starfivetech.com>
2024-01-23media: starfive: Lower the priority of printChanghuang Liang1-2/+1
Lower the priority of print Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
2024-01-19Merge branch 'CR_9038_VF2_qspi_32Mflash_515_ziv.xu' into 'vf2-515-devel'andy.hu1-1/+1
CR_9038_VF2_qspi_32Mflash_515_ziv.xu See merge request sbc/linux!190
2024-01-19Merge branch 'CR_9046_binfmt_misc_5.15_Leo.Lu' into 'vf2-515-devel'andy.hu1-0/+1
CR_9046_binfmt_misc_5.15_Leo.Lu See merge request sbc/linux!188
2024-01-19Merge tag 'JH7110_SDK_515_v5.10.6' into vf2-515-develAndy Hu6-23/+53
2024-01-19Merge branch 'CR_9038_qspi_32Mflash_515_ziv.xu' into 'jh7110-5.15.y-devel'andy.hu2-15/+34
CR_9038_qspi_32Mflash_515_ziv.xu See merge request sdk/linux!1013
2024-01-19Merge branch 'CR_9046_binfmt_misc_5.15_Leo.Lu' into 'jh7110-5.15.y-devel'andy.hu1-0/+1
CR_9046_binfmt_misc_5.15_Leo.Lu See merge request sdk/linux!1011
2024-01-19Merge branch 'CR_6821_vin_515_changhuang.liang' into 'jh7110-5.15.y-devel'andy.hu3-8/+18
CR_6821_vin_515_changhuang.liang media: starfive: Update flush l2cache interface See merge request sdk/linux!1009
2024-01-19riscv: dts: starfive: reduce read_delay for qspi dtsZiv Xu1-1/+1
reduce read_delay for qspi dts Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
2024-01-19driver: mtd: gigadevice: add gd25lq256d 32M flash supportZiv Xu1-14/+33
add gd25lq256d 32M flash support Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
2024-01-19riscv: dts: starfive: Reduce read_delay for qspiZiv Xu1-1/+1
Reduce read_delay for qspi Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
2024-01-18binfmt: kernel support misc binariesleo.lu1-0/+1
debian enable systemd-binfmt service Signed-off-by: Leo Lu <leo.lu@starfivetech.com>
2024-01-18binfmt: kernel support misc binariesleo.lu1-0/+1
debian enable systemd-binfmt service Signed-off-by: Leo Lu <leo.lu@starfivetech.com>
2024-01-12media: starfive: Update flush l2cache interfaceChanghuang Liang3-8/+18
Improve l2cache flush performance. And adjust ISP sc buffer size in pixel format. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
2024-01-11Merge tag 'JH7110_SDK_515_v5.10.5' into vf2-515-develAndy Hu4-17/+95
2024-01-11Merge branch ↵andy.hu4-17/+95
'CR_8959_linux515_Implement_new_flush_L2_cache_method_Windsome.Zeng' into 'jh7110-5.15.y-devel' CR 8959 Implement a new method to flush the entire L2 cache See merge request sdk/linux!1006
2024-01-11riscv: cpu: cache: Implement a new method to flush the entire L2 cacheWindsome Zeng4-17/+95
According to the manual of SiFive U74, implement a new method to flush the entire L2 cache by using the Zero Device. After testing, 512KB is the critical point between the old and new way. It's better to use sifive_ccache_flush_entire function while data size is larger than cache size. Or it will improve more at 512KB when you know what you are doing. Signed-off-by: Windsome Zeng <windsome.zeng@starfivetech.com>
2024-01-05Merge tag 'JH7110_SDK_515_v5.10.4' into vf2-515-develAndy Hu13-154/+679
2024-01-05Merge branch 'CR_8759_VF2_DRM_MIPI_PANEL_keith.zhao' into 'vf2-515-devel'andy.hu3-32/+22
CR 8759: dts:mipi: clocks re-match See merge request sbc/linux!183
2024-01-05mipi: starfivekeith.zhao2-31/+21
use new way to match the dsi timming parameters Signed-off-by: keith.zhao <keith.zhao@starfivetech.com>
2024-01-05dts:mipi: clocks re-matchkeith.zhao1-1/+1
jh7110 mipi pix clock should be sysclock in driver code in dts, pix clock should be DPI clock Signed-off-by: keith.zhao <keith.zhao@starfivetech.com>
2024-01-05Merge branch 'CR_8906_l2_cache_pmu_minda' into 'jh7110-5.15.y-devel'andy.hu6-1/+575
CR_8906 The SiFive private L2 cache PMU is supports per-task profiling See merge request sdk/linux!1004
2024-01-05Merge branch 'CR_7964_evb_4K_mipi4lane_keith.zhao' into 'jh7110-5.15.y-devel'andy.hu6-153/+104
CR_7964 vout: divide interrupt into 2 See merge request sdk/linux!1002
2024-01-05Merge branch 'CR_8759_DRM_MIPI_PANEL_keith.zhao' into 'jh7110-5.15.y-devel'andy.hu2-10/+19
CR_8759: dts:mipi: clocks re-match See merge request sdk/linux!998
2024-01-05perf: riscv: Add SiFive Private L2 cache and PMU driverMinda Chen6-1/+575
The SiFive private L2 cache PMU is supports per-task profiling and event counting. Users can use the perf tool to profile by event name and event id. Example: $ perf stat -e /sifive_u74_l2_pmu/inner_acquire_block_btot/ -e /sifive_u74_l2_pmu/inner_acquire_block_ntob/ -e /sifive_u74_l2_pmu/inner_acquire_block_ntot/ ls Performance counter stats for 'CPU(s) 0': 300 sifive_u74_l2_pmu/inner_acquire_block_btot/ 17801 sifive_u74_l2_pmu/inner_acquire_block_ntob/ 5253 sifive_u74_l2_pmu/inner_acquire_block_ntot/ 0.088917326 seconds time elapsed $ perf stat -e /sifive_u74_l2_pmu/event=0x10001/ -e /sifive_u74_l2_pmu/event=0x4001/ -e /sifive_u74_l2_pmu/event=0x8001/ ls Performance counter stats for 'CPU(s) 0': 251 sifive_u74_l2_pmu/event=0x10001/ 2620 sifive_u74_l2_pmu/event=0x4001/ 644 sifive_u74_l2_pmu/event=0x8001/ 0.092827110 seconds time elapsed Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
2024-01-04mipi: starfivekeith.zhao1-9/+18
use new way to match the dsi timming parameters Signed-off-by: keith.zhao <keith.zhao@starfivetech.com>
2024-01-04dts:mipi: clocks re-matchkeith.zhao1-1/+1
jh7110 mipi pix clock should be sysclock in driver code in dts, pix clock should be DPI clock Signed-off-by: keith.zhao <keith.zhao@starfivetech.com>