diff options
Diffstat (limited to 'drivers/pinctrl/intel')
22 files changed, 190 insertions, 318 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-alderlake.c b/drivers/pinctrl/intel/pinctrl-alderlake.c index 427febe09b69..55bbfd647ba4 100644 --- a/drivers/pinctrl/intel/pinctrl-alderlake.c +++ b/drivers/pinctrl/intel/pinctrl-alderlake.c @@ -34,25 +34,11 @@ .gpio_base = (g), \ } -#define ADL_COMMUNITY(b, s, e, g, v) \ - { \ - .barno = (b), \ - .padown_offset = ADL_##v##_PAD_OWN, \ - .padcfglock_offset = ADL_##v##_PADCFGLOCK, \ - .hostown_offset = ADL_##v##_HOSTSW_OWN, \ - .is_offset = ADL_##v##_GPI_IS, \ - .ie_offset = ADL_##v##_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } - #define ADL_N_COMMUNITY(b, s, e, g) \ - ADL_COMMUNITY(b, s, e, g, N) + INTEL_COMMUNITY_GPPS(b, s, e, g, ADL_N) #define ADL_S_COMMUNITY(b, s, e, g) \ - ADL_COMMUNITY(b, s, e, g, S) + INTEL_COMMUNITY_GPPS(b, s, e, g, ADL_S) /* Alder Lake-N */ static const struct pinctrl_pin_desc adln_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index 67db79f38051..770a2723ef81 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -637,18 +637,18 @@ static const char *byt_get_function_name(struct pinctrl_dev *pctldev, { struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc->functions[selector].name; + return vg->soc->functions[selector].func.name; } static int byt_get_function_groups(struct pinctrl_dev *pctldev, unsigned int selector, const char * const **groups, - unsigned int *num_groups) + unsigned int *ngroups) { struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - *groups = vg->soc->functions[selector].groups; - *num_groups = vg->soc->functions[selector].ngroups; + *groups = vg->soc->functions[selector].func.groups; + *ngroups = vg->soc->functions[selector].func.ngroups; return 0; } @@ -722,7 +722,7 @@ static int byt_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector, if (group.modes) byt_set_group_mixed_mux(vg, group, group.modes); - else if (!strcmp(func.name, "gpio")) + else if (!strcmp(func.func.name, "gpio")) byt_set_group_simple_mux(vg, group, BYT_DEFAULT_GPIO_MUX); else byt_set_group_simple_mux(vg, group, group.mode); diff --git a/drivers/pinctrl/intel/pinctrl-broxton.c b/drivers/pinctrl/intel/pinctrl-broxton.c index fb15cd10a32f..77e921b2178d 100644 --- a/drivers/pinctrl/intel/pinctrl-broxton.c +++ b/drivers/pinctrl/intel/pinctrl-broxton.c @@ -20,17 +20,8 @@ #define BXT_GPI_IS 0x100 #define BXT_GPI_IE 0x110 -#define BXT_COMMUNITY(s, e) \ - { \ - .padown_offset = BXT_PAD_OWN, \ - .padcfglock_offset = BXT_PADCFGLOCK, \ - .hostown_offset = BXT_HOSTSW_OWN, \ - .is_offset = BXT_GPI_IS, \ - .ie_offset = BXT_GPI_IE, \ - .gpp_size = 32, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - } +#define BXT_COMMUNITY(b, s, e) \ + INTEL_COMMUNITY_SIZE(b, s, e, 32, 4, BXT) /* BXT */ static const struct pinctrl_pin_desc bxt_north_pins[] = { @@ -172,7 +163,7 @@ static const struct intel_function bxt_north_functions[] = { }; static const struct intel_community bxt_north_communities[] = { - BXT_COMMUNITY(0, 82), + BXT_COMMUNITY(0, 0, 82), }; static const struct intel_pinctrl_soc_data bxt_north_soc_data = { @@ -289,7 +280,7 @@ static const struct intel_function bxt_northwest_functions[] = { }; static const struct intel_community bxt_northwest_communities[] = { - BXT_COMMUNITY(0, 71), + BXT_COMMUNITY(0, 0, 71), }; static const struct intel_pinctrl_soc_data bxt_northwest_soc_data = { @@ -396,7 +387,7 @@ static const struct intel_function bxt_west_functions[] = { }; static const struct intel_community bxt_west_communities[] = { - BXT_COMMUNITY(0, 41), + BXT_COMMUNITY(0, 0, 41), }; static const struct intel_pinctrl_soc_data bxt_west_soc_data = { @@ -472,7 +463,7 @@ static const struct intel_function bxt_southwest_functions[] = { }; static const struct intel_community bxt_southwest_communities[] = { - BXT_COMMUNITY(0, 30), + BXT_COMMUNITY(0, 0, 30), }; static const struct intel_pinctrl_soc_data bxt_southwest_soc_data = { @@ -511,7 +502,7 @@ static const struct pinctrl_pin_desc bxt_south_pins[] = { }; static const struct intel_community bxt_south_communities[] = { - BXT_COMMUNITY(0, 19), + BXT_COMMUNITY(0, 0, 19), }; static const struct intel_pinctrl_soc_data bxt_south_soc_data = { @@ -650,7 +641,7 @@ static const struct intel_function apl_north_functions[] = { }; static const struct intel_community apl_north_communities[] = { - BXT_COMMUNITY(0, 77), + BXT_COMMUNITY(0, 0, 77), }; static const struct intel_pinctrl_soc_data apl_north_soc_data = { @@ -770,7 +761,7 @@ static const struct intel_function apl_northwest_functions[] = { }; static const struct intel_community apl_northwest_communities[] = { - BXT_COMMUNITY(0, 76), + BXT_COMMUNITY(0, 0, 76), }; static const struct intel_pinctrl_soc_data apl_northwest_soc_data = { @@ -880,7 +871,7 @@ static const struct intel_function apl_west_functions[] = { }; static const struct intel_community apl_west_communities[] = { - BXT_COMMUNITY(0, 46), + BXT_COMMUNITY(0, 0, 46), }; static const struct intel_pinctrl_soc_data apl_west_soc_data = { @@ -972,7 +963,7 @@ static const struct intel_function apl_southwest_functions[] = { }; static const struct intel_community apl_southwest_communities[] = { - BXT_COMMUNITY(0, 42), + BXT_COMMUNITY(0, 0, 42), }; static const struct intel_pinctrl_soc_data apl_southwest_soc_data = { diff --git a/drivers/pinctrl/intel/pinctrl-cannonlake.c b/drivers/pinctrl/intel/pinctrl-cannonlake.c index f8a8b9b14de9..88142ec57b25 100644 --- a/drivers/pinctrl/intel/pinctrl-cannonlake.c +++ b/drivers/pinctrl/intel/pinctrl-cannonlake.c @@ -15,12 +15,17 @@ #include "pinctrl-intel.h" -#define CNL_PAD_OWN 0x020 -#define CNL_PADCFGLOCK 0x080 +#define CNL_LP_PAD_OWN 0x020 +#define CNL_LP_PADCFGLOCK 0x080 #define CNL_LP_HOSTSW_OWN 0x0b0 +#define CNL_LP_GPI_IS 0x100 +#define CNL_LP_GPI_IE 0x120 + +#define CNL_H_PAD_OWN 0x020 +#define CNL_H_PADCFGLOCK 0x080 #define CNL_H_HOSTSW_OWN 0x0c0 -#define CNL_GPI_IS 0x100 -#define CNL_GPI_IE 0x120 +#define CNL_H_GPI_IS 0x100 +#define CNL_H_GPI_IE 0x120 #define CNL_GPP(r, s, e, g) \ { \ @@ -30,25 +35,11 @@ .gpio_base = (g), \ } -#define CNL_COMMUNITY(b, s, e, g, v) \ - { \ - .barno = (b), \ - .padown_offset = CNL_PAD_OWN, \ - .padcfglock_offset = CNL_PADCFGLOCK, \ - .hostown_offset = CNL_##v##_HOSTSW_OWN, \ - .is_offset = CNL_GPI_IS, \ - .ie_offset = CNL_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } - #define CNL_LP_COMMUNITY(b, s, e, g) \ - CNL_COMMUNITY(b, s, e, g, LP) + INTEL_COMMUNITY_GPPS(b, s, e, g, CNL_LP) #define CNL_H_COMMUNITY(b, s, e, g) \ - CNL_COMMUNITY(b, s, e, g, H) + INTEL_COMMUNITY_GPPS(b, s, e, g, CNL_H) /* Cannon Lake-H */ static const struct pinctrl_pin_desc cnlh_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-cedarfork.c b/drivers/pinctrl/intel/pinctrl-cedarfork.c index aa6f9040d3d8..2ab52b1fbc59 100644 --- a/drivers/pinctrl/intel/pinctrl-cedarfork.c +++ b/drivers/pinctrl/intel/pinctrl-cedarfork.c @@ -28,18 +28,7 @@ } #define CDF_COMMUNITY(b, s, e, g) \ - { \ - .barno = (b), \ - .padown_offset = CDF_PAD_OWN, \ - .padcfglock_offset = CDF_PADCFGLOCK, \ - .hostown_offset = CDF_HOSTSW_OWN, \ - .is_offset = CDF_GPI_IS, \ - .ie_offset = CDF_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } + INTEL_COMMUNITY_GPPS(b, s, e, g, CDF) /* Cedar Fork PCH */ static const struct pinctrl_pin_desc cdf_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c index 11b81213922d..722990e27836 100644 --- a/drivers/pinctrl/intel/pinctrl-cherryview.c +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c @@ -694,7 +694,7 @@ static const char *chv_get_function_name(struct pinctrl_dev *pctldev, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - return pctrl->soc->functions[function].name; + return pctrl->soc->functions[function].func.name; } static int chv_get_function_groups(struct pinctrl_dev *pctldev, @@ -704,8 +704,8 @@ static int chv_get_function_groups(struct pinctrl_dev *pctldev, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - *groups = pctrl->soc->functions[function].groups; - *ngroups = pctrl->soc->functions[function].ngroups; + *groups = pctrl->soc->functions[function].func.groups; + *ngroups = pctrl->soc->functions[function].func.ngroups; return 0; } diff --git a/drivers/pinctrl/intel/pinctrl-denverton.c b/drivers/pinctrl/intel/pinctrl-denverton.c index f26d030b9b41..c1a9db091c6e 100644 --- a/drivers/pinctrl/intel/pinctrl-denverton.c +++ b/drivers/pinctrl/intel/pinctrl-denverton.c @@ -28,18 +28,7 @@ } #define DNV_COMMUNITY(b, s, e, g) \ - { \ - .barno = (b), \ - .padown_offset = DNV_PAD_OWN, \ - .padcfglock_offset = DNV_PADCFGLOCK, \ - .hostown_offset = DNV_HOSTSW_OWN, \ - .is_offset = DNV_GPI_IS, \ - .ie_offset = DNV_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } + INTEL_COMMUNITY_GPPS(b, s, e, g, DNV) /* Denverton */ static const struct pinctrl_pin_desc dnv_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-elkhartlake.c b/drivers/pinctrl/intel/pinctrl-elkhartlake.c index 4702bdfa10e3..64b1997df0be 100644 --- a/drivers/pinctrl/intel/pinctrl-elkhartlake.c +++ b/drivers/pinctrl/intel/pinctrl-elkhartlake.c @@ -27,18 +27,8 @@ .size = ((e) - (s) + 1), \ } -#define EHL_COMMUNITY(s, e, g) \ - { \ - .padown_offset = EHL_PAD_OWN, \ - .padcfglock_offset = EHL_PADCFGLOCK, \ - .hostown_offset = EHL_HOSTSW_OWN, \ - .is_offset = EHL_GPI_IS, \ - .ie_offset = EHL_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } +#define EHL_COMMUNITY(b, s, e, g) \ + INTEL_COMMUNITY_GPPS(b, s, e, g, EHL) /* Elkhart Lake */ static const struct pinctrl_pin_desc ehl_community0_pins[] = { @@ -121,7 +111,7 @@ static const struct intel_padgroup ehl_community0_gpps[] = { }; static const struct intel_community ehl_community0[] = { - EHL_COMMUNITY(0, 66, ehl_community0_gpps), + EHL_COMMUNITY(0, 0, 66, ehl_community0_gpps), }; static const struct intel_pinctrl_soc_data ehl_community0_soc_data = { @@ -262,7 +252,7 @@ static const struct intel_padgroup ehl_community1_gpps[] = { }; static const struct intel_community ehl_community1[] = { - EHL_COMMUNITY(0, 112, ehl_community1_gpps), + EHL_COMMUNITY(0, 0, 112, ehl_community1_gpps), }; static const struct intel_pinctrl_soc_data ehl_community1_soc_data = { @@ -335,7 +325,7 @@ static const struct intel_padgroup ehl_community3_gpps[] = { }; static const struct intel_community ehl_community3[] = { - EHL_COMMUNITY(0, 46, ehl_community3_gpps), + EHL_COMMUNITY(0, 0, 46, ehl_community3_gpps), }; static const struct intel_pinctrl_soc_data ehl_community3_soc_data = { @@ -441,7 +431,7 @@ static const struct intel_padgroup ehl_community4_gpps[] = { }; static const struct intel_community ehl_community4[] = { - EHL_COMMUNITY(0, 79, ehl_community4_gpps), + EHL_COMMUNITY(0, 0, 79, ehl_community4_gpps), }; static const struct intel_pinctrl_soc_data ehl_community4_soc_data = { @@ -469,7 +459,7 @@ static const struct intel_padgroup ehl_community5_gpps[] = { }; static const struct intel_community ehl_community5[] = { - EHL_COMMUNITY(0, 7, ehl_community5_gpps), + EHL_COMMUNITY(0, 0, 7, ehl_community5_gpps), }; static const struct intel_pinctrl_soc_data ehl_community5_soc_data = { diff --git a/drivers/pinctrl/intel/pinctrl-emmitsburg.c b/drivers/pinctrl/intel/pinctrl-emmitsburg.c index f6114dbf7520..cc8f0baabc91 100644 --- a/drivers/pinctrl/intel/pinctrl-emmitsburg.c +++ b/drivers/pinctrl/intel/pinctrl-emmitsburg.c @@ -28,18 +28,7 @@ } #define EBG_COMMUNITY(b, s, e, g) \ - { \ - .barno = (b), \ - .padown_offset = EBG_PAD_OWN, \ - .padcfglock_offset = EBG_PADCFGLOCK, \ - .hostown_offset = EBG_HOSTSW_OWN, \ - .is_offset = EBG_GPI_IS, \ - .ie_offset = EBG_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } + INTEL_COMMUNITY_GPPS(b, s, e, g, EBG) /* Emmitsburg */ static const struct pinctrl_pin_desc ebg_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-geminilake.c b/drivers/pinctrl/intel/pinctrl-geminilake.c index df02028b40f3..918cc9f261cf 100644 --- a/drivers/pinctrl/intel/pinctrl-geminilake.c +++ b/drivers/pinctrl/intel/pinctrl-geminilake.c @@ -20,17 +20,8 @@ #define GLK_GPI_IS 0x100 #define GLK_GPI_IE 0x110 -#define GLK_COMMUNITY(s, e) \ - { \ - .padown_offset = GLK_PAD_OWN, \ - .padcfglock_offset = GLK_PADCFGLOCK, \ - .hostown_offset = GLK_HOSTSW_OWN, \ - .is_offset = GLK_GPI_IS, \ - .ie_offset = GLK_GPI_IE, \ - .gpp_size = 32, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - } +#define GLK_COMMUNITY(b, s, e) \ + INTEL_COMMUNITY_SIZE(b, s, e, 32, 4, GLK) /* GLK */ static const struct pinctrl_pin_desc glk_northwest_pins[] = { @@ -173,7 +164,7 @@ static const struct intel_function glk_northwest_functions[] = { }; static const struct intel_community glk_northwest_communities[] = { - GLK_COMMUNITY(0, 79), + GLK_COMMUNITY(0, 0, 79), }; static const struct intel_pinctrl_soc_data glk_northwest_soc_data = { @@ -306,7 +297,7 @@ static const struct intel_function glk_north_functions[] = { }; static const struct intel_community glk_north_communities[] = { - GLK_COMMUNITY(0, 79), + GLK_COMMUNITY(0, 0, 79), }; static const struct intel_pinctrl_soc_data glk_north_soc_data = { @@ -345,7 +336,7 @@ static const struct pinctrl_pin_desc glk_audio_pins[] = { }; static const struct intel_community glk_audio_communities[] = { - GLK_COMMUNITY(0, 19), + GLK_COMMUNITY(0, 0, 19), }; static const struct intel_pinctrl_soc_data glk_audio_soc_data = { @@ -427,7 +418,7 @@ static const struct intel_function glk_scc_functions[] = { }; static const struct intel_community glk_scc_communities[] = { - GLK_COMMUNITY(0, 34), + GLK_COMMUNITY(0, 0, 34), }; static const struct intel_pinctrl_soc_data glk_scc_soc_data = { diff --git a/drivers/pinctrl/intel/pinctrl-icelake.c b/drivers/pinctrl/intel/pinctrl-icelake.c index 84a56d9ae47e..1c64b4a1c491 100644 --- a/drivers/pinctrl/intel/pinctrl-icelake.c +++ b/drivers/pinctrl/intel/pinctrl-icelake.c @@ -15,12 +15,17 @@ #include "pinctrl-intel.h" -#define ICL_PAD_OWN 0x020 -#define ICL_PADCFGLOCK 0x080 -#define ICL_HOSTSW_OWN 0x0b0 -#define ICL_GPI_IS 0x100 -#define ICL_LP_GPI_IE 0x110 -#define ICL_N_GPI_IE 0x120 +#define ICL_LP_PAD_OWN 0x020 +#define ICL_LP_PADCFGLOCK 0x080 +#define ICL_LP_HOSTSW_OWN 0x0b0 +#define ICL_LP_GPI_IS 0x100 +#define ICL_LP_GPI_IE 0x110 + +#define ICL_N_PAD_OWN 0x020 +#define ICL_N_PADCFGLOCK 0x080 +#define ICL_N_HOSTSW_OWN 0x0b0 +#define ICL_N_GPI_IS 0x100 +#define ICL_N_GPI_IE 0x120 #define ICL_GPP(r, s, e, g) \ { \ @@ -30,25 +35,11 @@ .gpio_base = (g), \ } -#define ICL_COMMUNITY(b, s, e, g, v) \ - { \ - .barno = (b), \ - .padown_offset = ICL_PAD_OWN, \ - .padcfglock_offset = ICL_PADCFGLOCK, \ - .hostown_offset = ICL_HOSTSW_OWN, \ - .is_offset = ICL_GPI_IS, \ - .ie_offset = ICL_##v##_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } - #define ICL_LP_COMMUNITY(b, s, e, g) \ - ICL_COMMUNITY(b, s, e, g, LP) + INTEL_COMMUNITY_GPPS(b, s, e, g, ICL_LP) #define ICL_N_COMMUNITY(b, s, e, g) \ - ICL_COMMUNITY(b, s, e, g, N) + INTEL_COMMUNITY_GPPS(b, s, e, g, ICL_N) /* Ice Lake-LP */ static const struct pinctrl_pin_desc icllp_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index cc3aaba24188..c7a71c49df0a 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -81,13 +81,16 @@ #define PADCFG1_TERM_MASK GENMASK(12, 10) #define PADCFG1_TERM_20K BIT(2) #define PADCFG1_TERM_5K BIT(1) +#define PADCFG1_TERM_4K (BIT(2) | BIT(1)) #define PADCFG1_TERM_1K BIT(0) +#define PADCFG1_TERM_952 (BIT(2) | BIT(0)) #define PADCFG1_TERM_833 (BIT(1) | BIT(0)) +#define PADCFG1_TERM_800 (BIT(2) | BIT(1) | BIT(0)) #define PADCFG2 0x008 -#define PADCFG2_DEBEN BIT(0) #define PADCFG2_DEBOUNCE_SHIFT 1 #define PADCFG2_DEBOUNCE_MASK GENMASK(4, 1) +#define PADCFG2_DEBEN BIT(0) #define DEBOUNCE_PERIOD_NSEC 31250 @@ -369,7 +372,7 @@ static const char *intel_get_function_name(struct pinctrl_dev *pctldev, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - return pctrl->soc->functions[function].name; + return pctrl->soc->functions[function].func.name; } static int intel_get_function_groups(struct pinctrl_dev *pctldev, @@ -379,8 +382,8 @@ static int intel_get_function_groups(struct pinctrl_dev *pctldev, { struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); - *groups = pctrl->soc->functions[function].groups; - *ngroups = pctrl->soc->functions[function].ngroups; + *groups = pctrl->soc->functions[function].func.groups; + *ngroups = pctrl->soc->functions[function].func.ngroups; return 0; } @@ -574,6 +577,9 @@ static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin, case PADCFG1_TERM_1K: *arg = 1000; break; + case PADCFG1_TERM_4K: + *arg = 4000; + break; case PADCFG1_TERM_5K: *arg = 5000; break; @@ -599,6 +605,9 @@ static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin, return -EINVAL; *arg = 1000; break; + case PADCFG1_TERM_4K: + *arg = 4000; + break; case PADCFG1_TERM_5K: *arg = 5000; break; @@ -691,21 +700,17 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, raw_spin_lock_irqsave(&pctrl->lock, flags); value = readl(padcfg1); + value &= ~(PADCFG1_TERM_MASK | PADCFG1_TERM_UP); + + /* Set default strength value in case none is given */ + if (arg == 1) + arg = 5000; switch (param) { case PIN_CONFIG_BIAS_DISABLE: - value &= ~(PADCFG1_TERM_MASK | PADCFG1_TERM_UP); break; case PIN_CONFIG_BIAS_PULL_UP: - value &= ~PADCFG1_TERM_MASK; - - value |= PADCFG1_TERM_UP; - - /* Set default strength value in case none is given */ - if (arg == 1) - arg = 5000; - switch (arg) { case 20000: value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT; @@ -713,6 +718,9 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, case 5000: value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT; break; + case 4000: + value |= PADCFG1_TERM_4K << PADCFG1_TERM_SHIFT; + break; case 1000: value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT; break; @@ -721,17 +729,13 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, break; default: ret = -EINVAL; + break; } + value |= PADCFG1_TERM_UP; break; case PIN_CONFIG_BIAS_PULL_DOWN: - value &= ~(PADCFG1_TERM_UP | PADCFG1_TERM_MASK); - - /* Set default strength value in case none is given */ - if (arg == 1) - arg = 5000; - switch (arg) { case 20000: value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT; @@ -739,6 +743,9 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, case 5000: value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT; break; + case 4000: + value |= PADCFG1_TERM_4K << PADCFG1_TERM_SHIFT; + break; case 1000: if (!(community->features & PINCTRL_FEATURE_1K_PD)) { ret = -EINVAL; @@ -755,9 +762,14 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin, break; default: ret = -EINVAL; + break; } break; + + default: + ret = -EINVAL; + break; } if (!ret) @@ -1215,13 +1227,8 @@ static int intel_gpio_community_irq_handler(struct intel_pinctrl *pctrl, /* Only interrupts that are enabled */ pending &= enabled; - for_each_set_bit(gpp_offset, &pending, padgrp->size) { - unsigned int irq; - - irq = irq_find_mapping(gc->irq.domain, - padgrp->gpio_base + gpp_offset); - generic_handle_irq(irq); - } + for_each_set_bit(gpp_offset, &pending, padgrp->size) + generic_handle_domain_irq(gc->irq.domain, padgrp->gpio_base + gpp_offset); ret += pending ? 1 : 0; } @@ -1399,7 +1406,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl, for (i = 0; i < ngpps; i++) { gpps[i] = community->gpps[i]; - if (gpps[i].size > 32) + if (gpps[i].size > INTEL_PINCTRL_MAX_GPP_SIZE) return -EINVAL; /* Special treatment for GPIO base */ @@ -1417,7 +1424,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl, } gpps[i].padown_num = padown_num; - padown_num += DIV_ROUND_UP(gpps[i].size * 4, 32); + padown_num += DIV_ROUND_UP(gpps[i].size * 4, INTEL_PINCTRL_MAX_GPP_SIZE); } community->gpps = gpps; @@ -1433,7 +1440,7 @@ static int intel_pinctrl_add_padgroups_by_size(struct intel_pinctrl *pctrl, unsigned int padown_num = 0; size_t i, ngpps = DIV_ROUND_UP(npins, community->gpp_size); - if (community->gpp_size > 32) + if (community->gpp_size > INTEL_PINCTRL_MAX_GPP_SIZE) return -EINVAL; gpps = devm_kcalloc(pctrl->dev, ngpps, sizeof(*gpps), GFP_KERNEL); @@ -1451,14 +1458,7 @@ static int intel_pinctrl_add_padgroups_by_size(struct intel_pinctrl *pctrl, gpps[i].gpio_base = gpps[i].base; gpps[i].padown_num = padown_num; - /* - * In older hardware the number of padown registers per - * group is fixed regardless of the group size. - */ - if (community->gpp_num_padown_regs) - padown_num += community->gpp_num_padown_regs; - else - padown_num += DIV_ROUND_UP(gpps[i].size * 4, 32); + padown_num += community->gpp_num_padown_regs; } community->ngpps = ngpps; @@ -1709,6 +1709,12 @@ const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_ EXPORT_SYMBOL_GPL(intel_pinctrl_get_soc_data); #ifdef CONFIG_PM_SLEEP +static bool __intel_gpio_is_direct_irq(u32 value) +{ + return (value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) && + (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO); +} + static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin) { const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin); @@ -1742,8 +1748,7 @@ static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int * See https://bugzilla.kernel.org/show_bug.cgi?id=214749. */ value = readl(intel_get_padcfg(pctrl, pin, PADCFG0)); - if ((value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) && - (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO)) + if (__intel_gpio_is_direct_irq(value)) return true; return false; @@ -1873,7 +1878,12 @@ int intel_pinctrl_resume_noirq(struct device *dev) for (i = 0; i < pctrl->soc->npins; i++) { const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i]; - if (!intel_pinctrl_should_save(pctrl, desc->number)) + if (!(intel_pinctrl_should_save(pctrl, desc->number) || + /* + * If the firmware mangled the register contents too much, + * check the saved value for the Direct IRQ mode. + */ + __intel_gpio_is_direct_irq(pads[i].padcfg0))) continue; intel_restore_padcfg(pctrl, desc->number, PADCFG0, pads[i].padcfg0); diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index 65628423bf63..1faf2ada480a 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -36,21 +36,19 @@ struct intel_pingroup { /** * struct intel_function - Description about a function - * @name: Name of the function - * @groups: An array of groups for this function - * @ngroups: Number of groups in @groups + * @func: Generic data of the pin function (name and groups of pins) */ struct intel_function { - const char *name; - const char * const *groups; - size_t ngroups; + struct pinfunction func; }; +#define INTEL_PINCTRL_MAX_GPP_SIZE 32 + /** * struct intel_padgroup - Hardware pad group information * @reg_num: GPI_IS register number * @base: Starting pin of this group - * @size: Size of this group (maximum is 32). + * @size: Size of this group (maximum is %INTEL_PINCTRL_MAX_GPP_SIZE). * @gpio_base: Starting GPIO base of this group * @padown_num: PAD_OWN register number (assigned by the core driver) * @@ -96,8 +94,7 @@ enum { * @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK, * HOSTSW_OWN, GPI_IS, GPI_IE. Used when @gpps is %NULL. * @gpp_num_padown_regs: Number of pad registers each pad group consumes at - * minimum. Use %0 if the number of registers can be - * determined by the size of the group. + * minimum. Used when @gpps is %NULL. * @gpps: Pad groups if the controller has variable size pad groups * @ngpps: Number of pad groups in this community * @pad_map: Optional non-linear mapping of the pads @@ -106,11 +103,13 @@ enum { * @regs: Community specific common registers (reserved for core driver) * @pad_regs: Community specific pad registers (reserved for core driver) * - * In some of Intel GPIO host controllers this driver supports each pad group + * In older Intel GPIO host controllers, this driver supports, each pad group * is of equal size (except the last one). In that case the driver can just - * fill in @gpp_size field and let the core driver to handle the rest. If - * the controller has pad groups of variable size the client driver can - * pass custom @gpps and @ngpps instead. + * fill in @gpp_size and @gpp_num_padown_regs fields and let the core driver + * to handle the rest. + * + * In newer Intel GPIO host controllers each pad group is of variable size, + * so the client driver can pass custom @gpps and @ngpps instead. */ struct intel_community { unsigned int barno; @@ -143,6 +142,28 @@ struct intel_community { #define PINCTRL_FEATURE_BLINK BIT(4) #define PINCTRL_FEATURE_EXP BIT(5) +#define __INTEL_COMMUNITY(b, s, e, g, n, gs, gn, soc) \ + { \ + .barno = (b), \ + .padown_offset = soc ## _PAD_OWN, \ + .padcfglock_offset = soc ## _PADCFGLOCK, \ + .hostown_offset = soc ## _HOSTSW_OWN, \ + .is_offset = soc ## _GPI_IS, \ + .ie_offset = soc ## _GPI_IE, \ + .gpp_size = (gs), \ + .gpp_num_padown_regs = (gn), \ + .pin_base = (s), \ + .npins = ((e) - (s) + 1), \ + .gpps = (g), \ + .ngpps = (n), \ + } + +#define INTEL_COMMUNITY_GPPS(b, s, e, g, soc) \ + __INTEL_COMMUNITY(b, s, e, g, ARRAY_SIZE(g), 0, 0, soc) + +#define INTEL_COMMUNITY_SIZE(b, s, e, gs, gn, soc) \ + __INTEL_COMMUNITY(b, s, e, NULL, 0, gs, gn, soc) + /** * PIN_GROUP - Declare a pin group * @n: Name of the group @@ -158,11 +179,9 @@ struct intel_community { .modes = __builtin_choose_expr(__builtin_constant_p((m)), NULL, (m)), \ } -#define FUNCTION(n, g) \ - { \ - .name = (n), \ - .groups = (g), \ - .ngroups = ARRAY_SIZE((g)), \ +#define FUNCTION(n, g) \ + { \ + .func = PINCTRL_PINFUNCTION((n), (g), ARRAY_SIZE(g)), \ } /** diff --git a/drivers/pinctrl/intel/pinctrl-jasperlake.c b/drivers/pinctrl/intel/pinctrl-jasperlake.c index ec435b7ab392..086ab7fe08dd 100644 --- a/drivers/pinctrl/intel/pinctrl-jasperlake.c +++ b/drivers/pinctrl/intel/pinctrl-jasperlake.c @@ -29,18 +29,7 @@ } #define JSL_COMMUNITY(b, s, e, g) \ - { \ - .barno = (b), \ - .padown_offset = JSL_PAD_OWN, \ - .padcfglock_offset = JSL_PADCFGLOCK, \ - .hostown_offset = JSL_HOSTSW_OWN, \ - .is_offset = JSL_GPI_IS, \ - .ie_offset = JSL_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } + INTEL_COMMUNITY_GPPS(b, s, e, g, JSL) /* Jasper Lake */ static const struct pinctrl_pin_desc jsl_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-lakefield.c b/drivers/pinctrl/intel/pinctrl-lakefield.c index 3c6283c4827f..8dac2d6012b1 100644 --- a/drivers/pinctrl/intel/pinctrl-lakefield.c +++ b/drivers/pinctrl/intel/pinctrl-lakefield.c @@ -29,18 +29,7 @@ } #define LKF_COMMUNITY(b, s, e, g) \ - { \ - .barno = (b), \ - .padown_offset = LKF_PAD_OWN, \ - .padcfglock_offset = LKF_PADCFGLOCK, \ - .hostown_offset = LKF_HOSTSW_OWN, \ - .is_offset = LKF_GPI_IS, \ - .ie_offset = LKF_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } + INTEL_COMMUNITY_GPPS(b, s, e, g, LKF) /* Lakefield */ static const struct pinctrl_pin_desc lkf_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-lewisburg.c b/drivers/pinctrl/intel/pinctrl-lewisburg.c index ad4b446d588e..7aac1bbde2e9 100644 --- a/drivers/pinctrl/intel/pinctrl-lewisburg.c +++ b/drivers/pinctrl/intel/pinctrl-lewisburg.c @@ -21,17 +21,7 @@ #define LBG_GPI_IE 0x110 #define LBG_COMMUNITY(b, s, e) \ - { \ - .barno = (b), \ - .padown_offset = LBG_PAD_OWN, \ - .padcfglock_offset = LBG_PADCFGLOCK, \ - .hostown_offset = LBG_HOSTSW_OWN, \ - .is_offset = LBG_GPI_IS, \ - .ie_offset = LBG_GPI_IE, \ - .gpp_size = 24, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - } + INTEL_COMMUNITY_SIZE(b, s, e, 24, 3, LBG) /* Lewisburg */ static const struct pinctrl_pin_desc lbg_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index 8d05dad38556..cdace55aaeac 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -341,18 +341,18 @@ static const char *lp_get_function_name(struct pinctrl_dev *pctldev, { struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev); - return lg->soc->functions[selector].name; + return lg->soc->functions[selector].func.name; } static int lp_get_function_groups(struct pinctrl_dev *pctldev, unsigned int selector, const char * const **groups, - unsigned int *num_groups) + unsigned int *ngroups) { struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev); - *groups = lg->soc->functions[selector].groups; - *num_groups = lg->soc->functions[selector].ngroups; + *groups = lg->soc->functions[selector].func.groups; + *ngroups = lg->soc->functions[selector].func.ngroups; return 0; } diff --git a/drivers/pinctrl/intel/pinctrl-merrifield.c b/drivers/pinctrl/intel/pinctrl-merrifield.c index c0845bb1e9e3..365c391c97a3 100644 --- a/drivers/pinctrl/intel/pinctrl-merrifield.c +++ b/drivers/pinctrl/intel/pinctrl-merrifield.c @@ -576,7 +576,7 @@ static const char *mrfld_get_function_name(struct pinctrl_dev *pctldev, { struct mrfld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev); - return mp->functions[function].name; + return mp->functions[function].func.name; } static int mrfld_get_function_groups(struct pinctrl_dev *pctldev, @@ -586,8 +586,8 @@ static int mrfld_get_function_groups(struct pinctrl_dev *pctldev, { struct mrfld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev); - *groups = mp->functions[function].groups; - *ngroups = mp->functions[function].ngroups; + *groups = mp->functions[function].func.groups; + *ngroups = mp->functions[function].func.ngroups; return 0; } diff --git a/drivers/pinctrl/intel/pinctrl-meteorlake.c b/drivers/pinctrl/intel/pinctrl-meteorlake.c index 9576dcd1cb29..a82f6754c45b 100644 --- a/drivers/pinctrl/intel/pinctrl-meteorlake.c +++ b/drivers/pinctrl/intel/pinctrl-meteorlake.c @@ -14,11 +14,11 @@ #include "pinctrl-intel.h" -#define MTL_PAD_OWN 0x0b0 -#define MTL_PADCFGLOCK 0x110 -#define MTL_HOSTSW_OWN 0x140 -#define MTL_GPI_IS 0x200 -#define MTL_GPI_IE 0x210 +#define MTL_P_PAD_OWN 0x0b0 +#define MTL_P_PADCFGLOCK 0x110 +#define MTL_P_HOSTSW_OWN 0x140 +#define MTL_P_GPI_IS 0x200 +#define MTL_P_GPI_IE 0x210 #define MTL_GPP(r, s, e, g) \ { \ @@ -29,18 +29,7 @@ } #define MTL_COMMUNITY(b, s, e, g) \ - { \ - .barno = (b), \ - .padown_offset = MTL_PAD_OWN, \ - .padcfglock_offset = MTL_PADCFGLOCK, \ - .hostown_offset = MTL_HOSTSW_OWN, \ - .is_offset = MTL_GPI_IS, \ - .ie_offset = MTL_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } + INTEL_COMMUNITY_GPPS(b, s, e, g, MTL_P) /* Meteor Lake-P */ static const struct pinctrl_pin_desc mtlp_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-moorefield.c b/drivers/pinctrl/intel/pinctrl-moorefield.c index e3eec671e15d..3c9a8484b442 100644 --- a/drivers/pinctrl/intel/pinctrl-moorefield.c +++ b/drivers/pinctrl/intel/pinctrl-moorefield.c @@ -530,7 +530,7 @@ static const char *mofld_get_function_name(struct pinctrl_dev *pctldev, unsigned { struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev); - return mp->functions[function].name; + return mp->functions[function].func.name; } static int mofld_get_function_groups(struct pinctrl_dev *pctldev, unsigned int function, @@ -538,8 +538,8 @@ static int mofld_get_function_groups(struct pinctrl_dev *pctldev, unsigned int f { struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev); - *groups = mp->functions[function].groups; - *ngroups = mp->functions[function].ngroups; + *groups = mp->functions[function].func.groups; + *ngroups = mp->functions[function].func.ngroups; return 0; } diff --git a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c index 292b660067e9..f91e27feb7c3 100644 --- a/drivers/pinctrl/intel/pinctrl-sunrisepoint.c +++ b/drivers/pinctrl/intel/pinctrl-sunrisepoint.c @@ -15,31 +15,17 @@ #include "pinctrl-intel.h" -#define SPT_PAD_OWN 0x020 +#define SPT_H_PAD_OWN 0x020 #define SPT_H_PADCFGLOCK 0x090 -#define SPT_LP_PADCFGLOCK 0x0a0 -#define SPT_HOSTSW_OWN 0x0d0 -#define SPT_GPI_IS 0x100 -#define SPT_GPI_IE 0x120 - -#define SPT_COMMUNITY(b, s, e, g, n, v, gs, gn) \ - { \ - .barno = (b), \ - .padown_offset = SPT_PAD_OWN, \ - .padcfglock_offset = SPT_##v##_PADCFGLOCK, \ - .hostown_offset = SPT_HOSTSW_OWN, \ - .is_offset = SPT_GPI_IS, \ - .ie_offset = SPT_GPI_IE, \ - .gpp_size = (gs), \ - .gpp_num_padown_regs = (gn), \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = (n), \ - } +#define SPT_H_HOSTSW_OWN 0x0d0 +#define SPT_H_GPI_IS 0x100 +#define SPT_H_GPI_IE 0x120 -#define SPT_LP_COMMUNITY(b, s, e) \ - SPT_COMMUNITY(b, s, e, NULL, 0, LP, 24, 4) +#define SPT_LP_PAD_OWN 0x020 +#define SPT_LP_PADCFGLOCK 0x0a0 +#define SPT_LP_HOSTSW_OWN 0x0d0 +#define SPT_LP_GPI_IS 0x100 +#define SPT_LP_GPI_IE 0x120 #define SPT_H_GPP(r, s, e, g) \ { \ @@ -50,7 +36,10 @@ } #define SPT_H_COMMUNITY(b, s, e, g) \ - SPT_COMMUNITY(b, s, e, g, ARRAY_SIZE(g), H, 0, 0) + INTEL_COMMUNITY_GPPS(b, s, e, g, SPT_H) + +#define SPT_LP_COMMUNITY(b, s, e) \ + INTEL_COMMUNITY_SIZE(b, s, e, 24, 4, SPT_LP) /* Sunrisepoint-LP */ static const struct pinctrl_pin_desc sptlp_pins[] = { diff --git a/drivers/pinctrl/intel/pinctrl-tigerlake.c b/drivers/pinctrl/intel/pinctrl-tigerlake.c index 431352fa2ab5..6e3a651d1241 100644 --- a/drivers/pinctrl/intel/pinctrl-tigerlake.c +++ b/drivers/pinctrl/intel/pinctrl-tigerlake.c @@ -15,13 +15,17 @@ #include "pinctrl-intel.h" -#define TGL_PAD_OWN 0x020 +#define TGL_LP_PAD_OWN 0x020 #define TGL_LP_PADCFGLOCK 0x080 -#define TGL_H_PADCFGLOCK 0x090 #define TGL_LP_HOSTSW_OWN 0x0b0 +#define TGL_LP_GPI_IS 0x100 +#define TGL_LP_GPI_IE 0x120 + +#define TGL_H_PAD_OWN 0x020 +#define TGL_H_PADCFGLOCK 0x090 #define TGL_H_HOSTSW_OWN 0x0c0 -#define TGL_GPI_IS 0x100 -#define TGL_GPI_IE 0x120 +#define TGL_H_GPI_IS 0x100 +#define TGL_H_GPI_IE 0x120 #define TGL_GPP(r, s, e, g) \ { \ @@ -31,25 +35,11 @@ .gpio_base = (g), \ } -#define TGL_COMMUNITY(b, s, e, g, v) \ - { \ - .barno = (b), \ - .padown_offset = TGL_PAD_OWN, \ - .padcfglock_offset = TGL_##v##_PADCFGLOCK, \ - .hostown_offset = TGL_##v##_HOSTSW_OWN, \ - .is_offset = TGL_GPI_IS, \ - .ie_offset = TGL_GPI_IE, \ - .pin_base = (s), \ - .npins = ((e) - (s) + 1), \ - .gpps = (g), \ - .ngpps = ARRAY_SIZE(g), \ - } - #define TGL_LP_COMMUNITY(b, s, e, g) \ - TGL_COMMUNITY(b, s, e, g, LP) + INTEL_COMMUNITY_GPPS(b, s, e, g, TGL_LP) #define TGL_H_COMMUNITY(b, s, e, g) \ - TGL_COMMUNITY(b, s, e, g, H) + INTEL_COMMUNITY_GPPS(b, s, e, g, TGL_H) /* Tiger Lake-LP */ static const struct pinctrl_pin_desc tgllp_pins[] = { |