diff options
Diffstat (limited to 'drivers/pinctrl/intel/pinctrl-baytrail.c')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-baytrail.c | 311 |
1 files changed, 150 insertions, 161 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index 55141d5de29e..b409642f168d 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -93,7 +93,7 @@ #define BYT_DEFAULT_GPIO_MUX 0 #define BYT_ALTER_GPIO_MUX 1 -struct byt_gpio_pin_context { +struct intel_pad_context { u32 conf0; u32 val; }; @@ -105,16 +105,6 @@ struct byt_gpio_pin_context { .pad_map = (map),\ } -struct byt_gpio { - struct gpio_chip chip; - struct platform_device *pdev; - struct pinctrl_dev *pctl_dev; - struct pinctrl_desc pctl_desc; - const struct intel_pinctrl_soc_data *soc_data; - struct intel_community *communities_copy; - struct byt_gpio_pin_context *saved_context; -}; - /* SCORE pins, aka GPIOC_<pin_no> or GPIO_S0_SC[<pin_no>] */ static const struct pinctrl_pin_desc byt_score_pins[] = { PINCTRL_PIN(0, "SATA_GP0"), @@ -550,14 +540,14 @@ static const struct intel_pinctrl_soc_data *byt_soc_data[] = { static DEFINE_RAW_SPINLOCK(byt_lock); -static struct intel_community *byt_get_community(struct byt_gpio *vg, +static struct intel_community *byt_get_community(struct intel_pinctrl *vg, unsigned int pin) { struct intel_community *comm; int i; - for (i = 0; i < vg->soc_data->ncommunities; i++) { - comm = vg->communities_copy + i; + for (i = 0; i < vg->ncommunities; i++) { + comm = vg->communities + i; if (pin < comm->pin_base + comm->npins && pin >= comm->pin_base) return comm; } @@ -565,7 +555,7 @@ static struct intel_community *byt_get_community(struct byt_gpio *vg, return NULL; } -static void __iomem *byt_gpio_reg(struct byt_gpio *vg, unsigned int offset, +static void __iomem *byt_gpio_reg(struct intel_pinctrl *vg, unsigned int offset, int reg) { struct intel_community *comm = byt_get_community(vg, offset); @@ -592,17 +582,17 @@ static void __iomem *byt_gpio_reg(struct byt_gpio *vg, unsigned int offset, static int byt_get_groups_count(struct pinctrl_dev *pctldev) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc_data->ngroups; + return vg->soc->ngroups; } static const char *byt_get_group_name(struct pinctrl_dev *pctldev, unsigned int selector) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc_data->groups[selector].name; + return vg->soc->groups[selector].name; } static int byt_get_group_pins(struct pinctrl_dev *pctldev, @@ -610,10 +600,10 @@ static int byt_get_group_pins(struct pinctrl_dev *pctldev, const unsigned int **pins, unsigned int *num_pins) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - *pins = vg->soc_data->groups[selector].pins; - *num_pins = vg->soc_data->groups[selector].npins; + *pins = vg->soc->groups[selector].pins; + *num_pins = vg->soc->groups[selector].npins; return 0; } @@ -626,17 +616,17 @@ static const struct pinctrl_ops byt_pinctrl_ops = { static int byt_get_functions_count(struct pinctrl_dev *pctldev) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc_data->nfunctions; + return vg->soc->nfunctions; } static const char *byt_get_function_name(struct pinctrl_dev *pctldev, unsigned int selector) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - return vg->soc_data->functions[selector].name; + return vg->soc->functions[selector].name; } static int byt_get_function_groups(struct pinctrl_dev *pctldev, @@ -644,15 +634,15 @@ static int byt_get_function_groups(struct pinctrl_dev *pctldev, const char * const **groups, unsigned int *num_groups) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); - *groups = vg->soc_data->functions[selector].groups; - *num_groups = vg->soc_data->functions[selector].ngroups; + *groups = vg->soc->functions[selector].groups; + *num_groups = vg->soc->functions[selector].ngroups; return 0; } -static void byt_set_group_simple_mux(struct byt_gpio *vg, +static void byt_set_group_simple_mux(struct intel_pinctrl *vg, const struct intel_pingroup group, unsigned int func) { @@ -667,7 +657,7 @@ static void byt_set_group_simple_mux(struct byt_gpio *vg, padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG); if (!padcfg0) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Group %s, pin %i not muxed (no padcfg0)\n", group.name, i); continue; @@ -682,7 +672,7 @@ static void byt_set_group_simple_mux(struct byt_gpio *vg, raw_spin_unlock_irqrestore(&byt_lock, flags); } -static void byt_set_group_mixed_mux(struct byt_gpio *vg, +static void byt_set_group_mixed_mux(struct intel_pinctrl *vg, const struct intel_pingroup group, const unsigned int *func) { @@ -697,7 +687,7 @@ static void byt_set_group_mixed_mux(struct byt_gpio *vg, padcfg0 = byt_gpio_reg(vg, group.pins[i], BYT_CONF0_REG); if (!padcfg0) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Group %s, pin %i not muxed (no padcfg0)\n", group.name, i); continue; @@ -715,9 +705,9 @@ static void byt_set_group_mixed_mux(struct byt_gpio *vg, static int byt_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector, unsigned int group_selector) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctldev); - const struct intel_function func = vg->soc_data->functions[func_selector]; - const struct intel_pingroup group = vg->soc_data->groups[group_selector]; + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctldev); + const struct intel_function func = vg->soc->functions[func_selector]; + const struct intel_pingroup group = vg->soc->groups[group_selector]; if (group.modes) byt_set_group_mixed_mux(vg, group, group.modes); @@ -729,22 +719,22 @@ static int byt_set_mux(struct pinctrl_dev *pctldev, unsigned int func_selector, return 0; } -static u32 byt_get_gpio_mux(struct byt_gpio *vg, unsigned int offset) +static u32 byt_get_gpio_mux(struct intel_pinctrl *vg, unsigned int offset) { /* SCORE pin 92-93 */ - if (!strcmp(vg->soc_data->uid, BYT_SCORE_ACPI_UID) && + if (!strcmp(vg->soc->uid, BYT_SCORE_ACPI_UID) && offset >= 92 && offset <= 93) return BYT_ALTER_GPIO_MUX; /* SUS pin 11-21 */ - if (!strcmp(vg->soc_data->uid, BYT_SUS_ACPI_UID) && + if (!strcmp(vg->soc->uid, BYT_SUS_ACPI_UID) && offset >= 11 && offset <= 21) return BYT_ALTER_GPIO_MUX; return BYT_DEFAULT_GPIO_MUX; } -static void byt_gpio_clear_triggering(struct byt_gpio *vg, unsigned int offset) +static void byt_gpio_clear_triggering(struct intel_pinctrl *vg, unsigned int offset) { void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); unsigned long flags; @@ -752,7 +742,13 @@ static void byt_gpio_clear_triggering(struct byt_gpio *vg, unsigned int offset) raw_spin_lock_irqsave(&byt_lock, flags); value = readl(reg); - value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL); + + /* Do not clear direct-irq enabled IRQs (from gpio_disable_free) */ + if (value & BYT_DIRECT_IRQ_EN) + /* nothing to do */ ; + else + value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL); + writel(value, reg); raw_spin_unlock_irqrestore(&byt_lock, flags); } @@ -761,7 +757,7 @@ static int byt_gpio_request_enable(struct pinctrl_dev *pctl_dev, struct pinctrl_gpio_range *range, unsigned int offset) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); void __iomem *reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); u32 value, gpio_mux; unsigned long flags; @@ -784,13 +780,12 @@ static int byt_gpio_request_enable(struct pinctrl_dev *pctl_dev, value |= gpio_mux; writel(value, reg); - dev_warn(&vg->pdev->dev, FW_BUG - "pin %u forcibly re-configured as GPIO\n", offset); + dev_warn(vg->dev, FW_BUG "pin %u forcibly re-configured as GPIO\n", offset); } raw_spin_unlock_irqrestore(&byt_lock, flags); - pm_runtime_get(&vg->pdev->dev); + pm_runtime_get(vg->dev); return 0; } @@ -799,10 +794,10 @@ static void byt_gpio_disable_free(struct pinctrl_dev *pctl_dev, struct pinctrl_gpio_range *range, unsigned int offset) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); byt_gpio_clear_triggering(vg, offset); - pm_runtime_put(&vg->pdev->dev); + pm_runtime_put(vg->dev); } static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev, @@ -810,7 +805,7 @@ static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev, unsigned int offset, bool input) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); unsigned long flags; @@ -822,15 +817,15 @@ static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev, value &= ~BYT_DIR_MASK; if (input) value |= BYT_OUTPUT_EN; - else + else if (readl(conf_reg) & BYT_DIRECT_IRQ_EN) /* * Before making any direction modifications, do a check if gpio * is set for direct IRQ. On baytrail, setting GPIO to output - * does not make sense, so let's at least warn the caller before + * does not make sense, so let's at least inform the caller before * they shoot themselves in the foot. */ - WARN(readl(conf_reg) & BYT_DIRECT_IRQ_EN, - "Potential Error: Setting GPIO with direct_irq_en to output"); + dev_info_once(vg->dev, "Potential Error: Setting GPIO with direct_irq_en to output"); + writel(value, val_reg); raw_spin_unlock_irqrestore(&byt_lock, flags); @@ -893,7 +888,7 @@ static int byt_set_pull_strength(u32 *reg, u16 strength) static int byt_pin_config_get(struct pinctrl_dev *pctl_dev, unsigned int offset, unsigned long *config) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); enum pin_config_param param = pinconf_to_config_param(*config); void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); @@ -978,7 +973,7 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, unsigned long *configs, unsigned int num_configs) { - struct byt_gpio *vg = pinctrl_dev_get_drvdata(pctl_dev); + struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev); unsigned int param, arg; void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); @@ -1012,7 +1007,7 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, if (val & BYT_INPUT_EN) { val &= ~BYT_INPUT_EN; writel(val, val_reg); - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "pin %u forcibly set to input mode\n", offset); } @@ -1034,7 +1029,7 @@ static int byt_pin_config_set(struct pinctrl_dev *pctl_dev, if (val & BYT_INPUT_EN) { val &= ~BYT_INPUT_EN; writel(val, val_reg); - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "pin %u forcibly set to input mode\n", offset); } @@ -1115,7 +1110,7 @@ static const struct pinctrl_desc byt_pinctrl_desc = { static int byt_gpio_get(struct gpio_chip *chip, unsigned int offset) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); unsigned long flags; u32 val; @@ -1129,7 +1124,7 @@ static int byt_gpio_get(struct gpio_chip *chip, unsigned int offset) static void byt_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); unsigned long flags; u32 old_val; @@ -1148,7 +1143,7 @@ static void byt_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) static int byt_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); void __iomem *reg = byt_gpio_reg(vg, offset, BYT_VAL_REG); unsigned long flags; u32 value; @@ -1161,9 +1156,9 @@ static int byt_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) raw_spin_unlock_irqrestore(&byt_lock, flags); if (!(value & BYT_OUTPUT_EN)) - return 0; + return GPIO_LINE_DIRECTION_OUT; if (!(value & BYT_INPUT_EN)) - return 1; + return GPIO_LINE_DIRECTION_IN; return -EINVAL; } @@ -1188,11 +1183,11 @@ static int byt_gpio_direction_output(struct gpio_chip *chip, static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) { - struct byt_gpio *vg = gpiochip_get_data(chip); + struct intel_pinctrl *vg = gpiochip_get_data(chip); int i; u32 conf0, val; - for (i = 0; i < vg->soc_data->npins; i++) { + for (i = 0; i < vg->soc->npins; i++) { const struct intel_community *comm; const char *pull_str = NULL; const char *pull = NULL; @@ -1202,7 +1197,7 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) unsigned int pin; raw_spin_lock_irqsave(&byt_lock, flags); - pin = vg->soc_data->pins[i].number; + pin = vg->soc->pins[i].number; reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { seq_printf(s, @@ -1297,7 +1292,7 @@ static const struct gpio_chip byt_gpio_chip = { static void byt_irq_ack(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct byt_gpio *vg = gpiochip_get_data(gc); + struct intel_pinctrl *vg = gpiochip_get_data(gc); unsigned int offset = irqd_to_hwirq(d); void __iomem *reg; @@ -1313,7 +1308,7 @@ static void byt_irq_ack(struct irq_data *d) static void byt_irq_mask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct byt_gpio *vg = gpiochip_get_data(gc); + struct intel_pinctrl *vg = gpiochip_get_data(gc); byt_gpio_clear_triggering(vg, irqd_to_hwirq(d)); } @@ -1321,7 +1316,7 @@ static void byt_irq_mask(struct irq_data *d) static void byt_irq_unmask(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct byt_gpio *vg = gpiochip_get_data(gc); + struct intel_pinctrl *vg = gpiochip_get_data(gc); unsigned int offset = irqd_to_hwirq(d); unsigned long flags; void __iomem *reg; @@ -1359,7 +1354,7 @@ static void byt_irq_unmask(struct irq_data *d) static int byt_irq_type(struct irq_data *d, unsigned int type) { - struct byt_gpio *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d)); + struct intel_pinctrl *vg = gpiochip_get_data(irq_data_get_irq_chip_data(d)); u32 offset = irqd_to_hwirq(d); u32 value; unsigned long flags; @@ -1395,20 +1390,10 @@ static int byt_irq_type(struct irq_data *d, unsigned int type) return 0; } -static struct irq_chip byt_irqchip = { - .name = "BYT-GPIO", - .irq_ack = byt_irq_ack, - .irq_mask = byt_irq_mask, - .irq_unmask = byt_irq_unmask, - .irq_set_type = byt_irq_type, - .flags = IRQCHIP_SKIP_SET_WAKE, -}; - static void byt_gpio_irq_handler(struct irq_desc *desc) { struct irq_data *data = irq_desc_get_irq_data(desc); - struct byt_gpio *vg = gpiochip_get_data( - irq_desc_get_handler_data(desc)); + struct intel_pinctrl *vg = gpiochip_get_data(irq_desc_get_handler_data(desc)); struct irq_chip *chip = irq_data_get_irq_chip(data); u32 base, pin; void __iomem *reg; @@ -1420,7 +1405,7 @@ static void byt_gpio_irq_handler(struct irq_desc *desc) reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve interrupt status register\n", base); continue; @@ -1441,22 +1426,9 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, unsigned int ngpios) { - /* - * FIXME: currently the valid_mask is filled in as part of - * initializing the irq_chip below in byt_gpio_irq_init_hw(). - * when converting this driver to the new way of passing the - * gpio_irq_chip along when adding the gpio_chip, move the - * mask initialization into this callback instead. Right now - * this callback is here to make sure the mask gets allocated. - */ -} - -static int byt_gpio_irq_init_hw(struct gpio_chip *chip) -{ - struct byt_gpio *vg = gpiochip_get_data(chip); - struct device *dev = &vg->pdev->dev; + struct intel_pinctrl *vg = gpiochip_get_data(chip); void __iomem *reg; - u32 base, value; + u32 value; int i; /* @@ -1464,12 +1436,12 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip) * do not use direct IRQ mode. This will prevent spurious * interrupts from misconfigured pins. */ - for (i = 0; i < vg->soc_data->npins; i++) { - unsigned int pin = vg->soc_data->pins[i].number; + for (i = 0; i < vg->soc->npins; i++) { + unsigned int pin = vg->soc->pins[i].number; reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve conf0 register\n", i); continue; @@ -1477,20 +1449,27 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip) value = readl(reg); if (value & BYT_DIRECT_IRQ_EN) { - clear_bit(i, chip->irq.valid_mask); - dev_dbg(dev, "excluding GPIO %d from IRQ domain\n", i); + clear_bit(i, valid_mask); + dev_dbg(vg->dev, "excluding GPIO %d from IRQ domain\n", i); } else if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i)) { byt_gpio_clear_triggering(vg, i); - dev_dbg(dev, "disabling GPIO %d\n", i); + dev_dbg(vg->dev, "disabling GPIO %d\n", i); } } +} + +static int byt_gpio_irq_init_hw(struct gpio_chip *chip) +{ + struct intel_pinctrl *vg = gpiochip_get_data(chip); + void __iomem *reg; + u32 base, value; /* clear interrupt status trigger registers */ - for (base = 0; base < vg->soc_data->npins; base += 32) { + for (base = 0; base < vg->soc->npins; base += 32) { reg = byt_gpio_reg(vg, base, BYT_INT_STAT_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve irq status reg\n", base); continue; @@ -1501,7 +1480,7 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip) might be misconfigured in bios */ value = readl(reg); if (value) - dev_err(&vg->pdev->dev, + dev_err(vg->dev, "GPIO interrupt error, pins misconfigured. INT_STAT%u: 0x%08x\n", base / 32, value); } @@ -1511,19 +1490,20 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip) static int byt_gpio_add_pin_ranges(struct gpio_chip *chip) { - struct byt_gpio *vg = gpiochip_get_data(chip); - struct device *dev = &vg->pdev->dev; + struct intel_pinctrl *vg = gpiochip_get_data(chip); + struct device *dev = vg->dev; int ret; - ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc_data->npins); + ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, vg->soc->npins); if (ret) dev_err(dev, "failed to add GPIO pin range\n"); return ret; } -static int byt_gpio_probe(struct byt_gpio *vg) +static int byt_gpio_probe(struct intel_pinctrl *vg) { + struct platform_device *pdev = to_platform_device(vg->dev); struct gpio_chip *gc; struct resource *irq_rc; int ret; @@ -1531,32 +1511,39 @@ static int byt_gpio_probe(struct byt_gpio *vg) /* Set up gpio chip */ vg->chip = byt_gpio_chip; gc = &vg->chip; - gc->label = dev_name(&vg->pdev->dev); + gc->label = dev_name(vg->dev); gc->base = -1; gc->can_sleep = false; gc->add_pin_ranges = byt_gpio_add_pin_ranges; - gc->parent = &vg->pdev->dev; - gc->ngpio = vg->soc_data->npins; - gc->irq.init_valid_mask = byt_init_irq_valid_mask; + gc->parent = vg->dev; + gc->ngpio = vg->soc->npins; #ifdef CONFIG_PM_SLEEP - vg->saved_context = devm_kcalloc(&vg->pdev->dev, gc->ngpio, - sizeof(*vg->saved_context), GFP_KERNEL); - if (!vg->saved_context) + vg->context.pads = devm_kcalloc(vg->dev, gc->ngpio, sizeof(*vg->context.pads), + GFP_KERNEL); + if (!vg->context.pads) return -ENOMEM; #endif /* set up interrupts */ - irq_rc = platform_get_resource(vg->pdev, IORESOURCE_IRQ, 0); + irq_rc = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (irq_rc && irq_rc->start) { struct gpio_irq_chip *girq; + vg->irqchip.name = "BYT-GPIO", + vg->irqchip.irq_ack = byt_irq_ack, + vg->irqchip.irq_mask = byt_irq_mask, + vg->irqchip.irq_unmask = byt_irq_unmask, + vg->irqchip.irq_set_type = byt_irq_type, + vg->irqchip.flags = IRQCHIP_SKIP_SET_WAKE, + girq = &gc->irq; - girq->chip = &byt_irqchip; + girq->chip = &vg->irqchip; girq->init_hw = byt_gpio_irq_init_hw; + girq->init_valid_mask = byt_init_irq_valid_mask; girq->parent_handler = byt_gpio_irq_handler; girq->num_parents = 1; - girq->parents = devm_kcalloc(&vg->pdev->dev, girq->num_parents, + girq->parents = devm_kcalloc(vg->dev, girq->num_parents, sizeof(*girq->parents), GFP_KERNEL); if (!girq->parents) return -ENOMEM; @@ -1565,34 +1552,35 @@ static int byt_gpio_probe(struct byt_gpio *vg) girq->handler = handle_bad_irq; } - ret = devm_gpiochip_add_data(&vg->pdev->dev, gc, vg); + ret = devm_gpiochip_add_data(vg->dev, gc, vg); if (ret) { - dev_err(&vg->pdev->dev, "failed adding byt-gpio chip\n"); + dev_err(vg->dev, "failed adding byt-gpio chip\n"); return ret; } return ret; } -static int byt_set_soc_data(struct byt_gpio *vg, - const struct intel_pinctrl_soc_data *soc_data) +static int byt_set_soc_data(struct intel_pinctrl *vg, + const struct intel_pinctrl_soc_data *soc) { + struct platform_device *pdev = to_platform_device(vg->dev); int i; - vg->soc_data = soc_data; - vg->communities_copy = devm_kcalloc(&vg->pdev->dev, - soc_data->ncommunities, - sizeof(*vg->communities_copy), - GFP_KERNEL); - if (!vg->communities_copy) + vg->soc = soc; + + vg->ncommunities = vg->soc->ncommunities; + vg->communities = devm_kcalloc(vg->dev, vg->ncommunities, + sizeof(*vg->communities), GFP_KERNEL); + if (!vg->communities) return -ENOMEM; - for (i = 0; i < soc_data->ncommunities; i++) { - struct intel_community *comm = vg->communities_copy + i; + for (i = 0; i < vg->soc->ncommunities; i++) { + struct intel_community *comm = vg->communities + i; - *comm = vg->soc_data->communities[i]; + *comm = vg->soc->communities[i]; - comm->pad_regs = devm_platform_ioremap_resource(vg->pdev, 0); + comm->pad_regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(comm->pad_regs)) return PTR_ERR(comm->pad_regs); } @@ -1610,15 +1598,16 @@ static int byt_pinctrl_probe(struct platform_device *pdev) { const struct intel_pinctrl_soc_data *soc_data = NULL; const struct intel_pinctrl_soc_data **soc_table; + struct device *dev = &pdev->dev; struct acpi_device *acpi_dev; - struct byt_gpio *vg; + struct intel_pinctrl *vg; int i, ret; - acpi_dev = ACPI_COMPANION(&pdev->dev); + acpi_dev = ACPI_COMPANION(dev); if (!acpi_dev) return -ENODEV; - soc_table = (const struct intel_pinctrl_soc_data **)device_get_match_data(&pdev->dev); + soc_table = (const struct intel_pinctrl_soc_data **)device_get_match_data(dev); for (i = 0; soc_table[i]; i++) { if (!strcmp(acpi_dev->pnp.unique_id, soc_table[i]->uid)) { @@ -1630,26 +1619,26 @@ static int byt_pinctrl_probe(struct platform_device *pdev) if (!soc_data) return -ENODEV; - vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL); + vg = devm_kzalloc(dev, sizeof(*vg), GFP_KERNEL); if (!vg) return -ENOMEM; - vg->pdev = pdev; + vg->dev = dev; ret = byt_set_soc_data(vg, soc_data); if (ret) { - dev_err(&pdev->dev, "failed to set soc data\n"); + dev_err(dev, "failed to set soc data\n"); return ret; } - vg->pctl_desc = byt_pinctrl_desc; - vg->pctl_desc.name = dev_name(&pdev->dev); - vg->pctl_desc.pins = vg->soc_data->pins; - vg->pctl_desc.npins = vg->soc_data->npins; + vg->pctldesc = byt_pinctrl_desc; + vg->pctldesc.name = dev_name(dev); + vg->pctldesc.pins = vg->soc->pins; + vg->pctldesc.npins = vg->soc->npins; - vg->pctl_dev = devm_pinctrl_register(&pdev->dev, &vg->pctl_desc, vg); - if (IS_ERR(vg->pctl_dev)) { - dev_err(&pdev->dev, "failed to register pinctrl driver\n"); - return PTR_ERR(vg->pctl_dev); + vg->pctldev = devm_pinctrl_register(dev, &vg->pctldesc, vg); + if (IS_ERR(vg->pctldev)) { + dev_err(dev, "failed to register pinctrl driver\n"); + return PTR_ERR(vg->pctldev); } ret = byt_gpio_probe(vg); @@ -1657,7 +1646,7 @@ static int byt_pinctrl_probe(struct platform_device *pdev) return ret; platform_set_drvdata(pdev, vg); - pm_runtime_enable(&pdev->dev); + pm_runtime_enable(dev); return 0; } @@ -1665,30 +1654,30 @@ static int byt_pinctrl_probe(struct platform_device *pdev) #ifdef CONFIG_PM_SLEEP static int byt_gpio_suspend(struct device *dev) { - struct byt_gpio *vg = dev_get_drvdata(dev); + struct intel_pinctrl *vg = dev_get_drvdata(dev); unsigned long flags; int i; raw_spin_lock_irqsave(&byt_lock, flags); - for (i = 0; i < vg->soc_data->npins; i++) { + for (i = 0; i < vg->soc->npins; i++) { void __iomem *reg; u32 value; - unsigned int pin = vg->soc_data->pins[i].number; + unsigned int pin = vg->soc->pins[i].number; reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve conf0 register\n", i); continue; } value = readl(reg) & BYT_CONF0_RESTORE_MASK; - vg->saved_context[i].conf0 = value; + vg->context.pads[i].conf0 = value; reg = byt_gpio_reg(vg, pin, BYT_VAL_REG); value = readl(reg) & BYT_VAL_RESTORE_MASK; - vg->saved_context[i].val = value; + vg->context.pads[i].val = value; } raw_spin_unlock_irqrestore(&byt_lock, flags); @@ -1697,29 +1686,29 @@ static int byt_gpio_suspend(struct device *dev) static int byt_gpio_resume(struct device *dev) { - struct byt_gpio *vg = dev_get_drvdata(dev); + struct intel_pinctrl *vg = dev_get_drvdata(dev); unsigned long flags; int i; raw_spin_lock_irqsave(&byt_lock, flags); - for (i = 0; i < vg->soc_data->npins; i++) { + for (i = 0; i < vg->soc->npins; i++) { void __iomem *reg; u32 value; - unsigned int pin = vg->soc_data->pins[i].number; + unsigned int pin = vg->soc->pins[i].number; reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); if (!reg) { - dev_warn(&vg->pdev->dev, + dev_warn(vg->dev, "Pin %i: could not retrieve conf0 register\n", i); continue; } value = readl(reg); if ((value & BYT_CONF0_RESTORE_MASK) != - vg->saved_context[i].conf0) { + vg->context.pads[i].conf0) { value &= ~BYT_CONF0_RESTORE_MASK; - value |= vg->saved_context[i].conf0; + value |= vg->context.pads[i].conf0; writel(value, reg); dev_info(dev, "restored pin %d conf0 %#08x", i, value); } @@ -1727,11 +1716,11 @@ static int byt_gpio_resume(struct device *dev) reg = byt_gpio_reg(vg, pin, BYT_VAL_REG); value = readl(reg); if ((value & BYT_VAL_RESTORE_MASK) != - vg->saved_context[i].val) { + vg->context.pads[i].val) { u32 v; v = value & ~BYT_VAL_RESTORE_MASK; - v |= vg->saved_context[i].val; + v |= vg->context.pads[i].val; if (v != value) { writel(v, reg); dev_dbg(dev, "restored pin %d val %#08x\n", |