diff options
Diffstat (limited to 'drivers/memory/mtk-smi.c')
-rw-r--r-- | drivers/memory/mtk-smi.c | 268 |
1 files changed, 182 insertions, 86 deletions
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index 42ab43affbff..439d7d886873 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -41,17 +41,40 @@ #define SMI_LARB_NONSEC_CON(id) (0x380 + ((id) * 4)) #define F_MMU_EN BIT(0) +/* SMI COMMON */ +#define SMI_BUS_SEL 0x220 +#define SMI_BUS_LARB_SHIFT(larbid) ((larbid) << 1) +/* All are MMU0 defaultly. Only specialize mmu1 here. */ +#define F_MMU1_LARB(larbid) (0x1 << SMI_BUS_LARB_SHIFT(larbid)) + +enum mtk_smi_gen { + MTK_SMI_GEN1, + MTK_SMI_GEN2 +}; + +struct mtk_smi_common_plat { + enum mtk_smi_gen gen; + bool has_gals; + u32 bus_sel; /* Balance some larbs to enter mmu0 or mmu1 */ +}; + struct mtk_smi_larb_gen { - bool need_larbid; int port_in_larb[MTK_LARB_NR_MAX + 1]; void (*config_port)(struct device *); + unsigned int larb_direct_to_common_mask; + bool has_gals; }; struct mtk_smi { struct device *dev; struct clk *clk_apb, *clk_smi; + struct clk *clk_gals0, *clk_gals1; struct clk *clk_async; /*only needed by mt2701*/ - void __iomem *smi_ao_base; + union { + void __iomem *smi_ao_base; /* only for gen1 */ + void __iomem *base; /* only for gen2 */ + }; + const struct mtk_smi_common_plat *plat; }; struct mtk_smi_larb { /* larb: local arbiter */ @@ -63,82 +86,56 @@ struct mtk_smi_larb { /* larb: local arbiter */ u32 *mmu; }; -enum mtk_smi_gen { - MTK_SMI_GEN1, - MTK_SMI_GEN2 -}; - -static int mtk_smi_enable(const struct mtk_smi *smi) +static int mtk_smi_clk_enable(const struct mtk_smi *smi) { int ret; - ret = pm_runtime_get_sync(smi->dev); - if (ret < 0) - return ret; - ret = clk_prepare_enable(smi->clk_apb); if (ret) - goto err_put_pm; + return ret; ret = clk_prepare_enable(smi->clk_smi); if (ret) goto err_disable_apb; + ret = clk_prepare_enable(smi->clk_gals0); + if (ret) + goto err_disable_smi; + + ret = clk_prepare_enable(smi->clk_gals1); + if (ret) + goto err_disable_gals0; + return 0; +err_disable_gals0: + clk_disable_unprepare(smi->clk_gals0); +err_disable_smi: + clk_disable_unprepare(smi->clk_smi); err_disable_apb: clk_disable_unprepare(smi->clk_apb); -err_put_pm: - pm_runtime_put_sync(smi->dev); return ret; } -static void mtk_smi_disable(const struct mtk_smi *smi) +static void mtk_smi_clk_disable(const struct mtk_smi *smi) { + clk_disable_unprepare(smi->clk_gals1); + clk_disable_unprepare(smi->clk_gals0); clk_disable_unprepare(smi->clk_smi); clk_disable_unprepare(smi->clk_apb); - pm_runtime_put_sync(smi->dev); } int mtk_smi_larb_get(struct device *larbdev) { - struct mtk_smi_larb *larb = dev_get_drvdata(larbdev); - const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; - struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev); - int ret; - - /* Enable the smi-common's power and clocks */ - ret = mtk_smi_enable(common); - if (ret) - return ret; + int ret = pm_runtime_get_sync(larbdev); - /* Enable the larb's power and clocks */ - ret = mtk_smi_enable(&larb->smi); - if (ret) { - mtk_smi_disable(common); - return ret; - } - - /* Configure the iommu info for this larb */ - larb_gen->config_port(larbdev); - - return 0; + return (ret < 0) ? ret : 0; } EXPORT_SYMBOL_GPL(mtk_smi_larb_get); void mtk_smi_larb_put(struct device *larbdev) { - struct mtk_smi_larb *larb = dev_get_drvdata(larbdev); - struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev); - - /* - * Don't de-configure the iommu info for this larb since there may be - * several modules in this larb. - * The iommu info will be reset after power off. - */ - - mtk_smi_disable(&larb->smi); - mtk_smi_disable(common); + pm_runtime_put_sync(larbdev); } EXPORT_SYMBOL_GPL(mtk_smi_larb_put); @@ -146,39 +143,26 @@ static int mtk_smi_larb_bind(struct device *dev, struct device *master, void *data) { struct mtk_smi_larb *larb = dev_get_drvdata(dev); - struct mtk_smi_iommu *smi_iommu = data; + struct mtk_smi_larb_iommu *larb_mmu = data; unsigned int i; - if (larb->larb_gen->need_larbid) { - larb->mmu = &smi_iommu->larb_imu[larb->larbid].mmu; - return 0; - } - - /* - * If there is no larbid property, Loop to find the corresponding - * iommu information. - */ - for (i = 0; i < smi_iommu->larb_nr; i++) { - if (dev == smi_iommu->larb_imu[i].dev) { - /* The 'mmu' may be updated in iommu-attach/detach. */ - larb->mmu = &smi_iommu->larb_imu[i].mmu; + for (i = 0; i < MTK_LARB_NR_MAX; i++) { + if (dev == larb_mmu[i].dev) { + larb->larbid = i; + larb->mmu = &larb_mmu[i].mmu; return 0; } } return -ENODEV; } -static void mtk_smi_larb_config_port_mt2712(struct device *dev) +static void mtk_smi_larb_config_port_gen2_general(struct device *dev) { struct mtk_smi_larb *larb = dev_get_drvdata(dev); u32 reg; int i; - /* - * larb 8/9 is the bdpsys larb, the iommu_en is enabled defaultly. - * Don't need to set it again. - */ - if (larb->larbid == 8 || larb->larbid == 9) + if (BIT(larb->larbid) & larb->larb_gen->larb_direct_to_common_mask) return; for_each_set_bit(i, (unsigned long *)larb->mmu, 32) { @@ -243,7 +227,6 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt8173 = { }; static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = { - .need_larbid = true, .port_in_larb = { LARB0_PORT_OFFSET, LARB1_PORT_OFFSET, LARB2_PORT_OFFSET, LARB3_PORT_OFFSET @@ -252,8 +235,15 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = { }; static const struct mtk_smi_larb_gen mtk_smi_larb_mt2712 = { - .need_larbid = true, - .config_port = mtk_smi_larb_config_port_mt2712, + .config_port = mtk_smi_larb_config_port_gen2_general, + .larb_direct_to_common_mask = BIT(8) | BIT(9), /* bdpsys */ +}; + +static const struct mtk_smi_larb_gen mtk_smi_larb_mt8183 = { + .has_gals = true, + .config_port = mtk_smi_larb_config_port_gen2_general, + .larb_direct_to_common_mask = BIT(2) | BIT(3) | BIT(7), + /* IPU0 | IPU1 | CCU */ }; static const struct of_device_id mtk_smi_larb_of_ids[] = { @@ -269,6 +259,10 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = { .compatible = "mediatek,mt2712-smi-larb", .data = &mtk_smi_larb_mt2712 }, + { + .compatible = "mediatek,mt8183-smi-larb", + .data = &mtk_smi_larb_mt8183 + }, {} }; @@ -279,7 +273,6 @@ static int mtk_smi_larb_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *smi_node; struct platform_device *smi_pdev; - int err; larb = devm_kzalloc(dev, sizeof(*larb), GFP_KERNEL); if (!larb) @@ -298,16 +291,16 @@ static int mtk_smi_larb_probe(struct platform_device *pdev) larb->smi.clk_smi = devm_clk_get(dev, "smi"); if (IS_ERR(larb->smi.clk_smi)) return PTR_ERR(larb->smi.clk_smi); - larb->smi.dev = dev; - if (larb->larb_gen->need_larbid) { - err = of_property_read_u32(dev->of_node, "mediatek,larb-id", - &larb->larbid); - if (err) { - dev_err(dev, "missing larbid property\n"); - return err; - } + if (larb->larb_gen->has_gals) { + /* The larbs may still haven't gals even if the SoC support.*/ + larb->smi.clk_gals0 = devm_clk_get(dev, "gals"); + if (PTR_ERR(larb->smi.clk_gals0) == -ENOENT) + larb->smi.clk_gals0 = NULL; + else if (IS_ERR(larb->smi.clk_gals0)) + return PTR_ERR(larb->smi.clk_gals0); } + larb->smi.dev = dev; smi_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0); if (!smi_node) @@ -336,27 +329,86 @@ static int mtk_smi_larb_remove(struct platform_device *pdev) return 0; } +static int __maybe_unused mtk_smi_larb_resume(struct device *dev) +{ + struct mtk_smi_larb *larb = dev_get_drvdata(dev); + const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; + int ret; + + /* Power on smi-common. */ + ret = pm_runtime_get_sync(larb->smi_common_dev); + if (ret < 0) { + dev_err(dev, "Failed to pm get for smi-common(%d).\n", ret); + return ret; + } + + ret = mtk_smi_clk_enable(&larb->smi); + if (ret < 0) { + dev_err(dev, "Failed to enable clock(%d).\n", ret); + pm_runtime_put_sync(larb->smi_common_dev); + return ret; + } + + /* Configure the basic setting for this larb */ + larb_gen->config_port(dev); + + return 0; +} + +static int __maybe_unused mtk_smi_larb_suspend(struct device *dev) +{ + struct mtk_smi_larb *larb = dev_get_drvdata(dev); + + mtk_smi_clk_disable(&larb->smi); + pm_runtime_put_sync(larb->smi_common_dev); + return 0; +} + +static const struct dev_pm_ops smi_larb_pm_ops = { + SET_RUNTIME_PM_OPS(mtk_smi_larb_suspend, mtk_smi_larb_resume, NULL) +}; + static struct platform_driver mtk_smi_larb_driver = { .probe = mtk_smi_larb_probe, .remove = mtk_smi_larb_remove, .driver = { .name = "mtk-smi-larb", .of_match_table = mtk_smi_larb_of_ids, + .pm = &smi_larb_pm_ops, } }; +static const struct mtk_smi_common_plat mtk_smi_common_gen1 = { + .gen = MTK_SMI_GEN1, +}; + +static const struct mtk_smi_common_plat mtk_smi_common_gen2 = { + .gen = MTK_SMI_GEN2, +}; + +static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = { + .gen = MTK_SMI_GEN2, + .has_gals = true, + .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) | + F_MMU1_LARB(7), +}; + static const struct of_device_id mtk_smi_common_of_ids[] = { { .compatible = "mediatek,mt8173-smi-common", - .data = (void *)MTK_SMI_GEN2 + .data = &mtk_smi_common_gen2, }, { .compatible = "mediatek,mt2701-smi-common", - .data = (void *)MTK_SMI_GEN1 + .data = &mtk_smi_common_gen1, }, { .compatible = "mediatek,mt2712-smi-common", - .data = (void *)MTK_SMI_GEN2 + .data = &mtk_smi_common_gen2, + }, + { + .compatible = "mediatek,mt8183-smi-common", + .data = &mtk_smi_common_mt8183, }, {} }; @@ -366,13 +418,13 @@ static int mtk_smi_common_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct mtk_smi *common; struct resource *res; - enum mtk_smi_gen smi_gen; int ret; common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL); if (!common) return -ENOMEM; common->dev = dev; + common->plat = of_device_get_match_data(dev); common->clk_apb = devm_clk_get(dev, "apb"); if (IS_ERR(common->clk_apb)) @@ -382,14 +434,23 @@ static int mtk_smi_common_probe(struct platform_device *pdev) if (IS_ERR(common->clk_smi)) return PTR_ERR(common->clk_smi); + if (common->plat->has_gals) { + common->clk_gals0 = devm_clk_get(dev, "gals0"); + if (IS_ERR(common->clk_gals0)) + return PTR_ERR(common->clk_gals0); + + common->clk_gals1 = devm_clk_get(dev, "gals1"); + if (IS_ERR(common->clk_gals1)) + return PTR_ERR(common->clk_gals1); + } + /* * for mtk smi gen 1, we need to get the ao(always on) base to config * m4u port, and we need to enable the aync clock for transform the smi * clock into emi clock domain, but for mtk smi gen2, there's no smi ao * base. */ - smi_gen = (enum mtk_smi_gen)of_device_get_match_data(dev); - if (smi_gen == MTK_SMI_GEN1) { + if (common->plat->gen == MTK_SMI_GEN1) { res = platform_get_resource(pdev, IORESOURCE_MEM, 0); common->smi_ao_base = devm_ioremap_resource(dev, res); if (IS_ERR(common->smi_ao_base)) @@ -402,6 +463,11 @@ static int mtk_smi_common_probe(struct platform_device *pdev) ret = clk_prepare_enable(common->clk_async); if (ret) return ret; + } else { + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + common->base = devm_ioremap_resource(dev, res); + if (IS_ERR(common->base)) + return PTR_ERR(common->base); } pm_runtime_enable(dev); platform_set_drvdata(pdev, common); @@ -414,12 +480,42 @@ static int mtk_smi_common_remove(struct platform_device *pdev) return 0; } +static int __maybe_unused mtk_smi_common_resume(struct device *dev) +{ + struct mtk_smi *common = dev_get_drvdata(dev); + u32 bus_sel = common->plat->bus_sel; + int ret; + + ret = mtk_smi_clk_enable(common); + if (ret) { + dev_err(common->dev, "Failed to enable clock(%d).\n", ret); + return ret; + } + + if (common->plat->gen == MTK_SMI_GEN2 && bus_sel) + writel(bus_sel, common->base + SMI_BUS_SEL); + return 0; +} + +static int __maybe_unused mtk_smi_common_suspend(struct device *dev) +{ + struct mtk_smi *common = dev_get_drvdata(dev); + + mtk_smi_clk_disable(common); + return 0; +} + +static const struct dev_pm_ops smi_common_pm_ops = { + SET_RUNTIME_PM_OPS(mtk_smi_common_suspend, mtk_smi_common_resume, NULL) +}; + static struct platform_driver mtk_smi_common_driver = { .probe = mtk_smi_common_probe, .remove = mtk_smi_common_remove, .driver = { .name = "mtk-smi-common", .of_match_table = mtk_smi_common_of_ids, + .pm = &smi_common_pm_ops, } }; |