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path: root/drivers/media/platform/exynos4-is/fimc-is.c
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Diffstat (limited to 'drivers/media/platform/exynos4-is/fimc-is.c')
-rw-r--r--drivers/media/platform/exynos4-is/fimc-is.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/media/platform/exynos4-is/fimc-is.c b/drivers/media/platform/exynos4-is/fimc-is.c
index 32ab01e89196..972d9601d236 100644
--- a/drivers/media/platform/exynos4-is/fimc-is.c
+++ b/drivers/media/platform/exynos4-is/fimc-is.c
@@ -268,7 +268,7 @@ int fimc_is_cpu_set_power(struct fimc_is *is, int on)
mcuctl_write(0, is, REG_WDT_ISP);
/* Cortex-A5 start address setting */
- mcuctl_write(is->memory.paddr, is, MCUCTL_REG_BBOAR);
+ mcuctl_write(is->memory.addr, is, MCUCTL_REG_BBOAR);
/* Enable and start Cortex-A5 */
pmuisp_write(0x18000, is, REG_PMU_ISP_ARM_OPTION);
@@ -335,26 +335,26 @@ static int fimc_is_alloc_cpu_memory(struct fimc_is *is)
struct device *dev = &is->pdev->dev;
is->memory.vaddr = dma_alloc_coherent(dev, FIMC_IS_CPU_MEM_SIZE,
- &is->memory.paddr, GFP_KERNEL);
+ &is->memory.addr, GFP_KERNEL);
if (is->memory.vaddr == NULL)
return -ENOMEM;
is->memory.size = FIMC_IS_CPU_MEM_SIZE;
- dev_info(dev, "FIMC-IS CPU memory base: %#x\n", (u32)is->memory.paddr);
+ dev_info(dev, "FIMC-IS CPU memory base: %pad\n", &is->memory.addr);
- if (((u32)is->memory.paddr) & FIMC_IS_FW_ADDR_MASK) {
+ if (((u32)is->memory.addr) & FIMC_IS_FW_ADDR_MASK) {
dev_err(dev, "invalid firmware memory alignment: %#x\n",
- (u32)is->memory.paddr);
+ (u32)is->memory.addr);
dma_free_coherent(dev, is->memory.size, is->memory.vaddr,
- is->memory.paddr);
+ is->memory.addr);
return -EIO;
}
is->is_p_region = (struct is_region *)(is->memory.vaddr +
FIMC_IS_CPU_MEM_SIZE - FIMC_IS_REGION_SIZE);
- is->is_dma_p_region = is->memory.paddr +
+ is->is_dma_p_region = is->memory.addr +
FIMC_IS_CPU_MEM_SIZE - FIMC_IS_REGION_SIZE;
is->is_shared_region = (struct is_share_region *)(is->memory.vaddr +
@@ -370,7 +370,7 @@ static void fimc_is_free_cpu_memory(struct fimc_is *is)
return;
dma_free_coherent(dev, is->memory.size, is->memory.vaddr,
- is->memory.paddr);
+ is->memory.addr);
}
static void fimc_is_load_firmware(const struct firmware *fw, void *context)
@@ -415,7 +415,7 @@ static void fimc_is_load_firmware(const struct firmware *fw, void *context)
dev_info(dev, "loaded firmware: %s, rev. %s\n",
is->fw.info, is->fw.version);
- dev_dbg(dev, "FW size: %zu, paddr: %pad\n", fw->size, &is->memory.paddr);
+ dev_dbg(dev, "FW size: %zu, DMA addr: %pad\n", fw->size, &is->memory.addr);
is->is_shared_region->chip_id = 0xe4412;
is->is_shared_region->chip_rev_no = 1;
@@ -698,7 +698,7 @@ int fimc_is_hw_initialize(struct fimc_is *is)
}
pr_debug("shared region: %pad, parameter region: %pad\n",
- &is->memory.paddr + FIMC_IS_SHARED_REGION_OFFSET,
+ &is->memory.addr + FIMC_IS_SHARED_REGION_OFFSET,
&is->is_dma_p_region);
is->setfile.sub_index = 0;