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-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h3
-rw-r--r--drivers/gpu/drm/amd/powerplay/inc/hwmgr.h15
2 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h
index 6429dc2f2df9..d37d16e4b613 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.h
@@ -27,6 +27,9 @@ struct pp_atomctrl_voltage_table;
struct pp_hwmgr;
struct phm_ppt_v1_voltage_lookup_table;
+uint8_t convert_to_vid(uint16_t vddc);
+uint16_t convert_to_vddc(uint8_t vid);
+
extern int phm_wait_for_register_unequal(struct pp_hwmgr *hwmgr,
uint32_t index,
uint32_t value, uint32_t mask);
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index d742d9d087f0..17f811d181c8 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -39,9 +39,6 @@ struct pp_atomctrl_voltage_table;
#define VOLTAGE_SCALE 4
-uint8_t convert_to_vid(uint16_t vddc);
-uint16_t convert_to_vddc(uint8_t vid);
-
enum DISPLAY_GAP {
DISPLAY_GAP_VBLANK_OR_WM = 0, /* Wait for vblank or MCHG watermark. */
DISPLAY_GAP_VBLANK = 1, /* Wait for vblank. */
@@ -784,12 +781,12 @@ struct pp_hwmgr {
uint32_t workload_setting[Workload_Policy_Max];
};
-extern int hwmgr_early_init(struct pp_hwmgr *hwmgr);
-extern int hwmgr_hw_init(struct pp_hwmgr *hwmgr);
-extern int hwmgr_hw_fini(struct pp_hwmgr *hwmgr);
-extern int hwmgr_hw_suspend(struct pp_hwmgr *hwmgr);
-extern int hwmgr_hw_resume(struct pp_hwmgr *hwmgr);
-extern int hwmgr_handle_task(struct pp_hwmgr *hwmgr,
+int hwmgr_early_init(struct pp_hwmgr *hwmgr);
+int hwmgr_hw_init(struct pp_hwmgr *hwmgr);
+int hwmgr_hw_fini(struct pp_hwmgr *hwmgr);
+int hwmgr_hw_suspend(struct pp_hwmgr *hwmgr);
+int hwmgr_hw_resume(struct pp_hwmgr *hwmgr);
+int hwmgr_handle_task(struct pp_hwmgr *hwmgr,
enum amd_pp_task task_id,
enum amd_pm_state_type *user_state);