diff options
Diffstat (limited to 'drivers/clk/ralink/clk-mt7621.c')
| -rw-r--r-- | drivers/clk/ralink/clk-mt7621.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/clk/ralink/clk-mt7621.c b/drivers/clk/ralink/clk-mt7621.c index 99256659dd96..d95a33293b0a 100644 --- a/drivers/clk/ralink/clk-mt7621.c +++ b/drivers/clk/ralink/clk-mt7621.c @@ -121,7 +121,7 @@ static int mt7621_gate_is_enabled(struct clk_hw *hw) if (regmap_read(sysc, SYSC_REG_CLKCFG1, &val)) return 0; - return val & BIT(clk_gate->bit_idx); + return val & clk_gate->bit_idx; } static const struct clk_ops mt7621_gate_ops = { @@ -133,8 +133,14 @@ static const struct clk_ops mt7621_gate_ops = { static int mt7621_gate_ops_init(struct device *dev, struct mt7621_gate *sclk) { + /* + * There are drivers for this SoC that are older + * than clock driver and are not prepared for the clock. + * We don't want the kernel to disable anything so we + * add CLK_IS_CRITICAL flag here. + */ struct clk_init_data init = { - .flags = CLK_SET_RATE_PARENT, + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, .num_parents = 1, .parent_names = &sclk->parent_name, .ops = &mt7621_gate_ops, |