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path: root/drivers/clk/mediatek/clk-mt8183.c
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Diffstat (limited to 'drivers/clk/mediatek/clk-mt8183.c')
-rw-r--r--drivers/clk/mediatek/clk-mt8183.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c
index b1d810f85b71..8512101e1189 100644
--- a/drivers/clk/mediatek/clk-mt8183.c
+++ b/drivers/clk/mediatek/clk-mt8183.c
@@ -18,12 +18,6 @@
#include <dt-bindings/clock/mt8183-clk.h>
-/* Infra global controller reset set register */
-#define INFRA_RST0_SET_OFFSET 0x120
-#define INFRA_RST1_SET_OFFSET 0x130
-#define INFRA_RST2_SET_OFFSET 0x140
-#define INFRA_RST3_SET_OFFSET 0x150
-
static DEFINE_SPINLOCK(mt8183_clk_lock);
static const struct mtk_fixed_clk top_fixed_clks[] = {